1 | 2010-07-30 Gedare Bloom <giddyup44@yahoo.com> |
---|
2 | |
---|
3 | PR 1599/cpukit |
---|
4 | * cpu_asm.S: Rename _Context_Switch_necessary to |
---|
5 | _Thread_Dispatch_necessary to more properly reflect the intent. |
---|
6 | |
---|
7 | 2010-07-29 Gedare Bloom <giddyup44@yahoo.com> |
---|
8 | |
---|
9 | PR 1635/cpukit |
---|
10 | * rtems/score/cpu.h, rtems/score/types.h: Refactoring of priority |
---|
11 | handling, to isolate the bitmap implementation of priorities in the |
---|
12 | supercore so that priority management is a little more modular. This |
---|
13 | change is in anticipation of scheduler implementations that can |
---|
14 | select how they manage tracking priority levels / finding the highest |
---|
15 | priority ready task. Note that most of the changes here are simple |
---|
16 | renaming, to clarify the use of the bitmap-based priority management. |
---|
17 | |
---|
18 | 2010-07-16 Sebastian Huber <sebastian.huber@embedded-brains.de> |
---|
19 | |
---|
20 | * rtems/score/cpu.h: Include <rtems/score/types.h> first. |
---|
21 | * rtems/score/types.h: Use <rtems/score/basedefs.h> header file. |
---|
22 | |
---|
23 | 2010-07-01 Joel Sherrill <joel.sherrill@oarcorp.com> |
---|
24 | |
---|
25 | * rtems/asm.h, rtems/score/cpu.h: cpu.h defines were not available to |
---|
26 | assembly programs. This resulted in percpu.h (when included from |
---|
27 | assembly) not being able to detect that the MIPS does not have a |
---|
28 | dedicated software managed interrupt stack. |
---|
29 | |
---|
30 | 2010-06-28 Joel Sherrill <joel.sherrill@oarcorp.com> |
---|
31 | |
---|
32 | PR 1573/cpukit |
---|
33 | * cpu_asm.S, rtems/score/cpu.h: Add a per cpu data structure which |
---|
34 | contains the information required by RTEMS for each CPU core. This |
---|
35 | encapsulates information such as thread executing, heir, idle and |
---|
36 | dispatch needed. |
---|
37 | |
---|
38 | 2010-06-16 Joel Sherrill <joel.sherrill@oarcorp.com> |
---|
39 | |
---|
40 | * cpu_asm.S: Remove trailing tabs. |
---|
41 | |
---|
42 | 2010-04-25 Joel Sherrill <joel.sherrilL@OARcorp.com> |
---|
43 | |
---|
44 | * cpu.c, rtems/score/cpu.h: Move _CPU_Context_Initialize() to cpu.c so |
---|
45 | it is easier to make warning free. |
---|
46 | |
---|
47 | 2010-04-25 Joel Sherrill <joel.sherrilL@OARcorp.com> |
---|
48 | |
---|
49 | * rtems/score/cpu.h: Remove warning in _CPU_Context_Initialize. |
---|
50 | |
---|
51 | 2010-03-27 Joel Sherrill <joel.sherrill@oarcorp.com> |
---|
52 | |
---|
53 | * cpu.c, cpu_asm.S: Add include of config.h |
---|
54 | |
---|
55 | 2009-03-12 Joel Sherrill <joel.sherrill@OARcorp.com> |
---|
56 | |
---|
57 | PR 1385/cpukit |
---|
58 | * cpu_asm.S: When the type rtems_boolean was switched to the C99 bool, |
---|
59 | the size changed from 4 bytes to 1 byte. The interrupt dispatching |
---|
60 | code accesses two boolean variables for scheduling purposes and the |
---|
61 | assembly implementations of this code did not get updated. |
---|
62 | |
---|
63 | 2009-02-12 Joel Sherrill <joel.sherrill@oarcorp.com> |
---|
64 | |
---|
65 | * cpu.c, rtems/score/cpu.h: Change prototype of IDLE thread to |
---|
66 | consistently return void * and take a uintptr_t argument. |
---|
67 | |
---|
68 | 2009-02-11 Joel Sherrill <joel.sherrill@oarcorp.com> |
---|
69 | |
---|
70 | * cpu.c, rtems/score/cpu.h: Eliminate _CPU_Thread_dispatch_pointer and |
---|
71 | passing address of _Thread_Dispatch to _CPU_Initialize. Clean up |
---|
72 | comments. |
---|
73 | |
---|
74 | 2008-09-11 Ralf Corsépius <ralf.corsepius@rtems.org> |
---|
75 | |
---|
76 | * rtems/score/types.h: Do not define boolean, single_precision, |
---|
77 | double_precision unless RTEMS_DEPRECATED_TYPES is given. |
---|
78 | |
---|
79 | 2008-08-21 Ralf Corsépius <ralf.corsepius@rtems.org> |
---|
80 | |
---|
81 | * rtems/score/types.h: Include stdbool.h. |
---|
82 | Use bool as base-type for boolean. |
---|
83 | |
---|
84 | 2008-07-31 Joel Sherrill <joel.sherrill@OARcorp.com> |
---|
85 | |
---|
86 | * cpu.c, rtems/score/cpu.h: Correct prototype of Idle threads. |
---|
87 | |
---|
88 | 2008-06-05 Joel Sherrill <joel.sherrill@OARcorp.com> |
---|
89 | |
---|
90 | * rtems/score/cpu.h: Add CPU_SIMPLE_VECTORED_INTERRUPTS porting |
---|
91 | parameter to indicate that the port uses the Simple Vectored |
---|
92 | Interrupt model or the Programmable Interrupt Controller Model. The |
---|
93 | PIC model is implemented primarily in the BSP and it is responsible |
---|
94 | for all memory allocation. |
---|
95 | |
---|
96 | 2008-06-04 Joel Sherrill <joel.sherrill@OARcorp.com> |
---|
97 | |
---|
98 | * rtems/score/cpu.h: Use a constant for CPU_STACK_MINIMUM_SIZE so it |
---|
99 | can be used in cpp expressions. Using sizeof() requires actually |
---|
100 | compiling the file. |
---|
101 | |
---|
102 | 2007-12-17 Joel Sherrill <joel.sherrill@oarcorp.com> |
---|
103 | |
---|
104 | * rtems/score/cpu.h: Add _CPU_Context_Get_SP() for stack check utility. |
---|
105 | |
---|
106 | 2007-12-04 Joel Sherrill <joel.sherrill@OARcorp.com> |
---|
107 | |
---|
108 | * cpu.c, rtems/score/cpu.h: Move interrupt_stack_size field from CPU |
---|
109 | Table to Configuration Table. Eliminate CPU Table from all ports. |
---|
110 | Delete references to CPU Table in all forms. |
---|
111 | |
---|
112 | 2007-12-03 Joel Sherrill <joel.sherrill@OARcorp.com> |
---|
113 | |
---|
114 | * rtems/score/cpu.h: Moved most of the remaining CPU Table fields to |
---|
115 | the Configuration Table. This included pretasking_hook, |
---|
116 | predriver_hook, postdriver_hook, idle_task, do_zero_of_workspace, |
---|
117 | extra_mpci_receive_server_stack, stack_allocate_hook, and |
---|
118 | stack_free_hook. As a side-effect of this effort some multiprocessing |
---|
119 | code was made conditional and some style clean up occurred. |
---|
120 | |
---|
121 | 2007-11-26 Joel Sherrill <joel.sherrill@oarcorp.com> |
---|
122 | |
---|
123 | * rtems/score/cpu.h: Eliminate the clicks_per_microsecond field in the |
---|
124 | MIPS CPU Table and define another mechanism for drivers to obtain |
---|
125 | this information. |
---|
126 | |
---|
127 | 2007-08-04 Ralf Corsépius <ralf.corsepius@rtems.org> |
---|
128 | |
---|
129 | * rtems/score/cpu.h: Use uintptr_t instead of uint32_t. |
---|
130 | |
---|
131 | 2007-05-09 Ralf Corsépius <ralf.corsepius@rtems.org> |
---|
132 | |
---|
133 | * rtems/score/cpu.h: Remove CPU_HAS_OWN_HOST_TO_NETWORK_ROUTINES. |
---|
134 | |
---|
135 | 2007-04-17 Ralf Corsépius <ralf.corsepius@rtems.org> |
---|
136 | |
---|
137 | * rtems/score/cpu.h: |
---|
138 | Use Context_Control_fp* instead of void* for fp_contexts. |
---|
139 | Eliminate evil casts. |
---|
140 | |
---|
141 | 2006-11-17 Ralf Corsépius <ralf.corsepius@rtems.org> |
---|
142 | |
---|
143 | * rtems/score/types.h: Remove unsigned64, signed64. |
---|
144 | |
---|
145 | 2006-06-02 Greg Menke <gregory.menke@gsfc.nasa.gov> |
---|
146 | |
---|
147 | * cpu.c: Added __mips==32 to fix build problems on those targets |
---|
148 | caused by the Bruce Robinson. |
---|
149 | |
---|
150 | 2006-06-08 Bruce Robinson <brucer@pmccorp.com> |
---|
151 | |
---|
152 | * cpu.c: Add int64 types for __mips==3 cpus, incorporate |
---|
153 | mips_interrupt_mask() into mask computations |
---|
154 | * cpu_asm.S: Add int64 register save/restores for __mips==3 cpus. Adjustment |
---|
155 | of mips1 vs mips3 macros. |
---|
156 | * cpu.h: Add int64 types for __mips==3 cpus. |
---|
157 | |
---|
158 | 2006-03-17 Ralf Corsepius <ralf.corsepius@rtems.org> |
---|
159 | |
---|
160 | * cpu.c (_CPU_Initialize): Add fpu initialization. |
---|
161 | * rtems/score/cpu.h: Setup CPU_*_ENDIAN from GCC's__MIPS{EL|EB}__. |
---|
162 | (Partial merger of submission by Bruce Robinson <brucer@pmccorp.com>). |
---|
163 | |
---|
164 | 2006-01-16 Joel Sherrill <joel@OARcorp.com> |
---|
165 | |
---|
166 | * rtems/score/cpu.h: Part of a large patch to improve Doxygen output. |
---|
167 | As a side-effect, grammar and spelling errors were corrected, spacing |
---|
168 | errors were address, and some variable names were improved. |
---|
169 | |
---|
170 | 2005-11-18 Joel Sherrill <joel@OARcorp.com> |
---|
171 | |
---|
172 | * rtems/score/cpu.h: Eliminate use of unsigned32. |
---|
173 | |
---|
174 | 2005-11-08 Ralf Corsepius <ralf.corsepius@rtems.org> |
---|
175 | |
---|
176 | * rtems/score/types.h: Eliminate unsigned16, unsigned32. |
---|
177 | |
---|
178 | 2005-10-27 Ralf Corsepius <ralf.corsepius@rtems.org> |
---|
179 | |
---|
180 | * rtems/asm.h: Remove private version of CONCAT macros. |
---|
181 | Include <rtems/concat.h> instead. |
---|
182 | |
---|
183 | 2005-04-26 Joel Sherrill <joel@OARcorp.com> |
---|
184 | |
---|
185 | * rtems/asm.h: Eliminate warnings. |
---|
186 | |
---|
187 | 2005-02-08 Ralf Corsepius <ralf.corsepius@rtems.org> |
---|
188 | |
---|
189 | * Makefile.am: Split out preinstallation rules. |
---|
190 | * preinstall.am: New (Split out from Makefile.am). |
---|
191 | |
---|
192 | 2005-02-04 Ralf Corsepius <ralf.corsepius@rtems.org> |
---|
193 | |
---|
194 | * rtems/mips/idtcpu.h, rtems/mips/iregdef.h, rtems/score/mips.h: |
---|
195 | Header guards cleanup. |
---|
196 | |
---|
197 | 2005-02-04 Ralf Corsepius <ralf.corsepius@rtems.org> |
---|
198 | |
---|
199 | PR 754/rtems |
---|
200 | * rtems/asm.h: New (relocated from .). |
---|
201 | * asm.h: Remove (moved to rtems/asm.h). |
---|
202 | * Makefile.am: Reflect changes above. |
---|
203 | |
---|
204 | 2005-02-01 Ralf Corsepius <ralf.corsepius@rtems.org> |
---|
205 | |
---|
206 | PR rtems/752 |
---|
207 | * rtems/mips/idtcpu.h rtems/mips/iregdef.h: New (relocated from .). |
---|
208 | New header guards. |
---|
209 | * idtcpu.h, iregdef.h: Remove. |
---|
210 | * Makefile.am: Reflect changes above. |
---|
211 | |
---|
212 | 2004-01-28 Ralf Corsepius <ralf.corsepiu@rtems.org> |
---|
213 | |
---|
214 | * asm.h, rtems/score/cpu.h, rtems/score/mips.h, rtems/score/types.h: |
---|
215 | New header guards. |
---|
216 | |
---|
217 | 2005-01-24 Ralf Corsepius <ralf.corsepius@rtems.org> |
---|
218 | |
---|
219 | * rtems/score/types.h: Remove signed8, signed16, signed32, |
---|
220 | unsigned8, unsigned16, unsigned32. |
---|
221 | |
---|
222 | 2005-01-24 Ralf Corsepius <ralf.corsepius@rtems.org> |
---|
223 | |
---|
224 | * rtems/score/cpu.h: *_swap_u32( uint32_t ). |
---|
225 | |
---|
226 | 2005-01-24 Ralf Corsepius <ralf.corsepius@rtems.org> |
---|
227 | |
---|
228 | * rtems/score/types.h: #include <rtems/stdint.h>. |
---|
229 | |
---|
230 | 2005-01-07 Joel Sherrill <joel@OARcorp.com> |
---|
231 | |
---|
232 | * rtems/score/cpu.h: Remove warnings. |
---|
233 | |
---|
234 | 2005-01-07 Ralf Corsepius <ralf.corsepius@rtems.org> |
---|
235 | |
---|
236 | * Makefile.am: Eliminate CFLAGS_OPTIMIZE_V. |
---|
237 | |
---|
238 | 2005-01-03 Greg Menke <gregory.menke@gsfc.nasa.gov> |
---|
239 | |
---|
240 | PR 739 |
---|
241 | * iregdef.h: Fixes gcc warning about redundant definition of R_SZ |
---|
242 | when compiling cpu_asm.S. Problem was a #define sneaked in in |
---|
243 | version 1.11, no ill effects would have only affected R4000 |
---|
244 | builds. |
---|
245 | |
---|
246 | 2005-01-03 Greg Menke <gregory.menke@gsfc.nasa.gov> |
---|
247 | |
---|
248 | PR 737 |
---|
249 | * cpu_asm.S: Fixes gcc warning about instructions in branch delay |
---|
250 | slot when compiling cpu_asm.S |
---|
251 | |
---|
252 | 2005-01-01 Ralf Corsepius <ralf.corsepius@rtems.org> |
---|
253 | |
---|
254 | * Makefile.am: Remove build-variant support. |
---|
255 | |
---|
256 | 2004-12-02 Greg Menke <gregory.menke@gsfc.nasa.gov> |
---|
257 | |
---|
258 | PR 730 |
---|
259 | * cpu_asm.S: Collected PR 601 changes for commit to cvshead |
---|
260 | for rtems-4.7. |
---|
261 | |
---|
262 | 2004-04-09 Joel Sherrill <joel@OARcorp.com> |
---|
263 | |
---|
264 | PR 605/bsps |
---|
265 | * cpu.c: Do not use C++ style comments. |
---|
266 | |
---|
267 | 2004-04-07 Greg Menke <gregory.menke@gsfc.nasa.gov> |
---|
268 | PR 601 |
---|
269 | * cpu_asm.S: Added __mips==32 support for R4000 processors running |
---|
270 | 32 bit code. Fixed #define problems that caused fpu code to |
---|
271 | always be included even when no fpu is present. |
---|
272 | |
---|
273 | 2004-04-03 Art Ferrer <arturo.b.ferrer@nasa.gov> |
---|
274 | |
---|
275 | PR 598/bsps |
---|
276 | * cpu_asm.S, rtems/score/cpu.h: Add save of floating point |
---|
277 | status/control register on context switches. Missing this register |
---|
278 | was causing intermittent floating point errors. |
---|
279 | |
---|
280 | 2003-09-04 Joel Sherrill <joel@OARcorp.com> |
---|
281 | |
---|
282 | * cpu.c, cpu_asm.S, rtems/score/cpu.h, rtems/score/mips.h, |
---|
283 | rtems/score/types.h: URL for license changed. |
---|
284 | |
---|
285 | 2003-08-11 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
---|
286 | |
---|
287 | * configure.ac: Use rtems-bugs@rtems.com as bug report email address. |
---|
288 | |
---|
289 | 2003-03-06 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
---|
290 | |
---|
291 | * configure.ac: Remove AC_CONFIG_AUX_DIR. |
---|
292 | |
---|
293 | 2002-12-11 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
---|
294 | |
---|
295 | * configure.ac: Require autoconf-2.57 + automake-1.7.2. |
---|
296 | * Makefile.am: Eliminate C_O_FILES, S_O_FILES, libscorecpu_a_OBJECTS. |
---|
297 | |
---|
298 | 2002-11-19 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
---|
299 | |
---|
300 | * configure.ac: Fix package name. |
---|
301 | |
---|
302 | 2002-11-04 Joel Sherrill <joel@OARcorp.com> |
---|
303 | |
---|
304 | * idtcpu.h: Removed warning. |
---|
305 | |
---|
306 | 2002-11-01 Joel Sherrill <joel@OARcorp.com> |
---|
307 | |
---|
308 | * idtcpu.h: Removed warnings. |
---|
309 | |
---|
310 | 2002-10-28 Joel Sherrill <joel@OARcorp.com> |
---|
311 | |
---|
312 | * idtcpu.h: Removed warning by turning extra token at the end of |
---|
313 | an endif into a comment. |
---|
314 | |
---|
315 | 2002-10-25 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
---|
316 | |
---|
317 | * configure.ac: Add nostdinc to AM_INIT_AUTOMAKE. |
---|
318 | |
---|
319 | 2002-10-21 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
---|
320 | |
---|
321 | * .cvsignore: Reformat. |
---|
322 | Add autom4te*cache. |
---|
323 | Remove autom4te.cache. |
---|
324 | |
---|
325 | 2002-08-14 Greg Menke <gregory.menke@gsfc.nasa.gov> |
---|
326 | |
---|
327 | * cpu_asm.S: Clarified some comments, removed code that forced |
---|
328 | SR_IEP on when returning from an interrupt. |
---|
329 | |
---|
330 | 2002-06-27 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
---|
331 | |
---|
332 | * configure.ac: Add RTEMS_PROG_CCAS |
---|
333 | |
---|
334 | 2002-06-27 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
---|
335 | |
---|
336 | * configure.ac: Use AC_CONFIG_AUX_DIR(../../../..). |
---|
337 | Add AC_PROG_RANLIB. |
---|
338 | |
---|
339 | 2002-06-20 Greg Menke <gregory.menke@gsfc.nasa.gov> |
---|
340 | * cpu_asm.S: Added SR_IEO to context restore to fix isr disabled |
---|
341 | deadlock caused by interrupt arriving while dispatching. |
---|
342 | |
---|
343 | 2002-06-17 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
---|
344 | |
---|
345 | * Makefile.am: Include $(top_srcdir)/../../../automake/*.am. |
---|
346 | Use ../../../aclocal. |
---|
347 | |
---|
348 | 2001-04-03 Joel Sherrill <joel@OARcorp.com> |
---|
349 | |
---|
350 | * Per PR94, all rtems/score/CPUtypes.h are named rtems/score/types.h. |
---|
351 | * rtems/score/mipstypes.h: Removed. |
---|
352 | * rtems/score/types.h: New file via CVS magic. |
---|
353 | * Makefile.am, rtems/score/cpu.h: Account for name change. |
---|
354 | |
---|
355 | 2002-03-27 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
---|
356 | |
---|
357 | * configure.ac: |
---|
358 | AC_INIT(package,_RTEMS_VERSION,_RTEMS_BUGS). |
---|
359 | AM_INIT_AUTOMAKE([no-define foreign 1.6]). |
---|
360 | * Makefile.am: Remove AUTOMAKE_OPTIONS. |
---|
361 | |
---|
362 | 2002-03-20 Greg Menke <gregory.menke@gsfc.nasa.gov> |
---|
363 | |
---|
364 | * cpu_asm.S: Now compiles on 4600 and 4650. |
---|
365 | |
---|
366 | 2002-03-13 Greg Menke <gregory.menke@gsfc.nasa.gov> |
---|
367 | |
---|
368 | * cpu_asm.S: Fixed a sneaky return from int w/ ints disabled bug. |
---|
369 | * rtems/score/cpu.h: Fixed register numbering in comments and made |
---|
370 | interrupt enable/disable more robust. |
---|
371 | |
---|
372 | 2002-03-05 Greg Menke <gregory.menke@gsfc.nasa.gov> |
---|
373 | * cpu_asm.S: Added support for the debug exception vector, cleaned |
---|
374 | up the exception processing & exception return stuff. Re-added |
---|
375 | EPC in the task context structure so the gdb stub will know where |
---|
376 | a thread is executing. Should've left it there in the first place... |
---|
377 | * idtcpu.h: Added support for the debug exception vector. |
---|
378 | * cpu.c: Added ___exceptionTaskStack to hold a pointer to the |
---|
379 | stack frame in an interrupt so context switch code can get the |
---|
380 | userspace EPC when scheduling. |
---|
381 | * rtems/score/cpu.h: Re-added EPC to the task context. |
---|
382 | |
---|
383 | 2002-02-27 Greg Menke <gregory.menke@gsfc.nasa.gov> |
---|
384 | |
---|
385 | * cpu_asm.S: Fixed exception return address, modified FP context |
---|
386 | switch so FPU is properly enabled and also doesn't screw up the |
---|
387 | exception FP handling. |
---|
388 | * idtcpu.h: Added C0_TAR, the MIPS target address register used for |
---|
389 | returning from exceptions. |
---|
390 | * iregdef.h: Added R_TAR to the stack frame so the target address |
---|
391 | can be saved on a per-exception basis. The new entry is past the |
---|
392 | end of the frame gdb cares about, so doesn't affect gdb or cpu.h |
---|
393 | stuff. |
---|
394 | * rtems/score/cpu.h: added an #ifdef so cpu_asm.S can include it |
---|
395 | to obtain FPU defines without syntax errors generated by the C |
---|
396 | defintions. |
---|
397 | * cpu.c: Improved interrupt level saves & restores. |
---|
398 | |
---|
399 | 2002-02-08 Joel Sherrill <joel@OARcorp.com> |
---|
400 | |
---|
401 | * iregdef.h, rtems/score/cpu.h: Reordered register in the |
---|
402 | exception stack frame to better match gdb's expectations. |
---|
403 | |
---|
404 | 2001-02-05 Joel Sherrill <joel@OARcorp.com> |
---|
405 | |
---|
406 | * cpu_asm.S: Enhanced to save/restore more registers on |
---|
407 | exceptions. |
---|
408 | * rtems/score/cpu.h (CPU_Interrupt_frame): Enhanced to list every |
---|
409 | register individually and document when it is saved. |
---|
410 | * idtcpu.h: Added constants for the coprocessor 1 registers |
---|
411 | revision and status. |
---|
412 | |
---|
413 | 2001-02-05 Joel Sherrill <joel@OARcorp.com> |
---|
414 | |
---|
415 | * rtems/Makefile.am, rtems/score/Makefile.am: Removed again. |
---|
416 | |
---|
417 | 2001-02-04 Joel Sherrill <joel@OARcorp.com> |
---|
418 | |
---|
419 | * rtems/score/cpu.h: IDLE task should not be FP. This was a mistake |
---|
420 | in the previous patch that has now been confirmed. |
---|
421 | |
---|
422 | 2001-02-01 Greg Menke <gregory.menke@gsfc.nasa.gov> |
---|
423 | |
---|
424 | * cpu.c: Enhancements and fixes for modifying the SR when changing |
---|
425 | the interrupt level. |
---|
426 | * cpu_asm.S: Fixed handling of FP enable bit so it is properly |
---|
427 | managed on a per-task basis, improved handling of interrupt levels, |
---|
428 | and made deferred FP contexts work on the MIPS. |
---|
429 | * rtems/score/cpu.h: Modified to support above changes. |
---|
430 | |
---|
431 | 2002-01-28 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
---|
432 | |
---|
433 | * rtems/Makefile.am: Removed. |
---|
434 | * rtems/score/Makefile.am: Removed. |
---|
435 | * configure.ac: Reflect changes above. |
---|
436 | * Makefile.am: Reflect changes above. |
---|
437 | |
---|
438 | 2002-02-09 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
---|
439 | |
---|
440 | * asm.h: Remove #include <rtems/score/targopts.h>. |
---|
441 | Add #include <rtems/score/cpuopts.h>. |
---|
442 | * configure.ac: Remove RTEMS_CHECK_CUSTOM_BSP(RTEMS_BSP). |
---|
443 | |
---|
444 | |
---|
445 | 2001-12-20 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
---|
446 | |
---|
447 | * configure.ac: Use RTEMS_ENV_RTEMSCPU. |
---|
448 | |
---|
449 | 2001-12-19 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
---|
450 | |
---|
451 | * Makefile.am: Add multilib support. |
---|
452 | |
---|
453 | 2001-11-28 Joel Sherrill <joel@OARcorp.com>, |
---|
454 | |
---|
455 | This was tracked as PR91. |
---|
456 | * rtems/score/cpu.h: Added CPU_PROVIDES_ISR_IS_IN_PROGRESS macro which |
---|
457 | is used to specify if the port uses the standard macro for this (FALSE). |
---|
458 | A TRUE setting indicates the port provides its own implementation. |
---|
459 | |
---|
460 | 2001-10-12 Joel Sherrill <joel@OARcorp.com> |
---|
461 | |
---|
462 | * cpu_asm.S: _CPU_Context_save_fp in was incorrectly in conditional |
---|
463 | compilation block with (CPU_HARDWARE_FP == FALSE). Reported by |
---|
464 | Wayne Bullaughey <wayne@wmi.com>. |
---|
465 | |
---|
466 | 2001-10-11 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
---|
467 | |
---|
468 | * .cvsignore: Add autom4te.cache for autoconf > 2.52. |
---|
469 | * configure.in: Remove. |
---|
470 | * configure.ac: New file, generated from configure.in by autoupdate. |
---|
471 | |
---|
472 | 2001-09-23 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
---|
473 | |
---|
474 | * rtems/score/Makefile.am: Use 'PREINSTALL_FILES ='. |
---|
475 | * Makefile.am: Use 'PREINSTALL_FILES ='. |
---|
476 | |
---|
477 | 2001-07-03 Joel Sherrill <joel@OARcorp.com> |
---|
478 | |
---|
479 | * cpu.c: Fixed typo. |
---|
480 | |
---|
481 | 2000-05-24 Joel Sherrill <joel@OARcorp.com> |
---|
482 | |
---|
483 | * rtems/score/mips.h: Added constants for MIPS exception numbers. |
---|
484 | All exceptions should be given low numbers and thus can be installed |
---|
485 | and processed in a uniform manner. Variances between various MIPS |
---|
486 | ISA levels were not accounted for. |
---|
487 | |
---|
488 | 2001-05-24 Greg Menke <gregory.menke@gsfc.nasa.gov> |
---|
489 | |
---|
490 | * Assisted in design and debug by Joel Sherrill <joel@OARcorp.com>. |
---|
491 | * cpu_asm.S: Now works on Mongoose-V. Missed in previous patch. |
---|
492 | |
---|
493 | 2001-05-22 Greg Menke <gregory.menke@gsfc.nasa.gov> |
---|
494 | |
---|
495 | * rtems/score/cpu.h: Add the interrupt stack structure and enhance |
---|
496 | the context initialization to account for floating point tasks. |
---|
497 | * rtems/score/mips.h: Added the routines mips_set_cause(), |
---|
498 | mips_get_fcr31(), and mips_set_fcr31(). |
---|
499 | * Assisted in design and debug by Joel Sherrill <joel@OARcorp.com>. |
---|
500 | |
---|
501 | 2001-05-07 Joel Sherrill <joel@OARcorp.com> |
---|
502 | |
---|
503 | * cpu_asm.S: Merged patches from Gregory Menke |
---|
504 | <Gregory.D.Menke.1@gsfc.nasa.gov> that clean up |
---|
505 | stack usage and include nops in the delay slots. |
---|
506 | |
---|
507 | 2001-04-20 Joel Sherrill <joel@OARcorp.com> |
---|
508 | |
---|
509 | * cpu_asm.S: Added code to save and restore SR and EPC to |
---|
510 | properly support nested interrupts. Note that the ISR |
---|
511 | (not RTEMS) enables interrupts allowing the nesting to occur. |
---|
512 | |
---|
513 | 2001-03-14 Joel Sherrill <joel@OARcorp.com> |
---|
514 | |
---|
515 | * cpu.c, rtems/score/cpu.h, rtems/score/mipstypes.h: |
---|
516 | Removed unused variable _CPU_Thread_dispatch_pointer |
---|
517 | and cleaned numerous comments. |
---|
518 | |
---|
519 | 2001-03-13 Joel Sherrill <joel@OARcorp.com> |
---|
520 | |
---|
521 | * cpu.c, cpu_asm.S, iregdef.h, rtems/score/cpu.h, rtems/score/mips.h: |
---|
522 | Merged MIPS1 and MIPS3 code reducing the number of lines of assembly. |
---|
523 | Also reimplemented some assembly routines in C further reducing |
---|
524 | the amount of assembly and increasing maintainability. |
---|
525 | |
---|
526 | 2001-02-04 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
---|
527 | |
---|
528 | * Makefile.am, rtems/score/Makefile.am: |
---|
529 | Apply include_*HEADERS instead of H_FILES. |
---|
530 | |
---|
531 | 2001-01-12 Joel Sherrill <joel@OARcorp.com> |
---|
532 | |
---|
533 | * rtems/score/mips.h (mips_get_sr, mips_set_sr): Corrected |
---|
534 | register constraints from "general" to "register". |
---|
535 | |
---|
536 | 2001-01-09 Joel Sherrill <joel@OARcorp.com> |
---|
537 | |
---|
538 | * cpu_asm.S: Use SR_INTERRUPT_ENABLE_BITS instead of SR_XXX constants |
---|
539 | to make it easier to conditionalize the code for various ISA levels. |
---|
540 | |
---|
541 | 2001-01-08 Joel Sherrill <joel@OARcorp.com> |
---|
542 | |
---|
543 | * idtcpu.h: Commented out definition of "wait". It was stupid to |
---|
544 | use such a common word as a macro. |
---|
545 | * rtems/score/cpu.h (_CPU_ISR_Disable): Fixed for mips ISA 3. |
---|
546 | * rtems/score/mips.h: Added include of <idtcpu.h>. |
---|
547 | * rtems/score/mips.h (mips_enable_in_interrupt_mask): Corrected. |
---|
548 | |
---|
549 | 2001-01-03 Joel Sherrill <joel@OARcorp.com> |
---|
550 | |
---|
551 | * rtems/score/cpu.h: Added _CPU_Initialize_vectors(). |
---|
552 | * cpu_asm.S: Eliminated warning for duplicate definition of EXTERN. |
---|
553 | |
---|
554 | 2000-12-19 Joel Sherrill <joel@OARcorp.com> |
---|
555 | |
---|
556 | * cpu_asm.S (_ISR_Handler): Return to the address in the EPC register. |
---|
557 | Previous code resulting in the interrupted immediately returning |
---|
558 | to the caller of the routine it was inside. |
---|
559 | |
---|
560 | 2000-12-19 Joel Sherrill <joel@OARcorp.com> |
---|
561 | |
---|
562 | * cpu.c (_CPU_Initialize): Do not initialize _ISR_Vector_table() here |
---|
563 | because it has not been allocated yet. |
---|
564 | |
---|
565 | 2000-12-13 Joel Sherrill <joel@OARcorp.com> |
---|
566 | |
---|
567 | * cpu.c: Removed duplicate declaration for _ISR_Vector_table. |
---|
568 | * cpu_asm.S: Removed assembly language to vector ISR handler |
---|
569 | on MIPS ISA I. Now call mips_vector_isr_handlers() in libcpu or BSP. |
---|
570 | * rtems/score/cpu.h (CPU_INTERRUPT_NUMBER_OF_VECTORS): No |
---|
571 | longer a constant -- get the real value from libcpu. |
---|
572 | |
---|
573 | 2000-12-13 Joel Sherrill <joel@OARcorp.com> |
---|
574 | |
---|
575 | * cpu_asm.h: Removed. |
---|
576 | * Makefile.am: Remove cpu_asm.h. |
---|
577 | * rtems/score/mips64orion.h: Renamed mips.h. |
---|
578 | * rtems/score/mips.h: New file, formerly mips64orion.h. |
---|
579 | Header rewritten. |
---|
580 | (mips_get_sr, mips_set_sr, mips_enable_in_interrupt_mask, |
---|
581 | mips_disable_in_interrupt_mask): New macros. |
---|
582 | * rtems/score/Makefile.am: Reflect renaming mips64orion.h. |
---|
583 | * asm.h: Include <mips.h> not <mips64orion.h>. Now includes the |
---|
584 | few defines that were in <cpu_asm.h>. |
---|
585 | * cpu.c (_CPU_ISR_Get_level): Added MIPS ISA I version of this routine. |
---|
586 | MIPS ISA 3 is still in assembly for now. |
---|
587 | (_CPU_Thread_Idle_body): Rewrote in C. |
---|
588 | * cpu_asm.S: Rewrote file header. |
---|
589 | (FRAME,ENDFRAME) now in asm.h. |
---|
590 | (_CPU_ISR_Get_level): Removed ISA I version and rewrote in C. |
---|
591 | (_CPU_ISR_Set_level): Removed ISA I version and rewrote in C. |
---|
592 | (_CPU_Context_switch): MIPS ISA I now manages preserves SR_IEC and |
---|
593 | leaves other bits in SR alone on task switch. |
---|
594 | (mips_enable_interrupts,mips_disable_interrupts, |
---|
595 | mips_enable_global_interrupts,mips_disable_global_interrupts, |
---|
596 | disable_int, enable_int): Removed. |
---|
597 | (mips_get_sr): Rewritten as C macro. |
---|
598 | (_CPU_Thread_Idle_body): Rewritten in C. |
---|
599 | (init_exc_vecs): Rewritten in C as mips_install_isr_entries() and |
---|
600 | placed in libcpu. |
---|
601 | (exc_tlb_code, exc_xtlb_code, exc_cache_code, exc_norm_code): Moved |
---|
602 | to libcpu/mips/shared/interrupts. |
---|
603 | (general): Cleaned up comment blocks and #if 0 areas. |
---|
604 | * idtcpu.h: Made ifdef report an error. |
---|
605 | * iregdef.h: Removed warning. |
---|
606 | * rtems/score/cpu.h (CPU_INTERRUPT_NUMBER_OF_VECTORS): Now a variable |
---|
607 | number defined by libcpu. |
---|
608 | (_CPU_ISR_Disable, _CPU_ISR_Enable): Rewritten to use new routines |
---|
609 | to access SR. |
---|
610 | (_CPU_ISR_Set_level): Rewritten as macro for ISA I. |
---|
611 | (_CPU_Context_Initialize): Honor ISR level in task initialization. |
---|
612 | (_CPU_Fatal_halt): Use new _CPU_ISR_Disable() macro. |
---|
613 | |
---|
614 | 2000-12-06 Joel Sherrill <joel@OARcorp.com> |
---|
615 | |
---|
616 | * rtems/score/cpu.h: When mips ISA level is 1, registers in the |
---|
617 | context should be 32 not 64 bits. |
---|
618 | |
---|
619 | 2000-11-30 Joel Sherrill <joel@OARcorp.com> |
---|
620 | |
---|
621 | * cpu_asm.S: Changed "_CPU_Ccontext_switch_restore: typo to |
---|
622 | correct name of _CPU_Context_switch_restore. Added dummy |
---|
623 | version of exc_utlb_code() so applications would link. |
---|
624 | |
---|
625 | 2000-11-09 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
---|
626 | |
---|
627 | * Makefile.am: Use ... instead of RTEMS_TOPdir in ACLOCAL_AMFLAGS. |
---|
628 | |
---|
629 | 2000-11-02 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
---|
630 | |
---|
631 | * Makefile.am: Switch to ACLOCAL_AMFLAGS = -I $(RTEMS_TOPdir)/aclocal. |
---|
632 | |
---|
633 | 2000-10-25 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
---|
634 | |
---|
635 | * Makefile.am: ACLOCAL_AMFLAGS= -I $(RTEMS_TOPdir)/macros. |
---|
636 | Switch to GNU canonicalization. |
---|
637 | |
---|
638 | 2000-10-24 Alan Cudmore <alanc@linuxstart.com> and |
---|
639 | Joel Sherrill <joel@OARcorp.com> |
---|
640 | |
---|
641 | * This is a major reworking of the mips64orion port to use |
---|
642 | gcc predefines as much as possible and a big push to multilib |
---|
643 | the mips port. The mips64orion port was copied/renamed to mips |
---|
644 | to be more like other GNU tools. Alan did most of the technical |
---|
645 | work of determining how to map old macro names used by the mips64orion |
---|
646 | port to standard compiler macro definitions. Joel did the merge |
---|
647 | with CVS magic to keep individual file history and did the BSP |
---|
648 | modifications. Details follow: |
---|
649 | * Makefile.am: idtmon.h in mips64orion port not present. |
---|
650 | * asm.h: MIPS64ORION replaced with MIPS. Frame setup macros added. |
---|
651 | * cpu.c: Comments added. |
---|
652 | * cpu_asm.S: Conditionals changed. MIPS ISA level 1 support added. |
---|
653 | First attempt at exception/interrupt processing for ISA level 1 |
---|
654 | and minus any use of IDT/MON added. |
---|
655 | * idtcpu.h: Conditionals changed to use gcc predefines. |
---|
656 | * iregdef.h: Ditto. |
---|
657 | * cpu_asm.h: No real change. Merger required commit. |
---|
658 | * rtems/Makefile.am: Ditto. |
---|
659 | * rtems/score/Makefile.am: Ditto. |
---|
660 | * rtems/score/cpu.h: Change MIPS64ORION to MIPS. |
---|
661 | * rtems/score/mips64orion.h: Change MIPS64ORION to MIPS. Convert |
---|
662 | from using RTEMS_CPU_MODEL to gcc predefines to figre things out. |
---|
663 | |
---|
664 | 2000-09-04 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
---|
665 | |
---|
666 | * Makefile.am: Include compile.am. |
---|
667 | |
---|
668 | 2000-08-10 Joel Sherrill <joel@OARcorp.com> |
---|
669 | |
---|
670 | * ChangeLog: New file. |
---|