source: rtems/cpukit/score/cpu/mips/ChangeLog @ c181345

4.104.114.84.95
Last change on this file since c181345 was c181345, checked in by Joel Sherrill <joel.sherrill@…>, on 04/09/04 at 14:52:40

2004-04-09 Joel Sherrill <joel@…>

PR 605/bsps

  • cpu.c: Do not use C++ style comments.
  • Property mode set to 100644
File size: 16.7 KB
Line 
12004-04-09      Joel Sherrill <joel@OARcorp.com>
2
3        PR 605/bsps
4        * cpu.c: Do not use C++ style comments.
5
62004-04-06      Ralf Corsepius <ralf_corsepius@rtems.org>
7
8        * configure.ac: Remove (Merged into $(top_srcdir)/configure.ac).
9        * Makefile.am: Don't include multilib.am.
10        Reflect merging configure.ac into $(top_srcdir)/configure.ac.
11
122004-04-03      Art Ferrer <arturo.b.ferrer@nasa.gov>
13
14        PR 598/bsps
15        * cpu_asm.S, rtems/score/cpu.h: Add save of floating point
16        status/control register on context switches. Missing this register
17        was causing intermittent floating point errors.
18
192004-04-02      Ralf Corsepius <ralf_corsepius@rtems.org>
20
21        * Makefile.am: Install iregdefs.h and idtcpu.h to
22        $(includedir)/rtems/mips.
23        * cpu_asm.S: Include <rtems/mips/iregdef.h> instead of <iregdef.h>.
24        * rtems/score/mips.h, cpu_asm.S: Include <rtems/mips/idtcpu.h>
25        instead of <idtcpu.h>.
26
272004-04-01      Ralf Corsepius <ralf_corsepius@rtems.org>
28
29        * Makefile.am: Install asm.h to $(includedir)/rtems.
30
312004-04-01      Ralf Corsepius <ralf_corsepius@rtems.org>
32
33        * cpu_asm.S: Include <rtems/asm.h> instead of <asm.h>.
34
352004-03-30      Ralf Corsepius <ralf_corsepius@rtems.org>
36
37        * cpu.c, rtems/score/cpu.h: Convert to using c99 fixed size types.
38
392004-03-29      Ralf Corsepius <ralf_corsepius@rtems.org>
40
41        * configure.ac: RTEMS_TOP([../../../..]).
42
432004-01-21      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
44
45        * configure.ac: Move RTEMS_TOP one subdir down.
46
472004-01-19      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
48
49        * Makefile.am: Add PREINSTALL_DIRS.
50
512004-01-14      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
52
53        * Makefile.am: Re-add dirstamps to PREINSTALL_FILES.
54        Add PREINSTALL_FILES to CLEANFILES.
55
562004-01-12      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
57
58        * configure.ac: Requires automake >= 1.8.1.
59
602004-01-11      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
61
62        * Makefile.am: Include compile.am, again.
63
642004-01-11      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
65
66        * Makefile.am: Convert to using automake compilation rules.
67
682004-01-07      Joel Sherrill <joel@OARcorp.com>
69
70        * rtems/score/mips.h: Removed junk revision line.
71
722003-12-12      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
73
74        * Makefile.am: Use mkdir_p. Remove dirs from PREINSTALL_FILES.
75
762003-12-12      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
77
78        * configure.ac: Require automake >= 1.8, autoconf >= 2.59.
79
802003-12-01      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
81
82        * Makefile.am: Remove TMPINSTALL_FILES.
83
842003-11-30      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
85
86        * Makefile.am: Add $(dirstamp) to preinstallation rules.
87
882003-11-23      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
89
90        * Makefile.am: Don't use gmake rules for preinstallation.
91
922003-10-21      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
93
94        * configure.ac: Remove RTEMS_CANONICAL_HOST.
95
962003-10-21      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
97
98        * configure.ac: Remove RTEMS_CHECK_CPU.
99
1002003-09-26      Joel Sherrill <joel@OARcorp.com>
101
102        * rtems/score/cpu.h: Obsoleting HP PA-RISC port and removing all
103        references.
104
1052003-09-04      Joel Sherrill <joel@OARcorp.com>
106
107        * cpu.c, cpu_asm.S, rtems/score/cpu.h, rtems/score/mips.h,
108        rtems/score/types.h: URL for license changed.
109
1102003-08-11      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
111
112        * configure.ac: Use rtems-bugs@rtems.com as bug report email address.
113
1142003-03-06      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
115
116        * configure.ac: Remove AC_CONFIG_AUX_DIR.
117
1182002-12-11      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
119
120        * configure.ac: Require autoconf-2.57 + automake-1.7.2.
121        * Makefile.am: Eliminate C_O_FILES, S_O_FILES, libscorecpu_a_OBJECTS.
122
1232002-11-19      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
124
125        * configure.ac: Fix package name.
126
1272002-11-04      Joel Sherrill <joel@OARcorp.com>
128
129        * idtcpu.h: Removed warning.
130
1312002-11-01      Joel Sherrill <joel@OARcorp.com>
132
133        * idtcpu.h: Removed warnings.
134
1352002-10-28      Joel Sherrill <joel@OARcorp.com>
136
137        * idtcpu.h: Removed warning by turning extra token at the end of
138        an endif into a comment.
139
1402002-10-25      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
141
142        * configure.ac: Add nostdinc to AM_INIT_AUTOMAKE.
143
1442002-10-21      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
145
146        * .cvsignore: Reformat.
147        Add autom4te*cache.
148        Remove autom4te.cache.
149
1502002-08-14      Greg Menke <gregory.menke@gsfc.nasa.gov>
151
152        * cpu_asm.S: Clarified some comments, removed code that forced
153        SR_IEP on when returning from an interrupt.
154
1552002-06-27      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
156
157        * configure.ac: Add RTEMS_PROG_CCAS
158
1592002-06-27      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
160
161        * configure.ac: Use AC_CONFIG_AUX_DIR(../../../..).
162        Add AC_PROG_RANLIB.
163
1642002-06-20      Greg Menke <gregory.menke@gsfc.nasa.gov>
165        * cpu_asm.S: Added SR_IEO to context restore to fix isr disabled
166        deadlock caused by interrupt arriving while dispatching.
167       
1682002-06-17      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
169
170        * Makefile.am: Include $(top_srcdir)/../../../automake/*.am.
171        Use ../../../aclocal.
172
1732001-04-03      Joel Sherrill <joel@OARcorp.com>
174
175        * Per PR94, all rtems/score/CPUtypes.h are named rtems/score/types.h.
176        * rtems/score/mipstypes.h: Removed.
177        * rtems/score/types.h: New file via CVS magic.
178        * Makefile.am, rtems/score/cpu.h: Account for name change.
179
1802002-03-27      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
181
182        * configure.ac:
183        AC_INIT(package,_RTEMS_VERSION,_RTEMS_BUGS).
184        AM_INIT_AUTOMAKE([no-define foreign 1.6]).
185        * Makefile.am: Remove AUTOMAKE_OPTIONS.
186
1872002-03-20      Greg Menke <gregory.menke@gsfc.nasa.gov>
188
189        * cpu_asm.S: Now compiles on 4600 and 4650.
190
1912002-03-13      Greg Menke <gregory.menke@gsfc.nasa.gov>
192
193        * cpu_asm.S: Fixed a sneaky return from int w/ ints disabled bug.
194        * rtems/score/cpu.h: Fixed register numbering in comments and made
195        interrupt enable/disable more robust.
196       
1972002-03-05      Greg Menke <gregory.menke@gsfc.nasa.gov>
198        * cpu_asm.S: Added support for the debug exception vector, cleaned
199        up the exception processing & exception return stuff.  Re-added
200        EPC in the task context structure so the gdb stub will know where
201        a thread is executing.  Should've left it there in the first place...
202        * idtcpu.h: Added support for the debug exception vector.
203        * cpu.c: Added ___exceptionTaskStack to hold a pointer to the
204        stack frame in an interrupt so context switch code can get the
205        userspace EPC when scheduling.
206        * rtems/score/cpu.h: Re-added EPC to the task context.
207
2082002-02-27      Greg Menke <gregory.menke@gsfc.nasa.gov>
209
210        * cpu_asm.S: Fixed exception return address, modified FP context
211        switch so FPU is properly enabled and also doesn't screw up the
212        exception FP handling.
213        * idtcpu.h: Added C0_TAR, the MIPS target address register used for
214        returning from exceptions.
215        * iregdef.h: Added R_TAR to the stack frame so the target address
216        can be saved on a per-exception basis.  The new entry is past the
217        end of the frame gdb cares about, so doesn't affect gdb or cpu.h
218        stuff.
219        * rtems/score/cpu.h: added an #ifdef so cpu_asm.S can include it
220        to obtain FPU defines without syntax errors generated by the C
221        defintions.
222        * cpu.c: Improved interrupt level saves & restores.
223       
2242002-02-08      Joel Sherrill <joel@OARcorp.com>
225
226        * iregdef.h, rtems/score/cpu.h: Reordered register in the
227        exception stack frame to better match gdb's expectations.
228
2292001-02-05      Joel Sherrill <joel@OARcorp.com>
230
231        * cpu_asm.S: Enhanced to save/restore more registers on
232        exceptions.
233        * rtems/score/cpu.h (CPU_Interrupt_frame): Enhanced to list every
234        register individually and document when it is saved.
235        * idtcpu.h: Added constants for the coprocessor 1 registers
236        revision and status.
237
2382001-02-05      Joel Sherrill <joel@OARcorp.com>
239
240        * rtems/Makefile.am, rtems/score/Makefile.am: Removed again.
241
2422001-02-04      Joel Sherrill <joel@OARcorp.com>
243
244        * rtems/score/cpu.h: IDLE task should not be FP.  This was a mistake
245        in the previous patch that has now been confirmed.
246
2472001-02-01      Greg Menke <gregory.menke@gsfc.nasa.gov>
248
249        * cpu.c: Enhancements and fixes for modifying the SR when changing
250        the interrupt level.
251        * cpu_asm.S: Fixed handling of FP enable bit so it is properly
252        managed on a per-task basis, improved handling of interrupt levels,
253        and made deferred FP contexts work on the MIPS.
254        * rtems/score/cpu.h: Modified to support above changes.
255
2562002-01-28      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
257
258        * rtems/Makefile.am: Removed.
259        * rtems/score/Makefile.am: Removed.
260        * configure.ac: Reflect changes above.
261        * Makefile.am: Reflect changes above.
262
2632002-02-09      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
264
265        * asm.h: Remove #include <rtems/score/targopts.h>.
266        Add #include <rtems/score/cpuopts.h>.
267        * configure.ac: Remove RTEMS_CHECK_CUSTOM_BSP(RTEMS_BSP).
268
269
2702001-12-20      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
271
272        * configure.ac: Use RTEMS_ENV_RTEMSCPU.
273
2742001-12-19      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
275
276        * Makefile.am: Add multilib support.
277
2782001-11-28      Joel Sherrill <joel@OARcorp.com>,
279
280        This was tracked as PR91.
281        * rtems/score/cpu.h: Added CPU_PROVIDES_ISR_IS_IN_PROGRESS macro which
282        is used to specify if the port uses the standard macro for this (FALSE).
283        A TRUE setting indicates the port provides its own implementation.
284
2852001-10-12      Joel Sherrill <joel@OARcorp.com>
286
287        * cpu_asm.S: _CPU_Context_save_fp in was incorrectly in conditional
288        compilation block with (CPU_HARDWARE_FP == FALSE).  Reported by
289        Wayne Bullaughey <wayne@wmi.com>.
290
2912001-10-11      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
292
293        * .cvsignore: Add autom4te.cache for autoconf > 2.52.
294        * configure.in: Remove.
295        * configure.ac: New file, generated from configure.in by autoupdate.
296
2972001-09-23      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
298
299        * rtems/score/Makefile.am: Use 'PREINSTALL_FILES ='.
300        * Makefile.am: Use 'PREINSTALL_FILES ='.
301
3022001-07-03      Joel Sherrill <joel@OARcorp.com>
303
304        * cpu.c: Fixed typo.
305
3062000-05-24      Joel Sherrill <joel@OARcorp.com>
307
308        * rtems/score/mips.h: Added constants for MIPS exception numbers.
309        All exceptions should be given low numbers and thus can be installed
310        and processed in a uniform manner.  Variances between various MIPS
311        ISA levels were not accounted for.
312
3132001-05-24      Greg Menke <gregory.menke@gsfc.nasa.gov>
314
315        * Assisted in design and debug by Joel Sherrill <joel@OARcorp.com>.
316        * cpu_asm.S: Now works on Mongoose-V.  Missed in previous patch.
317
3182001-05-22      Greg Menke <gregory.menke@gsfc.nasa.gov>
319
320        * rtems/score/cpu.h: Add the interrupt stack structure and enhance
321        the context initialization to account for floating point tasks. 
322        * rtems/score/mips.h: Added the routines mips_set_cause(),
323        mips_get_fcr31(), and mips_set_fcr31().
324        * Assisted in design and debug by Joel Sherrill <joel@OARcorp.com>.
325
3262001-05-07      Joel Sherrill <joel@OARcorp.com>
327
328        * cpu_asm.S: Merged patches from Gregory Menke
329        <Gregory.D.Menke.1@gsfc.nasa.gov> that clean up
330        stack usage and include nops in the delay slots.
331
3322001-04-20      Joel Sherrill <joel@OARcorp.com>
333
334        * cpu_asm.S: Added code to save and restore SR and EPC to
335        properly support nested interrupts.  Note that the ISR
336        (not RTEMS) enables interrupts allowing the nesting to occur.
337
3382001-03-14      Joel Sherrill <joel@OARcorp.com>
339
340        * cpu.c, rtems/score/cpu.h, rtems/score/mipstypes.h:
341        Removed unused variable _CPU_Thread_dispatch_pointer
342        and cleaned numerous comments.
343       
3442001-03-13      Joel Sherrill <joel@OARcorp.com>
345
346        * cpu.c, cpu_asm.S, iregdef.h, rtems/score/cpu.h, rtems/score/mips.h:
347        Merged MIPS1 and MIPS3 code reducing the number of lines of assembly.
348        Also reimplemented some assembly routines in C further reducing
349        the amount of assembly and increasing maintainability.
350
3512001-02-04      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
352
353        * Makefile.am, rtems/score/Makefile.am:
354        Apply include_*HEADERS instead of H_FILES.
355
3562001-01-12      Joel Sherrill <joel@OARcorp.com>
357
358        * rtems/score/mips.h (mips_get_sr, mips_set_sr): Corrected
359        register constraints from "general" to "register".
360
3612001-01-09      Joel Sherrill <joel@OARcorp.com>
362
363        * cpu_asm.S: Use SR_INTERRUPT_ENABLE_BITS instead of SR_XXX constants
364        to make it easier to conditionalize the code for various ISA levels.
365
3662001-01-08      Joel Sherrill <joel@OARcorp.com>
367
368        * idtcpu.h: Commented out definition of "wait".  It was stupid to
369        use such a common word as a macro.
370        * rtems/score/cpu.h (_CPU_ISR_Disable): Fixed for mips ISA 3.
371        * rtems/score/mips.h: Added include of <idtcpu.h>.
372        * rtems/score/mips.h (mips_enable_in_interrupt_mask): Corrected.
373
3742001-01-03      Joel Sherrill <joel@OARcorp.com>
375
376        * rtems/score/cpu.h: Added _CPU_Initialize_vectors().
377        * cpu_asm.S: Eliminated warning for duplicate definition of EXTERN.
378
3792000-12-19      Joel Sherrill <joel@OARcorp.com>
380
381        * cpu_asm.S (_ISR_Handler): Return to the address in the EPC register.
382        Previous code resulting in the interrupted immediately returning
383        to the caller of the routine it was inside.
384
3852000-12-19      Joel Sherrill <joel@OARcorp.com>
386
387        * cpu.c (_CPU_Initialize): Do not initialize _ISR_Vector_table() here
388        because it has not been allocated yet.
389
3902000-12-13      Joel Sherrill <joel@OARcorp.com>
391
392        * cpu.c: Removed duplicate declaration for _ISR_Vector_table.
393        * cpu_asm.S: Removed assembly language to vector ISR handler
394        on MIPS ISA I.  Now call mips_vector_isr_handlers() in libcpu or BSP.
395        * rtems/score/cpu.h (CPU_INTERRUPT_NUMBER_OF_VECTORS): No
396        longer a constant -- get the real value from libcpu.
397
3982000-12-13      Joel Sherrill <joel@OARcorp.com>
399
400        * cpu_asm.h: Removed.
401        * Makefile.am: Remove cpu_asm.h.
402        * rtems/score/mips64orion.h: Renamed mips.h.
403        * rtems/score/mips.h: New file, formerly mips64orion.h.
404        Header rewritten.
405        (mips_get_sr, mips_set_sr, mips_enable_in_interrupt_mask,
406        mips_disable_in_interrupt_mask): New macros.
407        * rtems/score/Makefile.am: Reflect renaming mips64orion.h.
408        * asm.h: Include <mips.h> not <mips64orion.h>. Now includes the
409        few defines that were in <cpu_asm.h>.
410        * cpu.c (_CPU_ISR_Get_level): Added MIPS ISA I version of this routine.
411        MIPS ISA 3 is still in assembly for now.
412        (_CPU_Thread_Idle_body): Rewrote in C.
413        * cpu_asm.S: Rewrote file header.
414        (FRAME,ENDFRAME) now in asm.h.
415        (_CPU_ISR_Get_level): Removed ISA I version and rewrote in C.
416        (_CPU_ISR_Set_level): Removed ISA I version and rewrote in C.
417        (_CPU_Context_switch): MIPS ISA I now manages preserves SR_IEC and
418        leaves other bits in SR alone on task switch.
419        (mips_enable_interrupts,mips_disable_interrupts,
420        mips_enable_global_interrupts,mips_disable_global_interrupts,
421        disable_int, enable_int): Removed.
422        (mips_get_sr): Rewritten as C macro.
423        (_CPU_Thread_Idle_body): Rewritten in C.
424        (init_exc_vecs): Rewritten in C as mips_install_isr_entries() and
425        placed in libcpu.
426        (exc_tlb_code, exc_xtlb_code, exc_cache_code, exc_norm_code): Moved
427        to libcpu/mips/shared/interrupts.
428        (general): Cleaned up comment blocks and #if 0 areas.
429        * idtcpu.h: Made ifdef report an error.
430        * iregdef.h: Removed warning.
431        * rtems/score/cpu.h (CPU_INTERRUPT_NUMBER_OF_VECTORS): Now a variable
432        number defined by libcpu.
433        (_CPU_ISR_Disable, _CPU_ISR_Enable): Rewritten to use new routines
434        to access SR.
435        (_CPU_ISR_Set_level): Rewritten as macro for ISA I.
436        (_CPU_Context_Initialize): Honor ISR level in task initialization.
437        (_CPU_Fatal_halt): Use new _CPU_ISR_Disable() macro.
438
4392000-12-06      Joel Sherrill <joel@OARcorp.com>
440
441        * rtems/score/cpu.h: When mips ISA level is 1, registers in the
442        context should be 32 not 64 bits.
443
4442000-11-30      Joel Sherrill <joel@OARcorp.com>
445
446        * cpu_asm.S: Changed "_CPU_Ccontext_switch_restore: typo to
447        correct name of _CPU_Context_switch_restore.  Added dummy
448        version of exc_utlb_code() so applications would link.
449
4502000-11-09      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
451
452        * Makefile.am: Use ... instead of RTEMS_TOPdir in ACLOCAL_AMFLAGS.
453
4542000-11-02      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
455
456        * Makefile.am: Switch to ACLOCAL_AMFLAGS = -I $(RTEMS_TOPdir)/aclocal.
457
4582000-10-25      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
459
460        * Makefile.am: ACLOCAL_AMFLAGS= -I $(RTEMS_TOPdir)/macros.
461        Switch to GNU canonicalization.
462
4632000-10-24      Alan Cudmore <alanc@linuxstart.com> and
464        Joel Sherrill <joel@OARcorp.com>
465
466        * This is a major reworking of the mips64orion port to use
467        gcc predefines as much as possible and a big push to multilib
468        the mips port.  The mips64orion port was copied/renamed to mips
469        to be more like other GNU tools.  Alan did most of the technical
470        work of determining how to map old macro names used by the mips64orion
471        port to standard compiler macro definitions.  Joel did the merge
472        with CVS magic to keep individual file history and did the BSP
473        modifications. Details follow:
474        * Makefile.am: idtmon.h in mips64orion port not present.
475        * asm.h: MIPS64ORION replaced with MIPS. Frame setup macros added.
476        * cpu.c: Comments added.
477        * cpu_asm.S: Conditionals changed.  MIPS ISA level 1 support added.
478        First attempt at exception/interrupt processing for ISA level 1
479        and minus any use of IDT/MON added.
480        * idtcpu.h: Conditionals changed to use gcc predefines.
481        * iregdef.h: Ditto.
482        * cpu_asm.h: No real change.  Merger required commit.
483        * rtems/Makefile.am: Ditto.
484        * rtems/score/Makefile.am: Ditto.
485        * rtems/score/cpu.h: Change MIPS64ORION to MIPS.
486        * rtems/score/mips64orion.h: Change MIPS64ORION to MIPS.  Convert
487        from using RTEMS_CPU_MODEL to gcc predefines to figre things out.
488
4892000-09-04      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
490
491        * Makefile.am: Include compile.am.
492
4932000-08-10      Joel Sherrill <joel@OARcorp.com>
494
495        * ChangeLog: New file.
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