source: rtems/cpukit/score/cpu/mips/ChangeLog @ be2ed3e

4.104.114.84.95
Last change on this file since be2ed3e was be2ed3e, checked in by Ralf Corsepius <ralf.corsepius@…>, on 04/06/04 at 02:21:50

2004-04-06 Ralf Corsepius <ralf_corsepius@…>

  • configure.ac: Remove (Merged into $(top_srcdir)/configure.ac).
  • Makefile.am: Don't include multilib.am. Reflect merging configure.ac into $(top_srcdir)/configure.ac.
  • Property mode set to 100644
File size: 16.6 KB
Line 
12004-04-06      Ralf Corsepius <ralf_corsepius@rtems.org>
2
3        * configure.ac: Remove (Merged into $(top_srcdir)/configure.ac).
4        * Makefile.am: Don't include multilib.am.
5        Reflect merging configure.ac into $(top_srcdir)/configure.ac.
6
72004-04-03      Art Ferrer <arturo.b.ferrer@nasa.gov>
8
9        PR 598/bsps
10        * cpu_asm.S, rtems/score/cpu.h: Add save of floating point
11        status/control register on context switches. Missing this register
12        was causing intermittent floating point errors.
13
142004-04-02      Ralf Corsepius <ralf_corsepius@rtems.org>
15
16        * Makefile.am: Install iregdefs.h and idtcpu.h to
17        $(includedir)/rtems/mips.
18        * cpu_asm.S: Include <rtems/mips/iregdef.h> instead of <iregdef.h>.
19        * rtems/score/mips.h, cpu_asm.S: Include <rtems/mips/idtcpu.h>
20        instead of <idtcpu.h>.
21
222004-04-01      Ralf Corsepius <ralf_corsepius@rtems.org>
23
24        * Makefile.am: Install asm.h to $(includedir)/rtems.
25
262004-04-01      Ralf Corsepius <ralf_corsepius@rtems.org>
27
28        * cpu_asm.S: Include <rtems/asm.h> instead of <asm.h>.
29
302004-03-30      Ralf Corsepius <ralf_corsepius@rtems.org>
31
32        * cpu.c, rtems/score/cpu.h: Convert to using c99 fixed size types.
33
342004-03-29      Ralf Corsepius <ralf_corsepius@rtems.org>
35
36        * configure.ac: RTEMS_TOP([../../../..]).
37
382004-01-21      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
39
40        * configure.ac: Move RTEMS_TOP one subdir down.
41
422004-01-19      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
43
44        * Makefile.am: Add PREINSTALL_DIRS.
45
462004-01-14      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
47
48        * Makefile.am: Re-add dirstamps to PREINSTALL_FILES.
49        Add PREINSTALL_FILES to CLEANFILES.
50
512004-01-12      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
52
53        * configure.ac: Requires automake >= 1.8.1.
54
552004-01-11      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
56
57        * Makefile.am: Include compile.am, again.
58
592004-01-11      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
60
61        * Makefile.am: Convert to using automake compilation rules.
62
632004-01-07      Joel Sherrill <joel@OARcorp.com>
64
65        * rtems/score/mips.h: Removed junk revision line.
66
672003-12-12      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
68
69        * Makefile.am: Use mkdir_p. Remove dirs from PREINSTALL_FILES.
70
712003-12-12      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
72
73        * configure.ac: Require automake >= 1.8, autoconf >= 2.59.
74
752003-12-01      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
76
77        * Makefile.am: Remove TMPINSTALL_FILES.
78
792003-11-30      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
80
81        * Makefile.am: Add $(dirstamp) to preinstallation rules.
82
832003-11-23      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
84
85        * Makefile.am: Don't use gmake rules for preinstallation.
86
872003-10-21      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
88
89        * configure.ac: Remove RTEMS_CANONICAL_HOST.
90
912003-10-21      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
92
93        * configure.ac: Remove RTEMS_CHECK_CPU.
94
952003-09-26      Joel Sherrill <joel@OARcorp.com>
96
97        * rtems/score/cpu.h: Obsoleting HP PA-RISC port and removing all
98        references.
99
1002003-09-04      Joel Sherrill <joel@OARcorp.com>
101
102        * cpu.c, cpu_asm.S, rtems/score/cpu.h, rtems/score/mips.h,
103        rtems/score/types.h: URL for license changed.
104
1052003-08-11      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
106
107        * configure.ac: Use rtems-bugs@rtems.com as bug report email address.
108
1092003-03-06      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
110
111        * configure.ac: Remove AC_CONFIG_AUX_DIR.
112
1132002-12-11      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
114
115        * configure.ac: Require autoconf-2.57 + automake-1.7.2.
116        * Makefile.am: Eliminate C_O_FILES, S_O_FILES, libscorecpu_a_OBJECTS.
117
1182002-11-19      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
119
120        * configure.ac: Fix package name.
121
1222002-11-04      Joel Sherrill <joel@OARcorp.com>
123
124        * idtcpu.h: Removed warning.
125
1262002-11-01      Joel Sherrill <joel@OARcorp.com>
127
128        * idtcpu.h: Removed warnings.
129
1302002-10-28      Joel Sherrill <joel@OARcorp.com>
131
132        * idtcpu.h: Removed warning by turning extra token at the end of
133        an endif into a comment.
134
1352002-10-25      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
136
137        * configure.ac: Add nostdinc to AM_INIT_AUTOMAKE.
138
1392002-10-21      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
140
141        * .cvsignore: Reformat.
142        Add autom4te*cache.
143        Remove autom4te.cache.
144
1452002-08-14      Greg Menke <gregory.menke@gsfc.nasa.gov>
146
147        * cpu_asm.S: Clarified some comments, removed code that forced
148        SR_IEP on when returning from an interrupt.
149
1502002-06-27      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
151
152        * configure.ac: Add RTEMS_PROG_CCAS
153
1542002-06-27      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
155
156        * configure.ac: Use AC_CONFIG_AUX_DIR(../../../..).
157        Add AC_PROG_RANLIB.
158
1592002-06-20      Greg Menke <gregory.menke@gsfc.nasa.gov>
160        * cpu_asm.S: Added SR_IEO to context restore to fix isr disabled
161        deadlock caused by interrupt arriving while dispatching.
162       
1632002-06-17      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
164
165        * Makefile.am: Include $(top_srcdir)/../../../automake/*.am.
166        Use ../../../aclocal.
167
1682001-04-03      Joel Sherrill <joel@OARcorp.com>
169
170        * Per PR94, all rtems/score/CPUtypes.h are named rtems/score/types.h.
171        * rtems/score/mipstypes.h: Removed.
172        * rtems/score/types.h: New file via CVS magic.
173        * Makefile.am, rtems/score/cpu.h: Account for name change.
174
1752002-03-27      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
176
177        * configure.ac:
178        AC_INIT(package,_RTEMS_VERSION,_RTEMS_BUGS).
179        AM_INIT_AUTOMAKE([no-define foreign 1.6]).
180        * Makefile.am: Remove AUTOMAKE_OPTIONS.
181
1822002-03-20      Greg Menke <gregory.menke@gsfc.nasa.gov>
183
184        * cpu_asm.S: Now compiles on 4600 and 4650.
185
1862002-03-13      Greg Menke <gregory.menke@gsfc.nasa.gov>
187
188        * cpu_asm.S: Fixed a sneaky return from int w/ ints disabled bug.
189        * rtems/score/cpu.h: Fixed register numbering in comments and made
190        interrupt enable/disable more robust.
191       
1922002-03-05      Greg Menke <gregory.menke@gsfc.nasa.gov>
193        * cpu_asm.S: Added support for the debug exception vector, cleaned
194        up the exception processing & exception return stuff.  Re-added
195        EPC in the task context structure so the gdb stub will know where
196        a thread is executing.  Should've left it there in the first place...
197        * idtcpu.h: Added support for the debug exception vector.
198        * cpu.c: Added ___exceptionTaskStack to hold a pointer to the
199        stack frame in an interrupt so context switch code can get the
200        userspace EPC when scheduling.
201        * rtems/score/cpu.h: Re-added EPC to the task context.
202
2032002-02-27      Greg Menke <gregory.menke@gsfc.nasa.gov>
204
205        * cpu_asm.S: Fixed exception return address, modified FP context
206        switch so FPU is properly enabled and also doesn't screw up the
207        exception FP handling.
208        * idtcpu.h: Added C0_TAR, the MIPS target address register used for
209        returning from exceptions.
210        * iregdef.h: Added R_TAR to the stack frame so the target address
211        can be saved on a per-exception basis.  The new entry is past the
212        end of the frame gdb cares about, so doesn't affect gdb or cpu.h
213        stuff.
214        * rtems/score/cpu.h: added an #ifdef so cpu_asm.S can include it
215        to obtain FPU defines without syntax errors generated by the C
216        defintions.
217        * cpu.c: Improved interrupt level saves & restores.
218       
2192002-02-08      Joel Sherrill <joel@OARcorp.com>
220
221        * iregdef.h, rtems/score/cpu.h: Reordered register in the
222        exception stack frame to better match gdb's expectations.
223
2242001-02-05      Joel Sherrill <joel@OARcorp.com>
225
226        * cpu_asm.S: Enhanced to save/restore more registers on
227        exceptions.
228        * rtems/score/cpu.h (CPU_Interrupt_frame): Enhanced to list every
229        register individually and document when it is saved.
230        * idtcpu.h: Added constants for the coprocessor 1 registers
231        revision and status.
232
2332001-02-05      Joel Sherrill <joel@OARcorp.com>
234
235        * rtems/Makefile.am, rtems/score/Makefile.am: Removed again.
236
2372001-02-04      Joel Sherrill <joel@OARcorp.com>
238
239        * rtems/score/cpu.h: IDLE task should not be FP.  This was a mistake
240        in the previous patch that has now been confirmed.
241
2422001-02-01      Greg Menke <gregory.menke@gsfc.nasa.gov>
243
244        * cpu.c: Enhancements and fixes for modifying the SR when changing
245        the interrupt level.
246        * cpu_asm.S: Fixed handling of FP enable bit so it is properly
247        managed on a per-task basis, improved handling of interrupt levels,
248        and made deferred FP contexts work on the MIPS.
249        * rtems/score/cpu.h: Modified to support above changes.
250
2512002-01-28      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
252
253        * rtems/Makefile.am: Removed.
254        * rtems/score/Makefile.am: Removed.
255        * configure.ac: Reflect changes above.
256        * Makefile.am: Reflect changes above.
257
2582002-02-09      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
259
260        * asm.h: Remove #include <rtems/score/targopts.h>.
261        Add #include <rtems/score/cpuopts.h>.
262        * configure.ac: Remove RTEMS_CHECK_CUSTOM_BSP(RTEMS_BSP).
263
264
2652001-12-20      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
266
267        * configure.ac: Use RTEMS_ENV_RTEMSCPU.
268
2692001-12-19      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
270
271        * Makefile.am: Add multilib support.
272
2732001-11-28      Joel Sherrill <joel@OARcorp.com>,
274
275        This was tracked as PR91.
276        * rtems/score/cpu.h: Added CPU_PROVIDES_ISR_IS_IN_PROGRESS macro which
277        is used to specify if the port uses the standard macro for this (FALSE).
278        A TRUE setting indicates the port provides its own implementation.
279
2802001-10-12      Joel Sherrill <joel@OARcorp.com>
281
282        * cpu_asm.S: _CPU_Context_save_fp in was incorrectly in conditional
283        compilation block with (CPU_HARDWARE_FP == FALSE).  Reported by
284        Wayne Bullaughey <wayne@wmi.com>.
285
2862001-10-11      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
287
288        * .cvsignore: Add autom4te.cache for autoconf > 2.52.
289        * configure.in: Remove.
290        * configure.ac: New file, generated from configure.in by autoupdate.
291
2922001-09-23      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
293
294        * rtems/score/Makefile.am: Use 'PREINSTALL_FILES ='.
295        * Makefile.am: Use 'PREINSTALL_FILES ='.
296
2972001-07-03      Joel Sherrill <joel@OARcorp.com>
298
299        * cpu.c: Fixed typo.
300
3012000-05-24      Joel Sherrill <joel@OARcorp.com>
302
303        * rtems/score/mips.h: Added constants for MIPS exception numbers.
304        All exceptions should be given low numbers and thus can be installed
305        and processed in a uniform manner.  Variances between various MIPS
306        ISA levels were not accounted for.
307
3082001-05-24      Greg Menke <gregory.menke@gsfc.nasa.gov>
309
310        * Assisted in design and debug by Joel Sherrill <joel@OARcorp.com>.
311        * cpu_asm.S: Now works on Mongoose-V.  Missed in previous patch.
312
3132001-05-22      Greg Menke <gregory.menke@gsfc.nasa.gov>
314
315        * rtems/score/cpu.h: Add the interrupt stack structure and enhance
316        the context initialization to account for floating point tasks. 
317        * rtems/score/mips.h: Added the routines mips_set_cause(),
318        mips_get_fcr31(), and mips_set_fcr31().
319        * Assisted in design and debug by Joel Sherrill <joel@OARcorp.com>.
320
3212001-05-07      Joel Sherrill <joel@OARcorp.com>
322
323        * cpu_asm.S: Merged patches from Gregory Menke
324        <Gregory.D.Menke.1@gsfc.nasa.gov> that clean up
325        stack usage and include nops in the delay slots.
326
3272001-04-20      Joel Sherrill <joel@OARcorp.com>
328
329        * cpu_asm.S: Added code to save and restore SR and EPC to
330        properly support nested interrupts.  Note that the ISR
331        (not RTEMS) enables interrupts allowing the nesting to occur.
332
3332001-03-14      Joel Sherrill <joel@OARcorp.com>
334
335        * cpu.c, rtems/score/cpu.h, rtems/score/mipstypes.h:
336        Removed unused variable _CPU_Thread_dispatch_pointer
337        and cleaned numerous comments.
338       
3392001-03-13      Joel Sherrill <joel@OARcorp.com>
340
341        * cpu.c, cpu_asm.S, iregdef.h, rtems/score/cpu.h, rtems/score/mips.h:
342        Merged MIPS1 and MIPS3 code reducing the number of lines of assembly.
343        Also reimplemented some assembly routines in C further reducing
344        the amount of assembly and increasing maintainability.
345
3462001-02-04      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
347
348        * Makefile.am, rtems/score/Makefile.am:
349        Apply include_*HEADERS instead of H_FILES.
350
3512001-01-12      Joel Sherrill <joel@OARcorp.com>
352
353        * rtems/score/mips.h (mips_get_sr, mips_set_sr): Corrected
354        register constraints from "general" to "register".
355
3562001-01-09      Joel Sherrill <joel@OARcorp.com>
357
358        * cpu_asm.S: Use SR_INTERRUPT_ENABLE_BITS instead of SR_XXX constants
359        to make it easier to conditionalize the code for various ISA levels.
360
3612001-01-08      Joel Sherrill <joel@OARcorp.com>
362
363        * idtcpu.h: Commented out definition of "wait".  It was stupid to
364        use such a common word as a macro.
365        * rtems/score/cpu.h (_CPU_ISR_Disable): Fixed for mips ISA 3.
366        * rtems/score/mips.h: Added include of <idtcpu.h>.
367        * rtems/score/mips.h (mips_enable_in_interrupt_mask): Corrected.
368
3692001-01-03      Joel Sherrill <joel@OARcorp.com>
370
371        * rtems/score/cpu.h: Added _CPU_Initialize_vectors().
372        * cpu_asm.S: Eliminated warning for duplicate definition of EXTERN.
373
3742000-12-19      Joel Sherrill <joel@OARcorp.com>
375
376        * cpu_asm.S (_ISR_Handler): Return to the address in the EPC register.
377        Previous code resulting in the interrupted immediately returning
378        to the caller of the routine it was inside.
379
3802000-12-19      Joel Sherrill <joel@OARcorp.com>
381
382        * cpu.c (_CPU_Initialize): Do not initialize _ISR_Vector_table() here
383        because it has not been allocated yet.
384
3852000-12-13      Joel Sherrill <joel@OARcorp.com>
386
387        * cpu.c: Removed duplicate declaration for _ISR_Vector_table.
388        * cpu_asm.S: Removed assembly language to vector ISR handler
389        on MIPS ISA I.  Now call mips_vector_isr_handlers() in libcpu or BSP.
390        * rtems/score/cpu.h (CPU_INTERRUPT_NUMBER_OF_VECTORS): No
391        longer a constant -- get the real value from libcpu.
392
3932000-12-13      Joel Sherrill <joel@OARcorp.com>
394
395        * cpu_asm.h: Removed.
396        * Makefile.am: Remove cpu_asm.h.
397        * rtems/score/mips64orion.h: Renamed mips.h.
398        * rtems/score/mips.h: New file, formerly mips64orion.h.
399        Header rewritten.
400        (mips_get_sr, mips_set_sr, mips_enable_in_interrupt_mask,
401        mips_disable_in_interrupt_mask): New macros.
402        * rtems/score/Makefile.am: Reflect renaming mips64orion.h.
403        * asm.h: Include <mips.h> not <mips64orion.h>. Now includes the
404        few defines that were in <cpu_asm.h>.
405        * cpu.c (_CPU_ISR_Get_level): Added MIPS ISA I version of this routine.
406        MIPS ISA 3 is still in assembly for now.
407        (_CPU_Thread_Idle_body): Rewrote in C.
408        * cpu_asm.S: Rewrote file header.
409        (FRAME,ENDFRAME) now in asm.h.
410        (_CPU_ISR_Get_level): Removed ISA I version and rewrote in C.
411        (_CPU_ISR_Set_level): Removed ISA I version and rewrote in C.
412        (_CPU_Context_switch): MIPS ISA I now manages preserves SR_IEC and
413        leaves other bits in SR alone on task switch.
414        (mips_enable_interrupts,mips_disable_interrupts,
415        mips_enable_global_interrupts,mips_disable_global_interrupts,
416        disable_int, enable_int): Removed.
417        (mips_get_sr): Rewritten as C macro.
418        (_CPU_Thread_Idle_body): Rewritten in C.
419        (init_exc_vecs): Rewritten in C as mips_install_isr_entries() and
420        placed in libcpu.
421        (exc_tlb_code, exc_xtlb_code, exc_cache_code, exc_norm_code): Moved
422        to libcpu/mips/shared/interrupts.
423        (general): Cleaned up comment blocks and #if 0 areas.
424        * idtcpu.h: Made ifdef report an error.
425        * iregdef.h: Removed warning.
426        * rtems/score/cpu.h (CPU_INTERRUPT_NUMBER_OF_VECTORS): Now a variable
427        number defined by libcpu.
428        (_CPU_ISR_Disable, _CPU_ISR_Enable): Rewritten to use new routines
429        to access SR.
430        (_CPU_ISR_Set_level): Rewritten as macro for ISA I.
431        (_CPU_Context_Initialize): Honor ISR level in task initialization.
432        (_CPU_Fatal_halt): Use new _CPU_ISR_Disable() macro.
433
4342000-12-06      Joel Sherrill <joel@OARcorp.com>
435
436        * rtems/score/cpu.h: When mips ISA level is 1, registers in the
437        context should be 32 not 64 bits.
438
4392000-11-30      Joel Sherrill <joel@OARcorp.com>
440
441        * cpu_asm.S: Changed "_CPU_Ccontext_switch_restore: typo to
442        correct name of _CPU_Context_switch_restore.  Added dummy
443        version of exc_utlb_code() so applications would link.
444
4452000-11-09      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
446
447        * Makefile.am: Use ... instead of RTEMS_TOPdir in ACLOCAL_AMFLAGS.
448
4492000-11-02      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
450
451        * Makefile.am: Switch to ACLOCAL_AMFLAGS = -I $(RTEMS_TOPdir)/aclocal.
452
4532000-10-25      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
454
455        * Makefile.am: ACLOCAL_AMFLAGS= -I $(RTEMS_TOPdir)/macros.
456        Switch to GNU canonicalization.
457
4582000-10-24      Alan Cudmore <alanc@linuxstart.com> and
459        Joel Sherrill <joel@OARcorp.com>
460
461        * This is a major reworking of the mips64orion port to use
462        gcc predefines as much as possible and a big push to multilib
463        the mips port.  The mips64orion port was copied/renamed to mips
464        to be more like other GNU tools.  Alan did most of the technical
465        work of determining how to map old macro names used by the mips64orion
466        port to standard compiler macro definitions.  Joel did the merge
467        with CVS magic to keep individual file history and did the BSP
468        modifications. Details follow:
469        * Makefile.am: idtmon.h in mips64orion port not present.
470        * asm.h: MIPS64ORION replaced with MIPS. Frame setup macros added.
471        * cpu.c: Comments added.
472        * cpu_asm.S: Conditionals changed.  MIPS ISA level 1 support added.
473        First attempt at exception/interrupt processing for ISA level 1
474        and minus any use of IDT/MON added.
475        * idtcpu.h: Conditionals changed to use gcc predefines.
476        * iregdef.h: Ditto.
477        * cpu_asm.h: No real change.  Merger required commit.
478        * rtems/Makefile.am: Ditto.
479        * rtems/score/Makefile.am: Ditto.
480        * rtems/score/cpu.h: Change MIPS64ORION to MIPS.
481        * rtems/score/mips64orion.h: Change MIPS64ORION to MIPS.  Convert
482        from using RTEMS_CPU_MODEL to gcc predefines to figre things out.
483
4842000-09-04      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
485
486        * Makefile.am: Include compile.am.
487
4882000-08-10      Joel Sherrill <joel@OARcorp.com>
489
490        * ChangeLog: New file.
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