source: rtems/cpukit/score/cpu/mips/ChangeLog @ a85d8ec

4.104.114.84.9
Last change on this file since a85d8ec was a85d8ec, checked in by Ralf Corsepius <ralf.corsepius@…>, on Jul 26, 2002 at 1:32:13 PM

2002-07-26 Ralf Corsepius <corsepiu@…>

  • Makefile.am: Build libscorecpu.a instead of rtems-cpu.rel.
  • Property mode set to 100644
File size: 13.1 KB
Line 
12002-07-26      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
2
3        * Makefile.am: Build libscorecpu.a instead of rtems-cpu.rel.
4
52002-07-22      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
6
7        * Makefile.am: Use .$(OBJEXT) instead of .o.
8
92002-07-16      Greg Menke <gregory.menke@gsfc.nasa.gov>
10
11        * cpu_asm.S: Added SR_IEO to context restore to fix isr disabled
12        deadlock caused by interrupt arriving while dispatching.
13
142002-07-05      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
15
16        * configure.ac: RTEMS_TOP(../../../..).
17
182002-07-03      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
19
20        * rtems.c: Remove.
21        * Makefile.am: Reflect changes above.
22
232002-07-01      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
24
25        * configure.ac: Remove RTEMS_PROJECT_ROOT.
26
272002-06-27      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
28
29        * configure.ac: Add RTEMS_PROG_CCAS
30
312002-06-27      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
32
33        * configure.ac: Use AC_CONFIG_AUX_DIR(../../../..).
34        Add AC_PROG_RANLIB.
35
362002-06-17      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
37
38        * Makefile.am: Include $(top_srcdir)/../../../automake/*.am.
39        Use ../../../aclocal.
40
412001-04-03      Joel Sherrill <joel@OARcorp.com>
42
43        * Per PR94, all rtems/score/CPUtypes.h are named rtems/score/types.h.
44        * rtems/score/mipstypes.h: Removed.
45        * rtems/score/types.h: New file via CVS magic.
46        * Makefile.am, rtems/score/cpu.h: Account for name change.
47
482002-03-27      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
49
50        * configure.ac:
51        AC_INIT(package,_RTEMS_VERSION,_RTEMS_BUGS).
52        AM_INIT_AUTOMAKE([no-define foreign 1.6]).
53        * Makefile.am: Remove AUTOMAKE_OPTIONS.
54
552002-03-20      Greg Menke <gregory.menke@gsfc.nasa.gov>
56
57        * cpu_asm.S: Now compiles on 4600 and 4650.
58
592002-03-13      Greg Menke <gregory.menke@gsfc.nasa.gov>
60
61        * cpu_asm.S: Fixed a sneaky return from int w/ ints disabled bug.
62        * rtems/score/cpu.h: Fixed register numbering in comments and made
63        interrupt enable/disable more robust.
64       
652002-03-05      Greg Menke <gregory.menke@gsfc.nasa.gov>
66        * cpu_asm.S: Added support for the debug exception vector, cleaned
67        up the exception processing & exception return stuff.  Re-added
68        EPC in the task context structure so the gdb stub will know where
69        a thread is executing.  Should've left it there in the first place...
70        * idtcpu.h: Added support for the debug exception vector.
71        * cpu.c: Added ___exceptionTaskStack to hold a pointer to the
72        stack frame in an interrupt so context switch code can get the
73        userspace EPC when scheduling.
74        * rtems/score/cpu.h: Re-added EPC to the task context.
75
762002-02-27      Greg Menke <gregory.menke@gsfc.nasa.gov>
77
78        * cpu_asm.S: Fixed exception return address, modified FP context
79        switch so FPU is properly enabled and also doesn't screw up the
80        exception FP handling.
81        * idtcpu.h: Added C0_TAR, the MIPS target address register used for
82        returning from exceptions.
83        * iregdef.h: Added R_TAR to the stack frame so the target address
84        can be saved on a per-exception basis.  The new entry is past the
85        end of the frame gdb cares about, so doesn't affect gdb or cpu.h
86        stuff.
87        * rtems/score/cpu.h: added an #ifdef so cpu_asm.S can include it
88        to obtain FPU defines without syntax errors generated by the C
89        defintions.
90        * cpu.c: Improved interrupt level saves & restores.
91       
922002-02-08      Joel Sherrill <joel@OARcorp.com>
93
94        * iregdef.h, rtems/score/cpu.h: Reordered register in the
95        exception stack frame to better match gdb's expectations.
96
972001-02-05      Joel Sherrill <joel@OARcorp.com>
98
99        * cpu_asm.S: Enhanced to save/restore more registers on
100        exceptions.
101        * rtems/score/cpu.h (CPU_Interrupt_frame): Enhanced to list every
102        register individually and document when it is saved.
103        * idtcpu.h: Added constants for the coprocessor 1 registers
104        revision and status.
105
1062001-02-05      Joel Sherrill <joel@OARcorp.com>
107
108        * rtems/Makefile.am, rtems/score/Makefile.am: Removed again.
109
1102001-02-04      Joel Sherrill <joel@OARcorp.com>
111
112        * rtems/score/cpu.h: IDLE task should not be FP.  This was a mistake
113        in the previous patch that has now been confirmed.
114
1152001-02-01      Greg Menke <gregory.menke@gsfc.nasa.gov>
116
117        * cpu.c: Enhancements and fixes for modifying the SR when changing
118        the interrupt level.
119        * cpu_asm.S: Fixed handling of FP enable bit so it is properly
120        managed on a per-task basis, improved handling of interrupt levels,
121        and made deferred FP contexts work on the MIPS.
122        * rtems/score/cpu.h: Modified to support above changes.
123
1242002-01-28      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
125
126        * rtems/Makefile.am: Removed.
127        * rtems/score/Makefile.am: Removed.
128        * configure.ac: Reflect changes above.
129        * Makefile.am: Reflect changes above.
130
1312002-02-09      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
132
133        * asm.h: Remove #include <rtems/score/targopts.h>.
134        Add #include <rtems/score/cpuopts.h>.
135        * configure.ac: Remove RTEMS_CHECK_CUSTOM_BSP(RTEMS_BSP).
136
137
1382001-12-20      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
139
140        * configure.ac: Use RTEMS_ENV_RTEMSCPU.
141
1422001-12-19      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
143
144        * Makefile.am: Add multilib support.
145
1462001-11-28      Joel Sherrill <joel@OARcorp.com>,
147
148        This was tracked as PR91.
149        * rtems/score/cpu.h: Added CPU_PROVIDES_ISR_IS_IN_PROGRESS macro which
150        is used to specify if the port uses the standard macro for this (FALSE).
151        A TRUE setting indicates the port provides its own implementation.
152
1532001-10-12      Joel Sherrill <joel@OARcorp.com>
154
155        * cpu_asm.S: _CPU_Context_save_fp in was incorrectly in conditional
156        compilation block with (CPU_HARDWARE_FP == FALSE).  Reported by
157        Wayne Bullaughey <wayne@wmi.com>.
158
1592001-10-11      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
160
161        * .cvsignore: Add autom4te.cache for autoconf > 2.52.
162        * configure.in: Remove.
163        * configure.ac: New file, generated from configure.in by autoupdate.
164
1652001-09-23      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
166
167        * rtems/score/Makefile.am: Use 'PREINSTALL_FILES ='.
168        * Makefile.am: Use 'PREINSTALL_FILES ='.
169
1702001-07-03      Joel Sherrill <joel@OARcorp.com>
171
172        * cpu.c: Fixed typo.
173
1742000-05-24      Joel Sherrill <joel@OARcorp.com>
175
176        * rtems/score/mips.h: Added constants for MIPS exception numbers.
177        All exceptions should be given low numbers and thus can be installed
178        and processed in a uniform manner.  Variances between various MIPS
179        ISA levels were not accounted for.
180
1812001-05-24      Greg Menke <gregory.menke@gsfc.nasa.gov>
182
183        * Assisted in design and debug by Joel Sherrill <joel@OARcorp.com>.
184        * cpu_asm.S: Now works on Mongoose-V.  Missed in previous patch.
185
1862001-05-22      Greg Menke <gregory.menke@gsfc.nasa.gov>
187
188        * rtems/score/cpu.h: Add the interrupt stack structure and enhance
189        the context initialization to account for floating point tasks. 
190        * rtems/score/mips.h: Added the routines mips_set_cause(),
191        mips_get_fcr31(), and mips_set_fcr31().
192        * Assisted in design and debug by Joel Sherrill <joel@OARcorp.com>.
193
1942001-05-07      Joel Sherrill <joel@OARcorp.com>
195
196        * cpu_asm.S: Merged patches from Gregory Menke
197        <Gregory.D.Menke.1@gsfc.nasa.gov> that clean up
198        stack usage and include nops in the delay slots.
199
2002001-04-20      Joel Sherrill <joel@OARcorp.com>
201
202        * cpu_asm.S: Added code to save and restore SR and EPC to
203        properly support nested interrupts.  Note that the ISR
204        (not RTEMS) enables interrupts allowing the nesting to occur.
205
2062001-03-14      Joel Sherrill <joel@OARcorp.com>
207
208        * cpu.c, rtems/score/cpu.h, rtems/score/mipstypes.h:
209        Removed unused variable _CPU_Thread_dispatch_pointer
210        and cleaned numerous comments.
211       
2122001-03-13      Joel Sherrill <joel@OARcorp.com>
213
214        * cpu.c, cpu_asm.S, iregdef.h, rtems/score/cpu.h, rtems/score/mips.h:
215        Merged MIPS1 and MIPS3 code reducing the number of lines of assembly.
216        Also reimplemented some assembly routines in C further reducing
217        the amount of assembly and increasing maintainability.
218
2192001-02-04      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
220
221        * Makefile.am, rtems/score/Makefile.am:
222        Apply include_*HEADERS instead of H_FILES.
223
2242001-01-12      Joel Sherrill <joel@OARcorp.com>
225
226        * rtems/score/mips.h (mips_get_sr, mips_set_sr): Corrected
227        register constraints from "general" to "register".
228
2292001-01-09      Joel Sherrill <joel@OARcorp.com>
230
231        * cpu_asm.S: Use SR_INTERRUPT_ENABLE_BITS instead of SR_XXX constants
232        to make it easier to conditionalize the code for various ISA levels.
233
2342001-01-08      Joel Sherrill <joel@OARcorp.com>
235
236        * idtcpu.h: Commented out definition of "wait".  It was stupid to
237        use such a common word as a macro.
238        * rtems/score/cpu.h (_CPU_ISR_Disable): Fixed for mips ISA 3.
239        * rtems/score/mips.h: Added include of <idtcpu.h>.
240        * rtems/score/mips.h (mips_enable_in_interrupt_mask): Corrected.
241
2422001-01-03      Joel Sherrill <joel@OARcorp.com>
243
244        * rtems/score/cpu.h: Added _CPU_Initialize_vectors().
245        * cpu_asm.S: Eliminated warning for duplicate definition of EXTERN.
246
2472000-12-19      Joel Sherrill <joel@OARcorp.com>
248
249        * cpu_asm.S (_ISR_Handler): Return to the address in the EPC register.
250        Previous code resulting in the interrupted immediately returning
251        to the caller of the routine it was inside.
252
2532000-12-19      Joel Sherrill <joel@OARcorp.com>
254
255        * cpu.c (_CPU_Initialize): Do not initialize _ISR_Vector_table() here
256        because it has not been allocated yet.
257
2582000-12-13      Joel Sherrill <joel@OARcorp.com>
259
260        * cpu.c: Removed duplicate declaration for _ISR_Vector_table.
261        * cpu_asm.S: Removed assembly language to vector ISR handler
262        on MIPS ISA I.  Now call mips_vector_isr_handlers() in libcpu or BSP.
263        * rtems/score/cpu.h (CPU_INTERRUPT_NUMBER_OF_VECTORS): No
264        longer a constant -- get the real value from libcpu.
265
2662000-12-13      Joel Sherrill <joel@OARcorp.com>
267
268        * cpu_asm.h: Removed.
269        * Makefile.am: Remove cpu_asm.h.
270        * rtems/score/mips64orion.h: Renamed mips.h.
271        * rtems/score/mips.h: New file, formerly mips64orion.h.
272        Header rewritten.
273        (mips_get_sr, mips_set_sr, mips_enable_in_interrupt_mask,
274        mips_disable_in_interrupt_mask): New macros.
275        * rtems/score/Makefile.am: Reflect renaming mips64orion.h.
276        * asm.h: Include <mips.h> not <mips64orion.h>. Now includes the
277        few defines that were in <cpu_asm.h>.
278        * cpu.c (_CPU_ISR_Get_level): Added MIPS ISA I version of this routine.
279        MIPS ISA 3 is still in assembly for now.
280        (_CPU_Thread_Idle_body): Rewrote in C.
281        * cpu_asm.S: Rewrote file header.
282        (FRAME,ENDFRAME) now in asm.h.
283        (_CPU_ISR_Get_level): Removed ISA I version and rewrote in C.
284        (_CPU_ISR_Set_level): Removed ISA I version and rewrote in C.
285        (_CPU_Context_switch): MIPS ISA I now manages preserves SR_IEC and
286        leaves other bits in SR alone on task switch.
287        (mips_enable_interrupts,mips_disable_interrupts,
288        mips_enable_global_interrupts,mips_disable_global_interrupts,
289        disable_int, enable_int): Removed.
290        (mips_get_sr): Rewritten as C macro.
291        (_CPU_Thread_Idle_body): Rewritten in C.
292        (init_exc_vecs): Rewritten in C as mips_install_isr_entries() and
293        placed in libcpu.
294        (exc_tlb_code, exc_xtlb_code, exc_cache_code, exc_norm_code): Moved
295        to libcpu/mips/shared/interrupts.
296        (general): Cleaned up comment blocks and #if 0 areas.
297        * idtcpu.h: Made ifdef report an error.
298        * iregdef.h: Removed warning.
299        * rtems/score/cpu.h (CPU_INTERRUPT_NUMBER_OF_VECTORS): Now a variable
300        number defined by libcpu.
301        (_CPU_ISR_Disable, _CPU_ISR_Enable): Rewritten to use new routines
302        to access SR.
303        (_CPU_ISR_Set_level): Rewritten as macro for ISA I.
304        (_CPU_Context_Initialize): Honor ISR level in task initialization.
305        (_CPU_Fatal_halt): Use new _CPU_ISR_Disable() macro.
306
3072000-12-06      Joel Sherrill <joel@OARcorp.com>
308
309        * rtems/score/cpu.h: When mips ISA level is 1, registers in the
310        context should be 32 not 64 bits.
311
3122000-11-30      Joel Sherrill <joel@OARcorp.com>
313
314        * cpu_asm.S: Changed "_CPU_Ccontext_switch_restore: typo to
315        correct name of _CPU_Context_switch_restore.  Added dummy
316        version of exc_utlb_code() so applications would link.
317
3182000-11-09      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
319
320        * Makefile.am: Use ... instead of RTEMS_TOPdir in ACLOCAL_AMFLAGS.
321
3222000-11-02      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
323
324        * Makefile.am: Switch to ACLOCAL_AMFLAGS = -I $(RTEMS_TOPdir)/aclocal.
325
3262000-10-25      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
327
328        * Makefile.am: ACLOCAL_AMFLAGS= -I $(RTEMS_TOPdir)/macros.
329        Switch to GNU canonicalization.
330
3312000-10-24      Alan Cudmore <alanc@linuxstart.com> and
332        Joel Sherrill <joel@OARcorp.com>
333
334        * This is a major reworking of the mips64orion port to use
335        gcc predefines as much as possible and a big push to multilib
336        the mips port.  The mips64orion port was copied/renamed to mips
337        to be more like other GNU tools.  Alan did most of the technical
338        work of determining how to map old macro names used by the mips64orion
339        port to standard compiler macro definitions.  Joel did the merge
340        with CVS magic to keep individual file history and did the BSP
341        modifications. Details follow:
342        * Makefile.am: idtmon.h in mips64orion port not present.
343        * asm.h: MIPS64ORION replaced with MIPS. Frame setup macros added.
344        * cpu.c: Comments added.
345        * cpu_asm.S: Conditionals changed.  MIPS ISA level 1 support added.
346        First attempt at exception/interrupt processing for ISA level 1
347        and minus any use of IDT/MON added.
348        * idtcpu.h: Conditionals changed to use gcc predefines.
349        * iregdef.h: Ditto.
350        * cpu_asm.h: No real change.  Merger required commit.
351        * rtems/Makefile.am: Ditto.
352        * rtems/score/Makefile.am: Ditto.
353        * rtems/score/cpu.h: Change MIPS64ORION to MIPS.
354        * rtems/score/mips64orion.h: Change MIPS64ORION to MIPS.  Convert
355        from using RTEMS_CPU_MODEL to gcc predefines to figre things out.
356
3572000-09-04      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
358
359        * Makefile.am: Include compile.am.
360
3612000-08-10      Joel Sherrill <joel@OARcorp.com>
362
363        * ChangeLog: New file.
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