source: rtems/cpukit/score/cpu/mips/ChangeLog @ 9fd4f5c5

4.104.114.84.95
Last change on this file since 9fd4f5c5 was 9fd4f5c5, checked in by Joel Sherrill <joel.sherrill@…>, on Jan 3, 2001 at 4:35:08 PM

2001-01-03 Joel Sherrill <joel@…>

  • rtems/score/cpu.h: Added _CPU_Initialize_vectors().
  • cpu_asm.S: Eliminated warning for duplicate definition of EXTERN.
  • Property mode set to 100644
File size: 4.9 KB
Line 
12001-01-03      Joel Sherrill <joel@OARcorp.com>
2
3        * rtems/score/cpu.h: Added _CPU_Initialize_vectors().
4        * cpu_asm.S: Eliminated warning for duplicate definition of EXTERN.
5
62000-12-19      Joel Sherrill <joel@OARcorp.com>
7
8        * cpu_asm.S (_ISR_Handler): Return to the address in the EPC register.
9        Previous code resulting in the interrupted immediately returning
10        to the caller of the routine it was inside.
11
122000-12-19      Joel Sherrill <joel@OARcorp.com>
13
14        * cpu.c (_CPU_Initialize): Do not initialize _ISR_Vector_table() here
15        because it has not been allocated yet.
16
172000-12-13      Joel Sherrill <joel@OARcorp.com>
18
19        * cpu.c: Removed duplicate declaration for _ISR_Vector_table.
20        * cpu_asm.S: Removed assembly language to vector ISR handler
21        on MIPS ISA I.  Now call mips_vector_isr_handlers() in libcpu or BSP.
22        * rtems/score/cpu.h (CPU_INTERRUPT_NUMBER_OF_VECTORS): No
23        longer a constant -- get the real value from libcpu.
24
252000-12-13      Joel Sherrill <joel@OARcorp.com>
26
27        * cpu_asm.h: Removed.
28        * Makefile.am: Remove cpu_asm.h.
29        * rtems/score/mips64orion.h: Renamed mips.h.
30        * rtems/score/mips.h: New file, formerly mips64orion.h.
31        Header rewritten.
32        (mips_get_sr, mips_set_sr, mips_enable_in_interrupt_mask,
33        mips_disable_in_interrupt_mask): New macros.
34        * rtems/score/Makefile.am: Reflect renaming mips64orion.h.
35        * asm.h: Include <mips.h> not <mips64orion.h>. Now includes the
36        few defines that were in <cpu_asm.h>.
37        * cpu.c (_CPU_ISR_Get_level): Added MIPS ISA I version of this routine.
38        MIPS ISA 3 is still in assembly for now.
39        (_CPU_Thread_Idle_body): Rewrote in C.
40        * cpu_asm.S: Rewrote file header.
41        (FRAME,ENDFRAME) now in asm.h.
42        (_CPU_ISR_Get_level): Removed ISA I version and rewrote in C.
43        (_CPU_ISR_Set_level): Removed ISA I version and rewrote in C.
44        (_CPU_Context_switch): MIPS ISA I now manages preserves SR_IEC and
45        leaves other bits in SR alone on task switch.
46        (mips_enable_interrupts,mips_disable_interrupts,
47        mips_enable_global_interrupts,mips_disable_global_interrupts,
48        disable_int, enable_int): Removed.
49        (mips_get_sr): Rewritten as C macro.
50        (_CPU_Thread_Idle_body): Rewritten in C.
51        (init_exc_vecs): Rewritten in C as mips_install_isr_entries() and
52        placed in libcpu.
53        (exc_tlb_code, exc_xtlb_code, exc_cache_code, exc_norm_code): Moved
54        to libcpu/mips/shared/interrupts.
55        (general): Cleaned up comment blocks and #if 0 areas.
56        * idtcpu.h: Made ifdef report an error.
57        * iregdef.h: Removed warning.
58        * rtems/score/cpu.h (CPU_INTERRUPT_NUMBER_OF_VECTORS): Now a variable
59        number defined by libcpu.
60        (_CPU_ISR_Disable, _CPU_ISR_Enable): Rewritten to use new routines
61        to access SR.
62        (_CPU_ISR_Set_level): Rewritten as macro for ISA I.
63        (_CPU_Context_Initialize): Honor ISR level in task initialization.
64        (_CPU_Fatal_halt): Use new _CPU_ISR_Disable() macro.
65
662000-12-06      Joel Sherrill <joel@OARcorp.com>
67
68        * rtems/score/cpu.h: When mips ISA level is 1, registers in the
69        context should be 32 not 64 bits.
70
712000-11-30      Joel Sherrill <joel@OARcorp.com>
72
73        * cpu_asm.S: Changed "_CPU_Ccontext_switch_restore: typo to
74        correct name of _CPU_Context_switch_restore.  Added dummy
75        version of exc_utlb_code() so applications would link.
76
772000-11-09      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
78
79        * Makefile.am: Use ... instead of RTEMS_TOPdir in ACLOCAL_AMFLAGS.
80
812000-11-02      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
82
83        * Makefile.am: Switch to ACLOCAL_AMFLAGS = -I $(RTEMS_TOPdir)/aclocal.
84
852000-10-25      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
86
87        * Makefile.am: ACLOCAL_AMFLAGS= -I $(RTEMS_TOPdir)/macros.
88        Switch to GNU canonicalization.
89
902000-10-24      Alan Cudmore <alanc@linuxstart.com> and
91        Joel Sherrill <joel@OARcorp.com>
92
93        * This is a major reworking of the mips64orion port to use
94        gcc predefines as much as possible and a big push to multilib
95        the mips port.  The mips64orion port was copied/renamed to mips
96        to be more like other GNU tools.  Alan did most of the technical
97        work of determining how to map old macro names used by the mips64orion
98        port to standard compiler macro definitions.  Joel did the merge
99        with CVS magic to keep individual file history and did the BSP
100        modifications. Details follow:
101        * Makefile.am: idtmon.h in mips64orion port not present.
102        * asm.h: MIPS64ORION replaced with MIPS. Frame setup macros added.
103        * cpu.c: Comments added.
104        * cpu_asm.S: Conditionals changed.  MIPS ISA level 1 support added.
105        First attempt at exception/interrupt processing for ISA level 1
106        and minus any use of IDT/MON added.
107        * idtcpu.h: Conditionals changed to use gcc predefines.
108        * iregdef.h: Ditto.
109        * cpu_asm.h: No real change.  Merger required commit.
110        * rtems/Makefile.am: Ditto.
111        * rtems/score/Makefile.am: Ditto.
112        * rtems/score/cpu.h: Change MIPS64ORION to MIPS.
113        * rtems/score/mips64orion.h: Change MIPS64ORION to MIPS.  Convert
114        from using RTEMS_CPU_MODEL to gcc predefines to figre things out.
115
1162000-09-04      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
117
118        * Makefile.am: Include compile.am.
119
1202000-08-10      Joel Sherrill <joel@OARcorp.com>
121
122        * ChangeLog: New file.
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