source: rtems/cpukit/score/cpu/mips/ChangeLog @ 8fab7fa9

4.104.114.84.95
Last change on this file since 8fab7fa9 was 8fab7fa9, checked in by Ralf Corsepius <ralf.corsepius@…>, on 02/19/05 at 06:30:55

Cosmetics.
  • Property mode set to 100644
File size: 16.4 KB
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12005-02-08      Ralf Corsepius <ralf.corsepius@rtems.org>
2
3        * Makefile.am: Split out preinstallation rules.
4        * preinstall.am: New (Split out from Makefile.am).
5
62005-02-04      Ralf Corsepius <ralf.corsepius@rtems.org>
7
8        * rtems/mips/idtcpu.h, rtems/mips/iregdef.h, rtems/score/mips.h:
9        Header guards cleanup.
10
112005-02-04      Ralf Corsepius <ralf.corsepius@rtems.org>
12
13        PR 754/rtems
14        * rtems/asm.h: New (relocated from .).
15        * asm.h: Remove (moved to rtems/asm.h).
16        * Makefile.am: Reflect changes above.
17
182005-02-01      Ralf Corsepius <ralf.corsepius@rtems.org>
19
20        PR rtems/752
21        * rtems/mips/idtcpu.h rtems/mips/iregdef.h: New (relocated from .).
22        New header guards.
23        * idtcpu.h, iregdef.h: Remove.
24        * Makefile.am: Reflect changes above.
25
262004-01-28      Ralf Corsepius <ralf.corsepiu@rtems.org>
27
28        * asm.h, rtems/score/cpu.h, rtems/score/mips.h, rtems/score/types.h:
29        New header guards.
30
312005-01-24      Ralf Corsepius <ralf.corsepius@rtems.org>
32
33        * rtems/score/types.h: Remove signed8, signed16, signed32,
34        unsigned8, unsigned16, unsigned32.
35
362005-01-24      Ralf Corsepius <ralf.corsepius@rtems.org>
37
38        * rtems/score/cpu.h: *_swap_u32( uint32_t ).
39
402005-01-24      Ralf Corsepius <ralf.corsepius@rtems.org>
41
42        * rtems/score/types.h: #include <rtems/stdint.h>.
43
442005-01-07      Joel Sherrill <joel@OARcorp.com>
45
46        * rtems/score/cpu.h: Remove warnings.
47
482005-01-07      Ralf Corsepius <ralf.corsepius@rtems.org>
49
50        * Makefile.am: Eliminate CFLAGS_OPTIMIZE_V.
51
522005-01-03      Greg Menke <gregory.menke@gsfc.nasa.gov>
53
54        PR 739
55        * iregdef.h: Fixes gcc warning about redundant definition of R_SZ
56        when compiling cpu_asm.S.  Problem was a #define sneaked in in
57        version 1.11, no ill effects would have only affected R4000
58        builds.
59
602005-01-03      Greg Menke <gregory.menke@gsfc.nasa.gov>
61
62        PR 737
63        * cpu_asm.S: Fixes gcc warning about instructions in branch delay
64        slot when compiling cpu_asm.S
65
662005-01-01      Ralf Corsepius <ralf.corsepius@rtems.org>
67
68        * Makefile.am: Remove build-variant support.
69
702004-12-02      Greg Menke <gregory.menke@gsfc.nasa.gov>
71
72        PR 730
73        * cpu_asm.S: Collected PR 601 changes for commit to cvshead
74        for rtems-4.7.
75
762004-04-09      Joel Sherrill <joel@OARcorp.com>
77
78        PR 605/bsps
79        * cpu.c: Do not use C++ style comments.
80
812004-04-07      Greg Menke <gregory.menke@gsfc.nasa.gov>
82        PR 601
83        * cpu_asm.S: Added __mips==32 support for R4000 processors running
84        32 bit code.  Fixed #define problems that caused fpu code to
85        always be included even when no fpu is present.
86
872004-04-03      Art Ferrer <arturo.b.ferrer@nasa.gov>
88
89        PR 598/bsps
90        * cpu_asm.S, rtems/score/cpu.h: Add save of floating point
91        status/control register on context switches. Missing this register
92        was causing intermittent floating point errors.
93
942003-09-04      Joel Sherrill <joel@OARcorp.com>
95
96        * cpu.c, cpu_asm.S, rtems/score/cpu.h, rtems/score/mips.h,
97        rtems/score/types.h: URL for license changed.
98
992003-08-11      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
100
101        * configure.ac: Use rtems-bugs@rtems.com as bug report email address.
102
1032003-03-06      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
104
105        * configure.ac: Remove AC_CONFIG_AUX_DIR.
106
1072002-12-11      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
108
109        * configure.ac: Require autoconf-2.57 + automake-1.7.2.
110        * Makefile.am: Eliminate C_O_FILES, S_O_FILES, libscorecpu_a_OBJECTS.
111
1122002-11-19      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
113
114        * configure.ac: Fix package name.
115
1162002-11-04      Joel Sherrill <joel@OARcorp.com>
117
118        * idtcpu.h: Removed warning.
119
1202002-11-01      Joel Sherrill <joel@OARcorp.com>
121
122        * idtcpu.h: Removed warnings.
123
1242002-10-28      Joel Sherrill <joel@OARcorp.com>
125
126        * idtcpu.h: Removed warning by turning extra token at the end of
127        an endif into a comment.
128
1292002-10-25      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
130
131        * configure.ac: Add nostdinc to AM_INIT_AUTOMAKE.
132
1332002-10-21      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
134
135        * .cvsignore: Reformat.
136        Add autom4te*cache.
137        Remove autom4te.cache.
138
1392002-08-14      Greg Menke <gregory.menke@gsfc.nasa.gov>
140
141        * cpu_asm.S: Clarified some comments, removed code that forced
142        SR_IEP on when returning from an interrupt.
143
1442002-06-27      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
145
146        * configure.ac: Add RTEMS_PROG_CCAS
147
1482002-06-27      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
149
150        * configure.ac: Use AC_CONFIG_AUX_DIR(../../../..).
151        Add AC_PROG_RANLIB.
152
1532002-06-20      Greg Menke <gregory.menke@gsfc.nasa.gov>
154        * cpu_asm.S: Added SR_IEO to context restore to fix isr disabled
155        deadlock caused by interrupt arriving while dispatching.
156       
1572002-06-17      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
158
159        * Makefile.am: Include $(top_srcdir)/../../../automake/*.am.
160        Use ../../../aclocal.
161
1622001-04-03      Joel Sherrill <joel@OARcorp.com>
163
164        * Per PR94, all rtems/score/CPUtypes.h are named rtems/score/types.h.
165        * rtems/score/mipstypes.h: Removed.
166        * rtems/score/types.h: New file via CVS magic.
167        * Makefile.am, rtems/score/cpu.h: Account for name change.
168
1692002-03-27      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
170
171        * configure.ac:
172        AC_INIT(package,_RTEMS_VERSION,_RTEMS_BUGS).
173        AM_INIT_AUTOMAKE([no-define foreign 1.6]).
174        * Makefile.am: Remove AUTOMAKE_OPTIONS.
175
1762002-03-20      Greg Menke <gregory.menke@gsfc.nasa.gov>
177
178        * cpu_asm.S: Now compiles on 4600 and 4650.
179
1802002-03-13      Greg Menke <gregory.menke@gsfc.nasa.gov>
181
182        * cpu_asm.S: Fixed a sneaky return from int w/ ints disabled bug.
183        * rtems/score/cpu.h: Fixed register numbering in comments and made
184        interrupt enable/disable more robust.
185       
1862002-03-05      Greg Menke <gregory.menke@gsfc.nasa.gov>
187        * cpu_asm.S: Added support for the debug exception vector, cleaned
188        up the exception processing & exception return stuff.  Re-added
189        EPC in the task context structure so the gdb stub will know where
190        a thread is executing.  Should've left it there in the first place...
191        * idtcpu.h: Added support for the debug exception vector.
192        * cpu.c: Added ___exceptionTaskStack to hold a pointer to the
193        stack frame in an interrupt so context switch code can get the
194        userspace EPC when scheduling.
195        * rtems/score/cpu.h: Re-added EPC to the task context.
196
1972002-02-27      Greg Menke <gregory.menke@gsfc.nasa.gov>
198
199        * cpu_asm.S: Fixed exception return address, modified FP context
200        switch so FPU is properly enabled and also doesn't screw up the
201        exception FP handling.
202        * idtcpu.h: Added C0_TAR, the MIPS target address register used for
203        returning from exceptions.
204        * iregdef.h: Added R_TAR to the stack frame so the target address
205        can be saved on a per-exception basis.  The new entry is past the
206        end of the frame gdb cares about, so doesn't affect gdb or cpu.h
207        stuff.
208        * rtems/score/cpu.h: added an #ifdef so cpu_asm.S can include it
209        to obtain FPU defines without syntax errors generated by the C
210        defintions.
211        * cpu.c: Improved interrupt level saves & restores.
212       
2132002-02-08      Joel Sherrill <joel@OARcorp.com>
214
215        * iregdef.h, rtems/score/cpu.h: Reordered register in the
216        exception stack frame to better match gdb's expectations.
217
2182001-02-05      Joel Sherrill <joel@OARcorp.com>
219
220        * cpu_asm.S: Enhanced to save/restore more registers on
221        exceptions.
222        * rtems/score/cpu.h (CPU_Interrupt_frame): Enhanced to list every
223        register individually and document when it is saved.
224        * idtcpu.h: Added constants for the coprocessor 1 registers
225        revision and status.
226
2272001-02-05      Joel Sherrill <joel@OARcorp.com>
228
229        * rtems/Makefile.am, rtems/score/Makefile.am: Removed again.
230
2312001-02-04      Joel Sherrill <joel@OARcorp.com>
232
233        * rtems/score/cpu.h: IDLE task should not be FP.  This was a mistake
234        in the previous patch that has now been confirmed.
235
2362001-02-01      Greg Menke <gregory.menke@gsfc.nasa.gov>
237
238        * cpu.c: Enhancements and fixes for modifying the SR when changing
239        the interrupt level.
240        * cpu_asm.S: Fixed handling of FP enable bit so it is properly
241        managed on a per-task basis, improved handling of interrupt levels,
242        and made deferred FP contexts work on the MIPS.
243        * rtems/score/cpu.h: Modified to support above changes.
244
2452002-01-28      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
246
247        * rtems/Makefile.am: Removed.
248        * rtems/score/Makefile.am: Removed.
249        * configure.ac: Reflect changes above.
250        * Makefile.am: Reflect changes above.
251
2522002-02-09      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
253
254        * asm.h: Remove #include <rtems/score/targopts.h>.
255        Add #include <rtems/score/cpuopts.h>.
256        * configure.ac: Remove RTEMS_CHECK_CUSTOM_BSP(RTEMS_BSP).
257
258
2592001-12-20      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
260
261        * configure.ac: Use RTEMS_ENV_RTEMSCPU.
262
2632001-12-19      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
264
265        * Makefile.am: Add multilib support.
266
2672001-11-28      Joel Sherrill <joel@OARcorp.com>,
268
269        This was tracked as PR91.
270        * rtems/score/cpu.h: Added CPU_PROVIDES_ISR_IS_IN_PROGRESS macro which
271        is used to specify if the port uses the standard macro for this (FALSE).
272        A TRUE setting indicates the port provides its own implementation.
273
2742001-10-12      Joel Sherrill <joel@OARcorp.com>
275
276        * cpu_asm.S: _CPU_Context_save_fp in was incorrectly in conditional
277        compilation block with (CPU_HARDWARE_FP == FALSE).  Reported by
278        Wayne Bullaughey <wayne@wmi.com>.
279
2802001-10-11      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
281
282        * .cvsignore: Add autom4te.cache for autoconf > 2.52.
283        * configure.in: Remove.
284        * configure.ac: New file, generated from configure.in by autoupdate.
285
2862001-09-23      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
287
288        * rtems/score/Makefile.am: Use 'PREINSTALL_FILES ='.
289        * Makefile.am: Use 'PREINSTALL_FILES ='.
290
2912001-07-03      Joel Sherrill <joel@OARcorp.com>
292
293        * cpu.c: Fixed typo.
294
2952000-05-24      Joel Sherrill <joel@OARcorp.com>
296
297        * rtems/score/mips.h: Added constants for MIPS exception numbers.
298        All exceptions should be given low numbers and thus can be installed
299        and processed in a uniform manner.  Variances between various MIPS
300        ISA levels were not accounted for.
301
3022001-05-24      Greg Menke <gregory.menke@gsfc.nasa.gov>
303
304        * Assisted in design and debug by Joel Sherrill <joel@OARcorp.com>.
305        * cpu_asm.S: Now works on Mongoose-V.  Missed in previous patch.
306
3072001-05-22      Greg Menke <gregory.menke@gsfc.nasa.gov>
308
309        * rtems/score/cpu.h: Add the interrupt stack structure and enhance
310        the context initialization to account for floating point tasks. 
311        * rtems/score/mips.h: Added the routines mips_set_cause(),
312        mips_get_fcr31(), and mips_set_fcr31().
313        * Assisted in design and debug by Joel Sherrill <joel@OARcorp.com>.
314
3152001-05-07      Joel Sherrill <joel@OARcorp.com>
316
317        * cpu_asm.S: Merged patches from Gregory Menke
318        <Gregory.D.Menke.1@gsfc.nasa.gov> that clean up
319        stack usage and include nops in the delay slots.
320
3212001-04-20      Joel Sherrill <joel@OARcorp.com>
322
323        * cpu_asm.S: Added code to save and restore SR and EPC to
324        properly support nested interrupts.  Note that the ISR
325        (not RTEMS) enables interrupts allowing the nesting to occur.
326
3272001-03-14      Joel Sherrill <joel@OARcorp.com>
328
329        * cpu.c, rtems/score/cpu.h, rtems/score/mipstypes.h:
330        Removed unused variable _CPU_Thread_dispatch_pointer
331        and cleaned numerous comments.
332       
3332001-03-13      Joel Sherrill <joel@OARcorp.com>
334
335        * cpu.c, cpu_asm.S, iregdef.h, rtems/score/cpu.h, rtems/score/mips.h:
336        Merged MIPS1 and MIPS3 code reducing the number of lines of assembly.
337        Also reimplemented some assembly routines in C further reducing
338        the amount of assembly and increasing maintainability.
339
3402001-02-04      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
341
342        * Makefile.am, rtems/score/Makefile.am:
343        Apply include_*HEADERS instead of H_FILES.
344
3452001-01-12      Joel Sherrill <joel@OARcorp.com>
346
347        * rtems/score/mips.h (mips_get_sr, mips_set_sr): Corrected
348        register constraints from "general" to "register".
349
3502001-01-09      Joel Sherrill <joel@OARcorp.com>
351
352        * cpu_asm.S: Use SR_INTERRUPT_ENABLE_BITS instead of SR_XXX constants
353        to make it easier to conditionalize the code for various ISA levels.
354
3552001-01-08      Joel Sherrill <joel@OARcorp.com>
356
357        * idtcpu.h: Commented out definition of "wait".  It was stupid to
358        use such a common word as a macro.
359        * rtems/score/cpu.h (_CPU_ISR_Disable): Fixed for mips ISA 3.
360        * rtems/score/mips.h: Added include of <idtcpu.h>.
361        * rtems/score/mips.h (mips_enable_in_interrupt_mask): Corrected.
362
3632001-01-03      Joel Sherrill <joel@OARcorp.com>
364
365        * rtems/score/cpu.h: Added _CPU_Initialize_vectors().
366        * cpu_asm.S: Eliminated warning for duplicate definition of EXTERN.
367
3682000-12-19      Joel Sherrill <joel@OARcorp.com>
369
370        * cpu_asm.S (_ISR_Handler): Return to the address in the EPC register.
371        Previous code resulting in the interrupted immediately returning
372        to the caller of the routine it was inside.
373
3742000-12-19      Joel Sherrill <joel@OARcorp.com>
375
376        * cpu.c (_CPU_Initialize): Do not initialize _ISR_Vector_table() here
377        because it has not been allocated yet.
378
3792000-12-13      Joel Sherrill <joel@OARcorp.com>
380
381        * cpu.c: Removed duplicate declaration for _ISR_Vector_table.
382        * cpu_asm.S: Removed assembly language to vector ISR handler
383        on MIPS ISA I.  Now call mips_vector_isr_handlers() in libcpu or BSP.
384        * rtems/score/cpu.h (CPU_INTERRUPT_NUMBER_OF_VECTORS): No
385        longer a constant -- get the real value from libcpu.
386
3872000-12-13      Joel Sherrill <joel@OARcorp.com>
388
389        * cpu_asm.h: Removed.
390        * Makefile.am: Remove cpu_asm.h.
391        * rtems/score/mips64orion.h: Renamed mips.h.
392        * rtems/score/mips.h: New file, formerly mips64orion.h.
393        Header rewritten.
394        (mips_get_sr, mips_set_sr, mips_enable_in_interrupt_mask,
395        mips_disable_in_interrupt_mask): New macros.
396        * rtems/score/Makefile.am: Reflect renaming mips64orion.h.
397        * asm.h: Include <mips.h> not <mips64orion.h>. Now includes the
398        few defines that were in <cpu_asm.h>.
399        * cpu.c (_CPU_ISR_Get_level): Added MIPS ISA I version of this routine.
400        MIPS ISA 3 is still in assembly for now.
401        (_CPU_Thread_Idle_body): Rewrote in C.
402        * cpu_asm.S: Rewrote file header.
403        (FRAME,ENDFRAME) now in asm.h.
404        (_CPU_ISR_Get_level): Removed ISA I version and rewrote in C.
405        (_CPU_ISR_Set_level): Removed ISA I version and rewrote in C.
406        (_CPU_Context_switch): MIPS ISA I now manages preserves SR_IEC and
407        leaves other bits in SR alone on task switch.
408        (mips_enable_interrupts,mips_disable_interrupts,
409        mips_enable_global_interrupts,mips_disable_global_interrupts,
410        disable_int, enable_int): Removed.
411        (mips_get_sr): Rewritten as C macro.
412        (_CPU_Thread_Idle_body): Rewritten in C.
413        (init_exc_vecs): Rewritten in C as mips_install_isr_entries() and
414        placed in libcpu.
415        (exc_tlb_code, exc_xtlb_code, exc_cache_code, exc_norm_code): Moved
416        to libcpu/mips/shared/interrupts.
417        (general): Cleaned up comment blocks and #if 0 areas.
418        * idtcpu.h: Made ifdef report an error.
419        * iregdef.h: Removed warning.
420        * rtems/score/cpu.h (CPU_INTERRUPT_NUMBER_OF_VECTORS): Now a variable
421        number defined by libcpu.
422        (_CPU_ISR_Disable, _CPU_ISR_Enable): Rewritten to use new routines
423        to access SR.
424        (_CPU_ISR_Set_level): Rewritten as macro for ISA I.
425        (_CPU_Context_Initialize): Honor ISR level in task initialization.
426        (_CPU_Fatal_halt): Use new _CPU_ISR_Disable() macro.
427
4282000-12-06      Joel Sherrill <joel@OARcorp.com>
429
430        * rtems/score/cpu.h: When mips ISA level is 1, registers in the
431        context should be 32 not 64 bits.
432
4332000-11-30      Joel Sherrill <joel@OARcorp.com>
434
435        * cpu_asm.S: Changed "_CPU_Ccontext_switch_restore: typo to
436        correct name of _CPU_Context_switch_restore.  Added dummy
437        version of exc_utlb_code() so applications would link.
438
4392000-11-09      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
440
441        * Makefile.am: Use ... instead of RTEMS_TOPdir in ACLOCAL_AMFLAGS.
442
4432000-11-02      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
444
445        * Makefile.am: Switch to ACLOCAL_AMFLAGS = -I $(RTEMS_TOPdir)/aclocal.
446
4472000-10-25      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
448
449        * Makefile.am: ACLOCAL_AMFLAGS= -I $(RTEMS_TOPdir)/macros.
450        Switch to GNU canonicalization.
451
4522000-10-24      Alan Cudmore <alanc@linuxstart.com> and
453        Joel Sherrill <joel@OARcorp.com>
454
455        * This is a major reworking of the mips64orion port to use
456        gcc predefines as much as possible and a big push to multilib
457        the mips port.  The mips64orion port was copied/renamed to mips
458        to be more like other GNU tools.  Alan did most of the technical
459        work of determining how to map old macro names used by the mips64orion
460        port to standard compiler macro definitions.  Joel did the merge
461        with CVS magic to keep individual file history and did the BSP
462        modifications. Details follow:
463        * Makefile.am: idtmon.h in mips64orion port not present.
464        * asm.h: MIPS64ORION replaced with MIPS. Frame setup macros added.
465        * cpu.c: Comments added.
466        * cpu_asm.S: Conditionals changed.  MIPS ISA level 1 support added.
467        First attempt at exception/interrupt processing for ISA level 1
468        and minus any use of IDT/MON added.
469        * idtcpu.h: Conditionals changed to use gcc predefines.
470        * iregdef.h: Ditto.
471        * cpu_asm.h: No real change.  Merger required commit.
472        * rtems/Makefile.am: Ditto.
473        * rtems/score/Makefile.am: Ditto.
474        * rtems/score/cpu.h: Change MIPS64ORION to MIPS.
475        * rtems/score/mips64orion.h: Change MIPS64ORION to MIPS.  Convert
476        from using RTEMS_CPU_MODEL to gcc predefines to figre things out.
477
4782000-09-04      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
479
480        * Makefile.am: Include compile.am.
481
4822000-08-10      Joel Sherrill <joel@OARcorp.com>
483
484        * ChangeLog: New file.
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