source: rtems/cpukit/score/cpu/mips/ChangeLog @ 7fccd6d6

4.104.114.84.95
Last change on this file since 7fccd6d6 was 7fccd6d6, checked in by Ralf Corsepius <ralf.corsepius@…>, on 12/12/03 at 13:02:24

2003-12-12 Ralf Corsepius <corsepiu@…>

  • Makefile.am: Use mkdir_p. Remove dirs from PREINSTALL_FILES.
  • Property mode set to 100644
File size: 14.7 KB
Line 
12003-12-12      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
2
3        * Makefile.am: Use mkdir_p. Remove dirs from PREINSTALL_FILES.
4
52003-12-12      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
6
7        * configure.ac: Require automake >= 1.8, autoconf >= 2.59.
8
92003-12-01      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
10
11        * Makefile.am: Remove TMPINSTALL_FILES.
12
132003-11-30      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
14
15        * Makefile.am: Add $(dirstamp) to preinstallation rules.
16
172003-11-23      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
18
19        * Makefile.am: Don't use gmake rules for preinstallation.
20
212003-10-21      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
22
23        * configure.ac: Remove RTEMS_CANONICAL_HOST.
24
252003-10-21      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
26
27        * configure.ac: Remove RTEMS_CHECK_CPU.
28
292003-09-26      Joel Sherrill <joel@OARcorp.com>
30
31        * rtems/score/cpu.h: Obsoleting HP PA-RISC port and removing all
32        references.
33
342003-09-04      Joel Sherrill <joel@OARcorp.com>
35
36        * cpu.c, cpu_asm.S, rtems/score/cpu.h, rtems/score/mips.h,
37        rtems/score/types.h: URL for license changed.
38
392003-08-11      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
40
41        * configure.ac: Use rtems-bugs@rtems.com as bug report email address.
42
432003-03-06      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
44
45        * configure.ac: Remove AC_CONFIG_AUX_DIR.
46
472002-12-11      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
48
49        * configure.ac: Require autoconf-2.57 + automake-1.7.2.
50        * Makefile.am: Eliminate C_O_FILES, S_O_FILES, libscorecpu_a_OBJECTS.
51
522002-11-19      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
53
54        * configure.ac: Fix package name.
55
562002-11-04      Joel Sherrill <joel@OARcorp.com>
57
58        * idtcpu.h: Removed warning.
59
602002-11-01      Joel Sherrill <joel@OARcorp.com>
61
62        * idtcpu.h: Removed warnings.
63
642002-10-28      Joel Sherrill <joel@OARcorp.com>
65
66        * idtcpu.h: Removed warning by turning extra token at the end of
67        an endif into a comment.
68
692002-10-25      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
70
71        * configure.ac: Add nostdinc to AM_INIT_AUTOMAKE.
72
732002-10-21      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
74
75        * .cvsignore: Reformat.
76        Add autom4te*cache.
77        Remove autom4te.cache.
78
792002-08-14      Greg Menke <gregory.menke@gsfc.nasa.gov>
80
81        * cpu_asm.S: Clarified some comments, removed code that forced
82        SR_IEP on when returning from an interrupt.
83
842002-06-27      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
85
86        * configure.ac: Add RTEMS_PROG_CCAS
87
882002-06-27      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
89
90        * configure.ac: Use AC_CONFIG_AUX_DIR(../../../..).
91        Add AC_PROG_RANLIB.
92
932002-06-20      Greg Menke <gregory.menke@gsfc.nasa.gov>
94        * cpu_asm.S: Added SR_IEO to context restore to fix isr disabled
95        deadlock caused by interrupt arriving while dispatching.
96       
972002-06-17      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
98
99        * Makefile.am: Include $(top_srcdir)/../../../automake/*.am.
100        Use ../../../aclocal.
101
1022001-04-03      Joel Sherrill <joel@OARcorp.com>
103
104        * Per PR94, all rtems/score/CPUtypes.h are named rtems/score/types.h.
105        * rtems/score/mipstypes.h: Removed.
106        * rtems/score/types.h: New file via CVS magic.
107        * Makefile.am, rtems/score/cpu.h: Account for name change.
108
1092002-03-27      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
110
111        * configure.ac:
112        AC_INIT(package,_RTEMS_VERSION,_RTEMS_BUGS).
113        AM_INIT_AUTOMAKE([no-define foreign 1.6]).
114        * Makefile.am: Remove AUTOMAKE_OPTIONS.
115
1162002-03-20      Greg Menke <gregory.menke@gsfc.nasa.gov>
117
118        * cpu_asm.S: Now compiles on 4600 and 4650.
119
1202002-03-13      Greg Menke <gregory.menke@gsfc.nasa.gov>
121
122        * cpu_asm.S: Fixed a sneaky return from int w/ ints disabled bug.
123        * rtems/score/cpu.h: Fixed register numbering in comments and made
124        interrupt enable/disable more robust.
125       
1262002-03-05      Greg Menke <gregory.menke@gsfc.nasa.gov>
127        * cpu_asm.S: Added support for the debug exception vector, cleaned
128        up the exception processing & exception return stuff.  Re-added
129        EPC in the task context structure so the gdb stub will know where
130        a thread is executing.  Should've left it there in the first place...
131        * idtcpu.h: Added support for the debug exception vector.
132        * cpu.c: Added ___exceptionTaskStack to hold a pointer to the
133        stack frame in an interrupt so context switch code can get the
134        userspace EPC when scheduling.
135        * rtems/score/cpu.h: Re-added EPC to the task context.
136
1372002-02-27      Greg Menke <gregory.menke@gsfc.nasa.gov>
138
139        * cpu_asm.S: Fixed exception return address, modified FP context
140        switch so FPU is properly enabled and also doesn't screw up the
141        exception FP handling.
142        * idtcpu.h: Added C0_TAR, the MIPS target address register used for
143        returning from exceptions.
144        * iregdef.h: Added R_TAR to the stack frame so the target address
145        can be saved on a per-exception basis.  The new entry is past the
146        end of the frame gdb cares about, so doesn't affect gdb or cpu.h
147        stuff.
148        * rtems/score/cpu.h: added an #ifdef so cpu_asm.S can include it
149        to obtain FPU defines without syntax errors generated by the C
150        defintions.
151        * cpu.c: Improved interrupt level saves & restores.
152       
1532002-02-08      Joel Sherrill <joel@OARcorp.com>
154
155        * iregdef.h, rtems/score/cpu.h: Reordered register in the
156        exception stack frame to better match gdb's expectations.
157
1582001-02-05      Joel Sherrill <joel@OARcorp.com>
159
160        * cpu_asm.S: Enhanced to save/restore more registers on
161        exceptions.
162        * rtems/score/cpu.h (CPU_Interrupt_frame): Enhanced to list every
163        register individually and document when it is saved.
164        * idtcpu.h: Added constants for the coprocessor 1 registers
165        revision and status.
166
1672001-02-05      Joel Sherrill <joel@OARcorp.com>
168
169        * rtems/Makefile.am, rtems/score/Makefile.am: Removed again.
170
1712001-02-04      Joel Sherrill <joel@OARcorp.com>
172
173        * rtems/score/cpu.h: IDLE task should not be FP.  This was a mistake
174        in the previous patch that has now been confirmed.
175
1762001-02-01      Greg Menke <gregory.menke@gsfc.nasa.gov>
177
178        * cpu.c: Enhancements and fixes for modifying the SR when changing
179        the interrupt level.
180        * cpu_asm.S: Fixed handling of FP enable bit so it is properly
181        managed on a per-task basis, improved handling of interrupt levels,
182        and made deferred FP contexts work on the MIPS.
183        * rtems/score/cpu.h: Modified to support above changes.
184
1852002-01-28      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
186
187        * rtems/Makefile.am: Removed.
188        * rtems/score/Makefile.am: Removed.
189        * configure.ac: Reflect changes above.
190        * Makefile.am: Reflect changes above.
191
1922002-02-09      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
193
194        * asm.h: Remove #include <rtems/score/targopts.h>.
195        Add #include <rtems/score/cpuopts.h>.
196        * configure.ac: Remove RTEMS_CHECK_CUSTOM_BSP(RTEMS_BSP).
197
198
1992001-12-20      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
200
201        * configure.ac: Use RTEMS_ENV_RTEMSCPU.
202
2032001-12-19      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
204
205        * Makefile.am: Add multilib support.
206
2072001-11-28      Joel Sherrill <joel@OARcorp.com>,
208
209        This was tracked as PR91.
210        * rtems/score/cpu.h: Added CPU_PROVIDES_ISR_IS_IN_PROGRESS macro which
211        is used to specify if the port uses the standard macro for this (FALSE).
212        A TRUE setting indicates the port provides its own implementation.
213
2142001-10-12      Joel Sherrill <joel@OARcorp.com>
215
216        * cpu_asm.S: _CPU_Context_save_fp in was incorrectly in conditional
217        compilation block with (CPU_HARDWARE_FP == FALSE).  Reported by
218        Wayne Bullaughey <wayne@wmi.com>.
219
2202001-10-11      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
221
222        * .cvsignore: Add autom4te.cache for autoconf > 2.52.
223        * configure.in: Remove.
224        * configure.ac: New file, generated from configure.in by autoupdate.
225
2262001-09-23      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
227
228        * rtems/score/Makefile.am: Use 'PREINSTALL_FILES ='.
229        * Makefile.am: Use 'PREINSTALL_FILES ='.
230
2312001-07-03      Joel Sherrill <joel@OARcorp.com>
232
233        * cpu.c: Fixed typo.
234
2352000-05-24      Joel Sherrill <joel@OARcorp.com>
236
237        * rtems/score/mips.h: Added constants for MIPS exception numbers.
238        All exceptions should be given low numbers and thus can be installed
239        and processed in a uniform manner.  Variances between various MIPS
240        ISA levels were not accounted for.
241
2422001-05-24      Greg Menke <gregory.menke@gsfc.nasa.gov>
243
244        * Assisted in design and debug by Joel Sherrill <joel@OARcorp.com>.
245        * cpu_asm.S: Now works on Mongoose-V.  Missed in previous patch.
246
2472001-05-22      Greg Menke <gregory.menke@gsfc.nasa.gov>
248
249        * rtems/score/cpu.h: Add the interrupt stack structure and enhance
250        the context initialization to account for floating point tasks. 
251        * rtems/score/mips.h: Added the routines mips_set_cause(),
252        mips_get_fcr31(), and mips_set_fcr31().
253        * Assisted in design and debug by Joel Sherrill <joel@OARcorp.com>.
254
2552001-05-07      Joel Sherrill <joel@OARcorp.com>
256
257        * cpu_asm.S: Merged patches from Gregory Menke
258        <Gregory.D.Menke.1@gsfc.nasa.gov> that clean up
259        stack usage and include nops in the delay slots.
260
2612001-04-20      Joel Sherrill <joel@OARcorp.com>
262
263        * cpu_asm.S: Added code to save and restore SR and EPC to
264        properly support nested interrupts.  Note that the ISR
265        (not RTEMS) enables interrupts allowing the nesting to occur.
266
2672001-03-14      Joel Sherrill <joel@OARcorp.com>
268
269        * cpu.c, rtems/score/cpu.h, rtems/score/mipstypes.h:
270        Removed unused variable _CPU_Thread_dispatch_pointer
271        and cleaned numerous comments.
272       
2732001-03-13      Joel Sherrill <joel@OARcorp.com>
274
275        * cpu.c, cpu_asm.S, iregdef.h, rtems/score/cpu.h, rtems/score/mips.h:
276        Merged MIPS1 and MIPS3 code reducing the number of lines of assembly.
277        Also reimplemented some assembly routines in C further reducing
278        the amount of assembly and increasing maintainability.
279
2802001-02-04      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
281
282        * Makefile.am, rtems/score/Makefile.am:
283        Apply include_*HEADERS instead of H_FILES.
284
2852001-01-12      Joel Sherrill <joel@OARcorp.com>
286
287        * rtems/score/mips.h (mips_get_sr, mips_set_sr): Corrected
288        register constraints from "general" to "register".
289
2902001-01-09      Joel Sherrill <joel@OARcorp.com>
291
292        * cpu_asm.S: Use SR_INTERRUPT_ENABLE_BITS instead of SR_XXX constants
293        to make it easier to conditionalize the code for various ISA levels.
294
2952001-01-08      Joel Sherrill <joel@OARcorp.com>
296
297        * idtcpu.h: Commented out definition of "wait".  It was stupid to
298        use such a common word as a macro.
299        * rtems/score/cpu.h (_CPU_ISR_Disable): Fixed for mips ISA 3.
300        * rtems/score/mips.h: Added include of <idtcpu.h>.
301        * rtems/score/mips.h (mips_enable_in_interrupt_mask): Corrected.
302
3032001-01-03      Joel Sherrill <joel@OARcorp.com>
304
305        * rtems/score/cpu.h: Added _CPU_Initialize_vectors().
306        * cpu_asm.S: Eliminated warning for duplicate definition of EXTERN.
307
3082000-12-19      Joel Sherrill <joel@OARcorp.com>
309
310        * cpu_asm.S (_ISR_Handler): Return to the address in the EPC register.
311        Previous code resulting in the interrupted immediately returning
312        to the caller of the routine it was inside.
313
3142000-12-19      Joel Sherrill <joel@OARcorp.com>
315
316        * cpu.c (_CPU_Initialize): Do not initialize _ISR_Vector_table() here
317        because it has not been allocated yet.
318
3192000-12-13      Joel Sherrill <joel@OARcorp.com>
320
321        * cpu.c: Removed duplicate declaration for _ISR_Vector_table.
322        * cpu_asm.S: Removed assembly language to vector ISR handler
323        on MIPS ISA I.  Now call mips_vector_isr_handlers() in libcpu or BSP.
324        * rtems/score/cpu.h (CPU_INTERRUPT_NUMBER_OF_VECTORS): No
325        longer a constant -- get the real value from libcpu.
326
3272000-12-13      Joel Sherrill <joel@OARcorp.com>
328
329        * cpu_asm.h: Removed.
330        * Makefile.am: Remove cpu_asm.h.
331        * rtems/score/mips64orion.h: Renamed mips.h.
332        * rtems/score/mips.h: New file, formerly mips64orion.h.
333        Header rewritten.
334        (mips_get_sr, mips_set_sr, mips_enable_in_interrupt_mask,
335        mips_disable_in_interrupt_mask): New macros.
336        * rtems/score/Makefile.am: Reflect renaming mips64orion.h.
337        * asm.h: Include <mips.h> not <mips64orion.h>. Now includes the
338        few defines that were in <cpu_asm.h>.
339        * cpu.c (_CPU_ISR_Get_level): Added MIPS ISA I version of this routine.
340        MIPS ISA 3 is still in assembly for now.
341        (_CPU_Thread_Idle_body): Rewrote in C.
342        * cpu_asm.S: Rewrote file header.
343        (FRAME,ENDFRAME) now in asm.h.
344        (_CPU_ISR_Get_level): Removed ISA I version and rewrote in C.
345        (_CPU_ISR_Set_level): Removed ISA I version and rewrote in C.
346        (_CPU_Context_switch): MIPS ISA I now manages preserves SR_IEC and
347        leaves other bits in SR alone on task switch.
348        (mips_enable_interrupts,mips_disable_interrupts,
349        mips_enable_global_interrupts,mips_disable_global_interrupts,
350        disable_int, enable_int): Removed.
351        (mips_get_sr): Rewritten as C macro.
352        (_CPU_Thread_Idle_body): Rewritten in C.
353        (init_exc_vecs): Rewritten in C as mips_install_isr_entries() and
354        placed in libcpu.
355        (exc_tlb_code, exc_xtlb_code, exc_cache_code, exc_norm_code): Moved
356        to libcpu/mips/shared/interrupts.
357        (general): Cleaned up comment blocks and #if 0 areas.
358        * idtcpu.h: Made ifdef report an error.
359        * iregdef.h: Removed warning.
360        * rtems/score/cpu.h (CPU_INTERRUPT_NUMBER_OF_VECTORS): Now a variable
361        number defined by libcpu.
362        (_CPU_ISR_Disable, _CPU_ISR_Enable): Rewritten to use new routines
363        to access SR.
364        (_CPU_ISR_Set_level): Rewritten as macro for ISA I.
365        (_CPU_Context_Initialize): Honor ISR level in task initialization.
366        (_CPU_Fatal_halt): Use new _CPU_ISR_Disable() macro.
367
3682000-12-06      Joel Sherrill <joel@OARcorp.com>
369
370        * rtems/score/cpu.h: When mips ISA level is 1, registers in the
371        context should be 32 not 64 bits.
372
3732000-11-30      Joel Sherrill <joel@OARcorp.com>
374
375        * cpu_asm.S: Changed "_CPU_Ccontext_switch_restore: typo to
376        correct name of _CPU_Context_switch_restore.  Added dummy
377        version of exc_utlb_code() so applications would link.
378
3792000-11-09      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
380
381        * Makefile.am: Use ... instead of RTEMS_TOPdir in ACLOCAL_AMFLAGS.
382
3832000-11-02      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
384
385        * Makefile.am: Switch to ACLOCAL_AMFLAGS = -I $(RTEMS_TOPdir)/aclocal.
386
3872000-10-25      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
388
389        * Makefile.am: ACLOCAL_AMFLAGS= -I $(RTEMS_TOPdir)/macros.
390        Switch to GNU canonicalization.
391
3922000-10-24      Alan Cudmore <alanc@linuxstart.com> and
393        Joel Sherrill <joel@OARcorp.com>
394
395        * This is a major reworking of the mips64orion port to use
396        gcc predefines as much as possible and a big push to multilib
397        the mips port.  The mips64orion port was copied/renamed to mips
398        to be more like other GNU tools.  Alan did most of the technical
399        work of determining how to map old macro names used by the mips64orion
400        port to standard compiler macro definitions.  Joel did the merge
401        with CVS magic to keep individual file history and did the BSP
402        modifications. Details follow:
403        * Makefile.am: idtmon.h in mips64orion port not present.
404        * asm.h: MIPS64ORION replaced with MIPS. Frame setup macros added.
405        * cpu.c: Comments added.
406        * cpu_asm.S: Conditionals changed.  MIPS ISA level 1 support added.
407        First attempt at exception/interrupt processing for ISA level 1
408        and minus any use of IDT/MON added.
409        * idtcpu.h: Conditionals changed to use gcc predefines.
410        * iregdef.h: Ditto.
411        * cpu_asm.h: No real change.  Merger required commit.
412        * rtems/Makefile.am: Ditto.
413        * rtems/score/Makefile.am: Ditto.
414        * rtems/score/cpu.h: Change MIPS64ORION to MIPS.
415        * rtems/score/mips64orion.h: Change MIPS64ORION to MIPS.  Convert
416        from using RTEMS_CPU_MODEL to gcc predefines to figre things out.
417
4182000-09-04      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
419
420        * Makefile.am: Include compile.am.
421
4222000-08-10      Joel Sherrill <joel@OARcorp.com>
423
424        * ChangeLog: New file.
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