source: rtems/cpukit/score/cpu/mips/ChangeLog @ 3c64bac

4.104.114.84.95
Last change on this file since 3c64bac was 3c64bac, checked in by Ralf Corsepius <ralf.corsepius@…>, on 11/02/04 at 07:39:36

2004-10-02 Ralf Corsepius <ralf_corsepius@…>

  • rtems/score/cpu.h: Add doxygen preamble.
  • rtems/score/mips.h: Add doxygen preamble.
  • rtems/score/types.h: Add doxygen preamble.
  • Property mode set to 100644
File size: 17.3 KB
Line 
12004-10-02      Ralf Corsepius <ralf_corsepius@rtems.org>
2
3        * rtems/score/cpu.h: Add doxygen preamble.
4        * rtems/score/mips.h: Add doxygen preamble.
5        * rtems/score/types.h: Add doxygen preamble.
6
72004-09-29      Joel Sherrill <joel@OARcorp.com>
8
9        * rtems/score/cpu.h: i960 obsoleted and all references removed.
10
112004-07-25      Joel Sherrill <joel@OARcorp.com>
12
13        * cpu_asm.S: Remove use of C++ style comments and make this compile
14        again.
15
162004-04-14      Ralf Corsepius <ralf_corsepius@rtems.org>
17
18        PR 605/bsps
19        * cpu.c: Remove further c++ style comments having been missed in
20        previous patch. Remove printf's entirely.
21
222004-04-09      Joel Sherrill <joel@OARcorp.com>
23
24        PR 605/bsps
25        * cpu.c: Do not use C++ style comments.
26
272004-04-06      Ralf Corsepius <ralf_corsepius@rtems.org>
28
29        * configure.ac: Remove (Merged into $(top_srcdir)/configure.ac).
30        * Makefile.am: Don't include multilib.am.
31        Reflect merging configure.ac into $(top_srcdir)/configure.ac.
32
332004-04-03      Art Ferrer <arturo.b.ferrer@nasa.gov>
34
35        PR 598/bsps
36        * cpu_asm.S, rtems/score/cpu.h: Add save of floating point
37        status/control register on context switches. Missing this register
38        was causing intermittent floating point errors.
39
402004-04-02      Ralf Corsepius <ralf_corsepius@rtems.org>
41
42        * Makefile.am: Install iregdefs.h and idtcpu.h to
43        $(includedir)/rtems/mips.
44        * cpu_asm.S: Include <rtems/mips/iregdef.h> instead of <iregdef.h>.
45        * rtems/score/mips.h, cpu_asm.S: Include <rtems/mips/idtcpu.h>
46        instead of <idtcpu.h>.
47
482004-04-01      Ralf Corsepius <ralf_corsepius@rtems.org>
49
50        * Makefile.am: Install asm.h to $(includedir)/rtems.
51
522004-04-01      Ralf Corsepius <ralf_corsepius@rtems.org>
53
54        * cpu_asm.S: Include <rtems/asm.h> instead of <asm.h>.
55
562004-03-30      Ralf Corsepius <ralf_corsepius@rtems.org>
57
58        * cpu.c, rtems/score/cpu.h: Convert to using c99 fixed size types.
59
602004-03-29      Ralf Corsepius <ralf_corsepius@rtems.org>
61
62        * configure.ac: RTEMS_TOP([../../../..]).
63
642004-01-21      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
65
66        * configure.ac: Move RTEMS_TOP one subdir down.
67
682004-01-19      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
69
70        * Makefile.am: Add PREINSTALL_DIRS.
71
722004-01-14      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
73
74        * Makefile.am: Re-add dirstamps to PREINSTALL_FILES.
75        Add PREINSTALL_FILES to CLEANFILES.
76
772004-01-12      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
78
79        * configure.ac: Requires automake >= 1.8.1.
80
812004-01-11      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
82
83        * Makefile.am: Include compile.am, again.
84
852004-01-11      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
86
87        * Makefile.am: Convert to using automake compilation rules.
88
892004-01-07      Joel Sherrill <joel@OARcorp.com>
90
91        * rtems/score/mips.h: Removed junk revision line.
92
932003-12-12      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
94
95        * Makefile.am: Use mkdir_p. Remove dirs from PREINSTALL_FILES.
96
972003-12-12      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
98
99        * configure.ac: Require automake >= 1.8, autoconf >= 2.59.
100
1012003-12-01      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
102
103        * Makefile.am: Remove TMPINSTALL_FILES.
104
1052003-11-30      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
106
107        * Makefile.am: Add $(dirstamp) to preinstallation rules.
108
1092003-11-23      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
110
111        * Makefile.am: Don't use gmake rules for preinstallation.
112
1132003-10-21      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
114
115        * configure.ac: Remove RTEMS_CANONICAL_HOST.
116
1172003-10-21      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
118
119        * configure.ac: Remove RTEMS_CHECK_CPU.
120
1212003-09-26      Joel Sherrill <joel@OARcorp.com>
122
123        * rtems/score/cpu.h: Obsoleting HP PA-RISC port and removing all
124        references.
125
1262003-09-04      Joel Sherrill <joel@OARcorp.com>
127
128        * cpu.c, cpu_asm.S, rtems/score/cpu.h, rtems/score/mips.h,
129        rtems/score/types.h: URL for license changed.
130
1312003-08-11      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
132
133        * configure.ac: Use rtems-bugs@rtems.com as bug report email address.
134
1352003-03-06      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
136
137        * configure.ac: Remove AC_CONFIG_AUX_DIR.
138
1392002-12-11      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
140
141        * configure.ac: Require autoconf-2.57 + automake-1.7.2.
142        * Makefile.am: Eliminate C_O_FILES, S_O_FILES, libscorecpu_a_OBJECTS.
143
1442002-11-19      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
145
146        * configure.ac: Fix package name.
147
1482002-11-04      Joel Sherrill <joel@OARcorp.com>
149
150        * idtcpu.h: Removed warning.
151
1522002-11-01      Joel Sherrill <joel@OARcorp.com>
153
154        * idtcpu.h: Removed warnings.
155
1562002-10-28      Joel Sherrill <joel@OARcorp.com>
157
158        * idtcpu.h: Removed warning by turning extra token at the end of
159        an endif into a comment.
160
1612002-10-25      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
162
163        * configure.ac: Add nostdinc to AM_INIT_AUTOMAKE.
164
1652002-10-21      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
166
167        * .cvsignore: Reformat.
168        Add autom4te*cache.
169        Remove autom4te.cache.
170
1712002-08-14      Greg Menke <gregory.menke@gsfc.nasa.gov>
172
173        * cpu_asm.S: Clarified some comments, removed code that forced
174        SR_IEP on when returning from an interrupt.
175
1762002-06-27      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
177
178        * configure.ac: Add RTEMS_PROG_CCAS
179
1802002-06-27      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
181
182        * configure.ac: Use AC_CONFIG_AUX_DIR(../../../..).
183        Add AC_PROG_RANLIB.
184
1852002-06-20      Greg Menke <gregory.menke@gsfc.nasa.gov>
186        * cpu_asm.S: Added SR_IEO to context restore to fix isr disabled
187        deadlock caused by interrupt arriving while dispatching.
188       
1892002-06-17      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
190
191        * Makefile.am: Include $(top_srcdir)/../../../automake/*.am.
192        Use ../../../aclocal.
193
1942001-04-03      Joel Sherrill <joel@OARcorp.com>
195
196        * Per PR94, all rtems/score/CPUtypes.h are named rtems/score/types.h.
197        * rtems/score/mipstypes.h: Removed.
198        * rtems/score/types.h: New file via CVS magic.
199        * Makefile.am, rtems/score/cpu.h: Account for name change.
200
2012002-03-27      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
202
203        * configure.ac:
204        AC_INIT(package,_RTEMS_VERSION,_RTEMS_BUGS).
205        AM_INIT_AUTOMAKE([no-define foreign 1.6]).
206        * Makefile.am: Remove AUTOMAKE_OPTIONS.
207
2082002-03-20      Greg Menke <gregory.menke@gsfc.nasa.gov>
209
210        * cpu_asm.S: Now compiles on 4600 and 4650.
211
2122002-03-13      Greg Menke <gregory.menke@gsfc.nasa.gov>
213
214        * cpu_asm.S: Fixed a sneaky return from int w/ ints disabled bug.
215        * rtems/score/cpu.h: Fixed register numbering in comments and made
216        interrupt enable/disable more robust.
217       
2182002-03-05      Greg Menke <gregory.menke@gsfc.nasa.gov>
219        * cpu_asm.S: Added support for the debug exception vector, cleaned
220        up the exception processing & exception return stuff.  Re-added
221        EPC in the task context structure so the gdb stub will know where
222        a thread is executing.  Should've left it there in the first place...
223        * idtcpu.h: Added support for the debug exception vector.
224        * cpu.c: Added ___exceptionTaskStack to hold a pointer to the
225        stack frame in an interrupt so context switch code can get the
226        userspace EPC when scheduling.
227        * rtems/score/cpu.h: Re-added EPC to the task context.
228
2292002-02-27      Greg Menke <gregory.menke@gsfc.nasa.gov>
230
231        * cpu_asm.S: Fixed exception return address, modified FP context
232        switch so FPU is properly enabled and also doesn't screw up the
233        exception FP handling.
234        * idtcpu.h: Added C0_TAR, the MIPS target address register used for
235        returning from exceptions.
236        * iregdef.h: Added R_TAR to the stack frame so the target address
237        can be saved on a per-exception basis.  The new entry is past the
238        end of the frame gdb cares about, so doesn't affect gdb or cpu.h
239        stuff.
240        * rtems/score/cpu.h: added an #ifdef so cpu_asm.S can include it
241        to obtain FPU defines without syntax errors generated by the C
242        defintions.
243        * cpu.c: Improved interrupt level saves & restores.
244       
2452002-02-08      Joel Sherrill <joel@OARcorp.com>
246
247        * iregdef.h, rtems/score/cpu.h: Reordered register in the
248        exception stack frame to better match gdb's expectations.
249
2502001-02-05      Joel Sherrill <joel@OARcorp.com>
251
252        * cpu_asm.S: Enhanced to save/restore more registers on
253        exceptions.
254        * rtems/score/cpu.h (CPU_Interrupt_frame): Enhanced to list every
255        register individually and document when it is saved.
256        * idtcpu.h: Added constants for the coprocessor 1 registers
257        revision and status.
258
2592001-02-05      Joel Sherrill <joel@OARcorp.com>
260
261        * rtems/Makefile.am, rtems/score/Makefile.am: Removed again.
262
2632001-02-04      Joel Sherrill <joel@OARcorp.com>
264
265        * rtems/score/cpu.h: IDLE task should not be FP.  This was a mistake
266        in the previous patch that has now been confirmed.
267
2682001-02-01      Greg Menke <gregory.menke@gsfc.nasa.gov>
269
270        * cpu.c: Enhancements and fixes for modifying the SR when changing
271        the interrupt level.
272        * cpu_asm.S: Fixed handling of FP enable bit so it is properly
273        managed on a per-task basis, improved handling of interrupt levels,
274        and made deferred FP contexts work on the MIPS.
275        * rtems/score/cpu.h: Modified to support above changes.
276
2772002-01-28      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
278
279        * rtems/Makefile.am: Removed.
280        * rtems/score/Makefile.am: Removed.
281        * configure.ac: Reflect changes above.
282        * Makefile.am: Reflect changes above.
283
2842002-02-09      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
285
286        * asm.h: Remove #include <rtems/score/targopts.h>.
287        Add #include <rtems/score/cpuopts.h>.
288        * configure.ac: Remove RTEMS_CHECK_CUSTOM_BSP(RTEMS_BSP).
289
290
2912001-12-20      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
292
293        * configure.ac: Use RTEMS_ENV_RTEMSCPU.
294
2952001-12-19      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
296
297        * Makefile.am: Add multilib support.
298
2992001-11-28      Joel Sherrill <joel@OARcorp.com>,
300
301        This was tracked as PR91.
302        * rtems/score/cpu.h: Added CPU_PROVIDES_ISR_IS_IN_PROGRESS macro which
303        is used to specify if the port uses the standard macro for this (FALSE).
304        A TRUE setting indicates the port provides its own implementation.
305
3062001-10-12      Joel Sherrill <joel@OARcorp.com>
307
308        * cpu_asm.S: _CPU_Context_save_fp in was incorrectly in conditional
309        compilation block with (CPU_HARDWARE_FP == FALSE).  Reported by
310        Wayne Bullaughey <wayne@wmi.com>.
311
3122001-10-11      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
313
314        * .cvsignore: Add autom4te.cache for autoconf > 2.52.
315        * configure.in: Remove.
316        * configure.ac: New file, generated from configure.in by autoupdate.
317
3182001-09-23      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
319
320        * rtems/score/Makefile.am: Use 'PREINSTALL_FILES ='.
321        * Makefile.am: Use 'PREINSTALL_FILES ='.
322
3232001-07-03      Joel Sherrill <joel@OARcorp.com>
324
325        * cpu.c: Fixed typo.
326
3272000-05-24      Joel Sherrill <joel@OARcorp.com>
328
329        * rtems/score/mips.h: Added constants for MIPS exception numbers.
330        All exceptions should be given low numbers and thus can be installed
331        and processed in a uniform manner.  Variances between various MIPS
332        ISA levels were not accounted for.
333
3342001-05-24      Greg Menke <gregory.menke@gsfc.nasa.gov>
335
336        * Assisted in design and debug by Joel Sherrill <joel@OARcorp.com>.
337        * cpu_asm.S: Now works on Mongoose-V.  Missed in previous patch.
338
3392001-05-22      Greg Menke <gregory.menke@gsfc.nasa.gov>
340
341        * rtems/score/cpu.h: Add the interrupt stack structure and enhance
342        the context initialization to account for floating point tasks. 
343        * rtems/score/mips.h: Added the routines mips_set_cause(),
344        mips_get_fcr31(), and mips_set_fcr31().
345        * Assisted in design and debug by Joel Sherrill <joel@OARcorp.com>.
346
3472001-05-07      Joel Sherrill <joel@OARcorp.com>
348
349        * cpu_asm.S: Merged patches from Gregory Menke
350        <Gregory.D.Menke.1@gsfc.nasa.gov> that clean up
351        stack usage and include nops in the delay slots.
352
3532001-04-20      Joel Sherrill <joel@OARcorp.com>
354
355        * cpu_asm.S: Added code to save and restore SR and EPC to
356        properly support nested interrupts.  Note that the ISR
357        (not RTEMS) enables interrupts allowing the nesting to occur.
358
3592001-03-14      Joel Sherrill <joel@OARcorp.com>
360
361        * cpu.c, rtems/score/cpu.h, rtems/score/mipstypes.h:
362        Removed unused variable _CPU_Thread_dispatch_pointer
363        and cleaned numerous comments.
364       
3652001-03-13      Joel Sherrill <joel@OARcorp.com>
366
367        * cpu.c, cpu_asm.S, iregdef.h, rtems/score/cpu.h, rtems/score/mips.h:
368        Merged MIPS1 and MIPS3 code reducing the number of lines of assembly.
369        Also reimplemented some assembly routines in C further reducing
370        the amount of assembly and increasing maintainability.
371
3722001-02-04      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
373
374        * Makefile.am, rtems/score/Makefile.am:
375        Apply include_*HEADERS instead of H_FILES.
376
3772001-01-12      Joel Sherrill <joel@OARcorp.com>
378
379        * rtems/score/mips.h (mips_get_sr, mips_set_sr): Corrected
380        register constraints from "general" to "register".
381
3822001-01-09      Joel Sherrill <joel@OARcorp.com>
383
384        * cpu_asm.S: Use SR_INTERRUPT_ENABLE_BITS instead of SR_XXX constants
385        to make it easier to conditionalize the code for various ISA levels.
386
3872001-01-08      Joel Sherrill <joel@OARcorp.com>
388
389        * idtcpu.h: Commented out definition of "wait".  It was stupid to
390        use such a common word as a macro.
391        * rtems/score/cpu.h (_CPU_ISR_Disable): Fixed for mips ISA 3.
392        * rtems/score/mips.h: Added include of <idtcpu.h>.
393        * rtems/score/mips.h (mips_enable_in_interrupt_mask): Corrected.
394
3952001-01-03      Joel Sherrill <joel@OARcorp.com>
396
397        * rtems/score/cpu.h: Added _CPU_Initialize_vectors().
398        * cpu_asm.S: Eliminated warning for duplicate definition of EXTERN.
399
4002000-12-19      Joel Sherrill <joel@OARcorp.com>
401
402        * cpu_asm.S (_ISR_Handler): Return to the address in the EPC register.
403        Previous code resulting in the interrupted immediately returning
404        to the caller of the routine it was inside.
405
4062000-12-19      Joel Sherrill <joel@OARcorp.com>
407
408        * cpu.c (_CPU_Initialize): Do not initialize _ISR_Vector_table() here
409        because it has not been allocated yet.
410
4112000-12-13      Joel Sherrill <joel@OARcorp.com>
412
413        * cpu.c: Removed duplicate declaration for _ISR_Vector_table.
414        * cpu_asm.S: Removed assembly language to vector ISR handler
415        on MIPS ISA I.  Now call mips_vector_isr_handlers() in libcpu or BSP.
416        * rtems/score/cpu.h (CPU_INTERRUPT_NUMBER_OF_VECTORS): No
417        longer a constant -- get the real value from libcpu.
418
4192000-12-13      Joel Sherrill <joel@OARcorp.com>
420
421        * cpu_asm.h: Removed.
422        * Makefile.am: Remove cpu_asm.h.
423        * rtems/score/mips64orion.h: Renamed mips.h.
424        * rtems/score/mips.h: New file, formerly mips64orion.h.
425        Header rewritten.
426        (mips_get_sr, mips_set_sr, mips_enable_in_interrupt_mask,
427        mips_disable_in_interrupt_mask): New macros.
428        * rtems/score/Makefile.am: Reflect renaming mips64orion.h.
429        * asm.h: Include <mips.h> not <mips64orion.h>. Now includes the
430        few defines that were in <cpu_asm.h>.
431        * cpu.c (_CPU_ISR_Get_level): Added MIPS ISA I version of this routine.
432        MIPS ISA 3 is still in assembly for now.
433        (_CPU_Thread_Idle_body): Rewrote in C.
434        * cpu_asm.S: Rewrote file header.
435        (FRAME,ENDFRAME) now in asm.h.
436        (_CPU_ISR_Get_level): Removed ISA I version and rewrote in C.
437        (_CPU_ISR_Set_level): Removed ISA I version and rewrote in C.
438        (_CPU_Context_switch): MIPS ISA I now manages preserves SR_IEC and
439        leaves other bits in SR alone on task switch.
440        (mips_enable_interrupts,mips_disable_interrupts,
441        mips_enable_global_interrupts,mips_disable_global_interrupts,
442        disable_int, enable_int): Removed.
443        (mips_get_sr): Rewritten as C macro.
444        (_CPU_Thread_Idle_body): Rewritten in C.
445        (init_exc_vecs): Rewritten in C as mips_install_isr_entries() and
446        placed in libcpu.
447        (exc_tlb_code, exc_xtlb_code, exc_cache_code, exc_norm_code): Moved
448        to libcpu/mips/shared/interrupts.
449        (general): Cleaned up comment blocks and #if 0 areas.
450        * idtcpu.h: Made ifdef report an error.
451        * iregdef.h: Removed warning.
452        * rtems/score/cpu.h (CPU_INTERRUPT_NUMBER_OF_VECTORS): Now a variable
453        number defined by libcpu.
454        (_CPU_ISR_Disable, _CPU_ISR_Enable): Rewritten to use new routines
455        to access SR.
456        (_CPU_ISR_Set_level): Rewritten as macro for ISA I.
457        (_CPU_Context_Initialize): Honor ISR level in task initialization.
458        (_CPU_Fatal_halt): Use new _CPU_ISR_Disable() macro.
459
4602000-12-06      Joel Sherrill <joel@OARcorp.com>
461
462        * rtems/score/cpu.h: When mips ISA level is 1, registers in the
463        context should be 32 not 64 bits.
464
4652000-11-30      Joel Sherrill <joel@OARcorp.com>
466
467        * cpu_asm.S: Changed "_CPU_Ccontext_switch_restore: typo to
468        correct name of _CPU_Context_switch_restore.  Added dummy
469        version of exc_utlb_code() so applications would link.
470
4712000-11-09      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
472
473        * Makefile.am: Use ... instead of RTEMS_TOPdir in ACLOCAL_AMFLAGS.
474
4752000-11-02      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
476
477        * Makefile.am: Switch to ACLOCAL_AMFLAGS = -I $(RTEMS_TOPdir)/aclocal.
478
4792000-10-25      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
480
481        * Makefile.am: ACLOCAL_AMFLAGS= -I $(RTEMS_TOPdir)/macros.
482        Switch to GNU canonicalization.
483
4842000-10-24      Alan Cudmore <alanc@linuxstart.com> and
485        Joel Sherrill <joel@OARcorp.com>
486
487        * This is a major reworking of the mips64orion port to use
488        gcc predefines as much as possible and a big push to multilib
489        the mips port.  The mips64orion port was copied/renamed to mips
490        to be more like other GNU tools.  Alan did most of the technical
491        work of determining how to map old macro names used by the mips64orion
492        port to standard compiler macro definitions.  Joel did the merge
493        with CVS magic to keep individual file history and did the BSP
494        modifications. Details follow:
495        * Makefile.am: idtmon.h in mips64orion port not present.
496        * asm.h: MIPS64ORION replaced with MIPS. Frame setup macros added.
497        * cpu.c: Comments added.
498        * cpu_asm.S: Conditionals changed.  MIPS ISA level 1 support added.
499        First attempt at exception/interrupt processing for ISA level 1
500        and minus any use of IDT/MON added.
501        * idtcpu.h: Conditionals changed to use gcc predefines.
502        * iregdef.h: Ditto.
503        * cpu_asm.h: No real change.  Merger required commit.
504        * rtems/Makefile.am: Ditto.
505        * rtems/score/Makefile.am: Ditto.
506        * rtems/score/cpu.h: Change MIPS64ORION to MIPS.
507        * rtems/score/mips64orion.h: Change MIPS64ORION to MIPS.  Convert
508        from using RTEMS_CPU_MODEL to gcc predefines to figre things out.
509
5102000-09-04      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
511
512        * Makefile.am: Include compile.am.
513
5142000-08-10      Joel Sherrill <joel@OARcorp.com>
515
516        * ChangeLog: New file.
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