source: rtems/cpukit/score/cpu/mips/ChangeLog @ 0067feb

4.104.115
Last change on this file since 0067feb was 0067feb, checked in by Joel Sherrill <joel.sherrill@…>, on 03/12/09 at 14:16:50

2009-03-12 Joel Sherrill <joel.sherrill@…>

PR 1385/cpukit

  • cpu_asm.S: When the type rtems_boolean was switched to the C99 bool, the size changed from 4 bytes to 1 byte. The interrupt dispatching code accesses two boolean variables for scheduling purposes and the assembly implementations of this code did not get updated.
  • Property mode set to 100644
File size: 21.0 KB
Line 
12009-03-12      Joel Sherrill <joel.sherrill@OARcorp.com>
2
3        PR 1385/cpukit
4        * cpu_asm.S: When the type rtems_boolean was switched to the C99 bool,
5        the size changed from 4 bytes to 1 byte. The interrupt dispatching
6        code accesses two boolean variables for scheduling purposes and the
7        assembly implementations of this code did not get updated.
8
92009-02-12      Joel Sherrill <joel.sherrill@oarcorp.com>
10
11        * cpu.c, rtems/score/cpu.h: Change prototype of IDLE thread to
12        consistently return void * and take a uintptr_t argument.
13
142009-02-11      Joel Sherrill <joel.sherrill@oarcorp.com>
15
16        * cpu.c, rtems/score/cpu.h: Eliminate _CPU_Thread_dispatch_pointer and
17        passing address of _Thread_Dispatch to _CPU_Initialize. Clean up
18        comments.
19
202008-09-11      Ralf Corsépius <ralf.corsepius@rtems.org>
21
22        * rtems/score/types.h: Do not define boolean, single_precision,
23        double_precision unless RTEMS_DEPRECATED_TYPES is given.
24
252008-08-21      Ralf Corsépius <ralf.corsepius@rtems.org>
26
27        * rtems/score/types.h: Include stdbool.h.
28        Use bool as base-type for boolean.
29
302008-07-31      Joel Sherrill <joel.sherrill@OARcorp.com>
31
32        * cpu.c, rtems/score/cpu.h: Correct prototype of Idle threads.
33
342008-06-05      Joel Sherrill <joel.sherrill@OARcorp.com>
35
36        * rtems/score/cpu.h: Add CPU_SIMPLE_VECTORED_INTERRUPTS porting
37        parameter to indicate that the port uses the Simple Vectored
38        Interrupt model or the Programmable Interrupt Controller Model. The
39        PIC model is implemented primarily in the BSP and it is responsible
40        for all memory allocation.
41
422008-06-04      Joel Sherrill <joel.sherrill@OARcorp.com>
43
44        * rtems/score/cpu.h: Use a constant for CPU_STACK_MINIMUM_SIZE so it
45        can be used in cpp expressions. Using sizeof() requires actually
46        compiling the file.
47
482007-12-17      Joel Sherrill <joel.sherrill@oarcorp.com>
49
50        * rtems/score/cpu.h: Add _CPU_Context_Get_SP() for stack check utility.
51
522007-12-04      Joel Sherrill <joel.sherrill@OARcorp.com>
53
54        * cpu.c, rtems/score/cpu.h: Move interrupt_stack_size field from CPU
55        Table to Configuration Table. Eliminate CPU Table from all ports.
56        Delete references to CPU Table in all forms.
57
582007-12-03      Joel Sherrill <joel.sherrill@OARcorp.com>
59
60        * rtems/score/cpu.h: Moved most of the remaining CPU Table fields to
61        the Configuration Table. This included pretasking_hook,
62        predriver_hook, postdriver_hook, idle_task, do_zero_of_workspace,
63        extra_mpci_receive_server_stack, stack_allocate_hook, and
64        stack_free_hook. As a side-effect of this effort some multiprocessing
65        code was made conditional and some style clean up occurred.
66
672007-11-26      Joel Sherrill <joel.sherrill@oarcorp.com>
68
69        * rtems/score/cpu.h: Eliminate the clicks_per_microsecond field in the
70        MIPS CPU Table and define another mechanism for drivers to obtain
71        this information.
72
732007-08-04      Ralf Corsépius <ralf.corsepius@rtems.org>
74
75        * rtems/score/cpu.h: Use uintptr_t instead of uint32_t.
76
772007-05-09      Ralf Corsépius <ralf.corsepius@rtems.org>
78
79        * rtems/score/cpu.h: Remove CPU_HAS_OWN_HOST_TO_NETWORK_ROUTINES.
80
812007-04-17      Ralf Corsépius <ralf.corsepius@rtems.org>
82
83        * rtems/score/cpu.h:
84          Use Context_Control_fp* instead of void* for fp_contexts.
85          Eliminate evil casts.
86
872006-11-17      Ralf Corsépius <ralf.corsepius@rtems.org>
88
89        * rtems/score/types.h: Remove unsigned64, signed64.
90
912006-06-02      Greg Menke <gregory.menke@gsfc.nasa.gov>
92
93        * cpu.c: Added __mips==32 to fix build problems on those targets
94        caused by the Bruce Robinson.
95
962006-06-08 Bruce Robinson <brucer@pmccorp.com>
97
98        * cpu.c: Add int64 types for __mips==3 cpus, incorporate
99           mips_interrupt_mask() into mask computations
100        * cpu_asm.S: Add int64 register save/restores for __mips==3 cpus.  Adjustment
101           of mips1 vs mips3 macros.
102        * cpu.h: Add int64 types for __mips==3 cpus.
103       
1042006-03-17      Ralf Corsepius <ralf.corsepius@rtems.org>
105
106        * cpu.c (_CPU_Initialize): Add fpu initialization.
107        * rtems/score/cpu.h: Setup CPU_*_ENDIAN from GCC's__MIPS{EL|EB}__.
108        (Partial merger of submission by Bruce Robinson <brucer@pmccorp.com>).
109
1102006-01-16      Joel Sherrill <joel@OARcorp.com>
111
112        * rtems/score/cpu.h: Part of a large patch to improve Doxygen output.
113        As a side-effect, grammar and spelling errors were corrected, spacing
114        errors were address, and some variable names were improved.
115
1162005-11-18      Joel Sherrill <joel@OARcorp.com>
117
118        * rtems/score/cpu.h: Eliminate use of unsigned32.
119
1202005-11-08      Ralf Corsepius <ralf.corsepius@rtems.org>
121
122        * rtems/score/types.h: Eliminate unsigned16, unsigned32.
123
1242005-10-27      Ralf Corsepius <ralf.corsepius@rtems.org>
125
126        * rtems/asm.h: Remove private version of CONCAT macros.
127        Include <rtems/concat.h> instead.
128
1292005-04-26      Joel Sherrill <joel@OARcorp.com>
130
131        * rtems/asm.h: Eliminate warnings.
132
1332005-02-08      Ralf Corsepius <ralf.corsepius@rtems.org>
134
135        * Makefile.am: Split out preinstallation rules.
136        * preinstall.am: New (Split out from Makefile.am).
137
1382005-02-04      Ralf Corsepius <ralf.corsepius@rtems.org>
139
140        * rtems/mips/idtcpu.h, rtems/mips/iregdef.h, rtems/score/mips.h:
141        Header guards cleanup.
142
1432005-02-04      Ralf Corsepius <ralf.corsepius@rtems.org>
144
145        PR 754/rtems
146        * rtems/asm.h: New (relocated from .).
147        * asm.h: Remove (moved to rtems/asm.h).
148        * Makefile.am: Reflect changes above.
149
1502005-02-01      Ralf Corsepius <ralf.corsepius@rtems.org>
151
152        PR rtems/752
153        * rtems/mips/idtcpu.h rtems/mips/iregdef.h: New (relocated from .).
154        New header guards.
155        * idtcpu.h, iregdef.h: Remove.
156        * Makefile.am: Reflect changes above.
157
1582004-01-28      Ralf Corsepius <ralf.corsepiu@rtems.org>
159
160        * asm.h, rtems/score/cpu.h, rtems/score/mips.h, rtems/score/types.h:
161        New header guards.
162
1632005-01-24      Ralf Corsepius <ralf.corsepius@rtems.org>
164
165        * rtems/score/types.h: Remove signed8, signed16, signed32,
166        unsigned8, unsigned16, unsigned32.
167
1682005-01-24      Ralf Corsepius <ralf.corsepius@rtems.org>
169
170        * rtems/score/cpu.h: *_swap_u32( uint32_t ).
171
1722005-01-24      Ralf Corsepius <ralf.corsepius@rtems.org>
173
174        * rtems/score/types.h: #include <rtems/stdint.h>.
175
1762005-01-07      Joel Sherrill <joel@OARcorp.com>
177
178        * rtems/score/cpu.h: Remove warnings.
179
1802005-01-07      Ralf Corsepius <ralf.corsepius@rtems.org>
181
182        * Makefile.am: Eliminate CFLAGS_OPTIMIZE_V.
183
1842005-01-03      Greg Menke <gregory.menke@gsfc.nasa.gov>
185
186        PR 739
187        * iregdef.h: Fixes gcc warning about redundant definition of R_SZ
188        when compiling cpu_asm.S.  Problem was a #define sneaked in in
189        version 1.11, no ill effects would have only affected R4000
190        builds.
191
1922005-01-03      Greg Menke <gregory.menke@gsfc.nasa.gov>
193
194        PR 737
195        * cpu_asm.S: Fixes gcc warning about instructions in branch delay
196        slot when compiling cpu_asm.S
197
1982005-01-01      Ralf Corsepius <ralf.corsepius@rtems.org>
199
200        * Makefile.am: Remove build-variant support.
201
2022004-12-02      Greg Menke <gregory.menke@gsfc.nasa.gov>
203
204        PR 730
205        * cpu_asm.S: Collected PR 601 changes for commit to cvshead
206        for rtems-4.7.
207
2082004-04-09      Joel Sherrill <joel@OARcorp.com>
209
210        PR 605/bsps
211        * cpu.c: Do not use C++ style comments.
212
2132004-04-07      Greg Menke <gregory.menke@gsfc.nasa.gov>
214        PR 601
215        * cpu_asm.S: Added __mips==32 support for R4000 processors running
216        32 bit code.  Fixed #define problems that caused fpu code to
217        always be included even when no fpu is present.
218
2192004-04-03      Art Ferrer <arturo.b.ferrer@nasa.gov>
220
221        PR 598/bsps
222        * cpu_asm.S, rtems/score/cpu.h: Add save of floating point
223        status/control register on context switches. Missing this register
224        was causing intermittent floating point errors.
225
2262003-09-04      Joel Sherrill <joel@OARcorp.com>
227
228        * cpu.c, cpu_asm.S, rtems/score/cpu.h, rtems/score/mips.h,
229        rtems/score/types.h: URL for license changed.
230
2312003-08-11      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
232
233        * configure.ac: Use rtems-bugs@rtems.com as bug report email address.
234
2352003-03-06      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
236
237        * configure.ac: Remove AC_CONFIG_AUX_DIR.
238
2392002-12-11      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
240
241        * configure.ac: Require autoconf-2.57 + automake-1.7.2.
242        * Makefile.am: Eliminate C_O_FILES, S_O_FILES, libscorecpu_a_OBJECTS.
243
2442002-11-19      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
245
246        * configure.ac: Fix package name.
247
2482002-11-04      Joel Sherrill <joel@OARcorp.com>
249
250        * idtcpu.h: Removed warning.
251
2522002-11-01      Joel Sherrill <joel@OARcorp.com>
253
254        * idtcpu.h: Removed warnings.
255
2562002-10-28      Joel Sherrill <joel@OARcorp.com>
257
258        * idtcpu.h: Removed warning by turning extra token at the end of
259        an endif into a comment.
260
2612002-10-25      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
262
263        * configure.ac: Add nostdinc to AM_INIT_AUTOMAKE.
264
2652002-10-21      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
266
267        * .cvsignore: Reformat.
268        Add autom4te*cache.
269        Remove autom4te.cache.
270
2712002-08-14      Greg Menke <gregory.menke@gsfc.nasa.gov>
272
273        * cpu_asm.S: Clarified some comments, removed code that forced
274        SR_IEP on when returning from an interrupt.
275
2762002-06-27      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
277
278        * configure.ac: Add RTEMS_PROG_CCAS
279
2802002-06-27      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
281
282        * configure.ac: Use AC_CONFIG_AUX_DIR(../../../..).
283        Add AC_PROG_RANLIB.
284
2852002-06-20      Greg Menke <gregory.menke@gsfc.nasa.gov>
286        * cpu_asm.S: Added SR_IEO to context restore to fix isr disabled
287        deadlock caused by interrupt arriving while dispatching.
288       
2892002-06-17      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
290
291        * Makefile.am: Include $(top_srcdir)/../../../automake/*.am.
292        Use ../../../aclocal.
293
2942001-04-03      Joel Sherrill <joel@OARcorp.com>
295
296        * Per PR94, all rtems/score/CPUtypes.h are named rtems/score/types.h.
297        * rtems/score/mipstypes.h: Removed.
298        * rtems/score/types.h: New file via CVS magic.
299        * Makefile.am, rtems/score/cpu.h: Account for name change.
300
3012002-03-27      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
302
303        * configure.ac:
304        AC_INIT(package,_RTEMS_VERSION,_RTEMS_BUGS).
305        AM_INIT_AUTOMAKE([no-define foreign 1.6]).
306        * Makefile.am: Remove AUTOMAKE_OPTIONS.
307
3082002-03-20      Greg Menke <gregory.menke@gsfc.nasa.gov>
309
310        * cpu_asm.S: Now compiles on 4600 and 4650.
311
3122002-03-13      Greg Menke <gregory.menke@gsfc.nasa.gov>
313
314        * cpu_asm.S: Fixed a sneaky return from int w/ ints disabled bug.
315        * rtems/score/cpu.h: Fixed register numbering in comments and made
316        interrupt enable/disable more robust.
317       
3182002-03-05      Greg Menke <gregory.menke@gsfc.nasa.gov>
319        * cpu_asm.S: Added support for the debug exception vector, cleaned
320        up the exception processing & exception return stuff.  Re-added
321        EPC in the task context structure so the gdb stub will know where
322        a thread is executing.  Should've left it there in the first place...
323        * idtcpu.h: Added support for the debug exception vector.
324        * cpu.c: Added ___exceptionTaskStack to hold a pointer to the
325        stack frame in an interrupt so context switch code can get the
326        userspace EPC when scheduling.
327        * rtems/score/cpu.h: Re-added EPC to the task context.
328
3292002-02-27      Greg Menke <gregory.menke@gsfc.nasa.gov>
330
331        * cpu_asm.S: Fixed exception return address, modified FP context
332        switch so FPU is properly enabled and also doesn't screw up the
333        exception FP handling.
334        * idtcpu.h: Added C0_TAR, the MIPS target address register used for
335        returning from exceptions.
336        * iregdef.h: Added R_TAR to the stack frame so the target address
337        can be saved on a per-exception basis.  The new entry is past the
338        end of the frame gdb cares about, so doesn't affect gdb or cpu.h
339        stuff.
340        * rtems/score/cpu.h: added an #ifdef so cpu_asm.S can include it
341        to obtain FPU defines without syntax errors generated by the C
342        defintions.
343        * cpu.c: Improved interrupt level saves & restores.
344       
3452002-02-08      Joel Sherrill <joel@OARcorp.com>
346
347        * iregdef.h, rtems/score/cpu.h: Reordered register in the
348        exception stack frame to better match gdb's expectations.
349
3502001-02-05      Joel Sherrill <joel@OARcorp.com>
351
352        * cpu_asm.S: Enhanced to save/restore more registers on
353        exceptions.
354        * rtems/score/cpu.h (CPU_Interrupt_frame): Enhanced to list every
355        register individually and document when it is saved.
356        * idtcpu.h: Added constants for the coprocessor 1 registers
357        revision and status.
358
3592001-02-05      Joel Sherrill <joel@OARcorp.com>
360
361        * rtems/Makefile.am, rtems/score/Makefile.am: Removed again.
362
3632001-02-04      Joel Sherrill <joel@OARcorp.com>
364
365        * rtems/score/cpu.h: IDLE task should not be FP.  This was a mistake
366        in the previous patch that has now been confirmed.
367
3682001-02-01      Greg Menke <gregory.menke@gsfc.nasa.gov>
369
370        * cpu.c: Enhancements and fixes for modifying the SR when changing
371        the interrupt level.
372        * cpu_asm.S: Fixed handling of FP enable bit so it is properly
373        managed on a per-task basis, improved handling of interrupt levels,
374        and made deferred FP contexts work on the MIPS.
375        * rtems/score/cpu.h: Modified to support above changes.
376
3772002-01-28      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
378
379        * rtems/Makefile.am: Removed.
380        * rtems/score/Makefile.am: Removed.
381        * configure.ac: Reflect changes above.
382        * Makefile.am: Reflect changes above.
383
3842002-02-09      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
385
386        * asm.h: Remove #include <rtems/score/targopts.h>.
387        Add #include <rtems/score/cpuopts.h>.
388        * configure.ac: Remove RTEMS_CHECK_CUSTOM_BSP(RTEMS_BSP).
389
390
3912001-12-20      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
392
393        * configure.ac: Use RTEMS_ENV_RTEMSCPU.
394
3952001-12-19      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
396
397        * Makefile.am: Add multilib support.
398
3992001-11-28      Joel Sherrill <joel@OARcorp.com>,
400
401        This was tracked as PR91.
402        * rtems/score/cpu.h: Added CPU_PROVIDES_ISR_IS_IN_PROGRESS macro which
403        is used to specify if the port uses the standard macro for this (FALSE).
404        A TRUE setting indicates the port provides its own implementation.
405
4062001-10-12      Joel Sherrill <joel@OARcorp.com>
407
408        * cpu_asm.S: _CPU_Context_save_fp in was incorrectly in conditional
409        compilation block with (CPU_HARDWARE_FP == FALSE).  Reported by
410        Wayne Bullaughey <wayne@wmi.com>.
411
4122001-10-11      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
413
414        * .cvsignore: Add autom4te.cache for autoconf > 2.52.
415        * configure.in: Remove.
416        * configure.ac: New file, generated from configure.in by autoupdate.
417
4182001-09-23      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
419
420        * rtems/score/Makefile.am: Use 'PREINSTALL_FILES ='.
421        * Makefile.am: Use 'PREINSTALL_FILES ='.
422
4232001-07-03      Joel Sherrill <joel@OARcorp.com>
424
425        * cpu.c: Fixed typo.
426
4272000-05-24      Joel Sherrill <joel@OARcorp.com>
428
429        * rtems/score/mips.h: Added constants for MIPS exception numbers.
430        All exceptions should be given low numbers and thus can be installed
431        and processed in a uniform manner.  Variances between various MIPS
432        ISA levels were not accounted for.
433
4342001-05-24      Greg Menke <gregory.menke@gsfc.nasa.gov>
435
436        * Assisted in design and debug by Joel Sherrill <joel@OARcorp.com>.
437        * cpu_asm.S: Now works on Mongoose-V.  Missed in previous patch.
438
4392001-05-22      Greg Menke <gregory.menke@gsfc.nasa.gov>
440
441        * rtems/score/cpu.h: Add the interrupt stack structure and enhance
442        the context initialization to account for floating point tasks. 
443        * rtems/score/mips.h: Added the routines mips_set_cause(),
444        mips_get_fcr31(), and mips_set_fcr31().
445        * Assisted in design and debug by Joel Sherrill <joel@OARcorp.com>.
446
4472001-05-07      Joel Sherrill <joel@OARcorp.com>
448
449        * cpu_asm.S: Merged patches from Gregory Menke
450        <Gregory.D.Menke.1@gsfc.nasa.gov> that clean up
451        stack usage and include nops in the delay slots.
452
4532001-04-20      Joel Sherrill <joel@OARcorp.com>
454
455        * cpu_asm.S: Added code to save and restore SR and EPC to
456        properly support nested interrupts.  Note that the ISR
457        (not RTEMS) enables interrupts allowing the nesting to occur.
458
4592001-03-14      Joel Sherrill <joel@OARcorp.com>
460
461        * cpu.c, rtems/score/cpu.h, rtems/score/mipstypes.h:
462        Removed unused variable _CPU_Thread_dispatch_pointer
463        and cleaned numerous comments.
464       
4652001-03-13      Joel Sherrill <joel@OARcorp.com>
466
467        * cpu.c, cpu_asm.S, iregdef.h, rtems/score/cpu.h, rtems/score/mips.h:
468        Merged MIPS1 and MIPS3 code reducing the number of lines of assembly.
469        Also reimplemented some assembly routines in C further reducing
470        the amount of assembly and increasing maintainability.
471
4722001-02-04      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
473
474        * Makefile.am, rtems/score/Makefile.am:
475        Apply include_*HEADERS instead of H_FILES.
476
4772001-01-12      Joel Sherrill <joel@OARcorp.com>
478
479        * rtems/score/mips.h (mips_get_sr, mips_set_sr): Corrected
480        register constraints from "general" to "register".
481
4822001-01-09      Joel Sherrill <joel@OARcorp.com>
483
484        * cpu_asm.S: Use SR_INTERRUPT_ENABLE_BITS instead of SR_XXX constants
485        to make it easier to conditionalize the code for various ISA levels.
486
4872001-01-08      Joel Sherrill <joel@OARcorp.com>
488
489        * idtcpu.h: Commented out definition of "wait".  It was stupid to
490        use such a common word as a macro.
491        * rtems/score/cpu.h (_CPU_ISR_Disable): Fixed for mips ISA 3.
492        * rtems/score/mips.h: Added include of <idtcpu.h>.
493        * rtems/score/mips.h (mips_enable_in_interrupt_mask): Corrected.
494
4952001-01-03      Joel Sherrill <joel@OARcorp.com>
496
497        * rtems/score/cpu.h: Added _CPU_Initialize_vectors().
498        * cpu_asm.S: Eliminated warning for duplicate definition of EXTERN.
499
5002000-12-19      Joel Sherrill <joel@OARcorp.com>
501
502        * cpu_asm.S (_ISR_Handler): Return to the address in the EPC register.
503        Previous code resulting in the interrupted immediately returning
504        to the caller of the routine it was inside.
505
5062000-12-19      Joel Sherrill <joel@OARcorp.com>
507
508        * cpu.c (_CPU_Initialize): Do not initialize _ISR_Vector_table() here
509        because it has not been allocated yet.
510
5112000-12-13      Joel Sherrill <joel@OARcorp.com>
512
513        * cpu.c: Removed duplicate declaration for _ISR_Vector_table.
514        * cpu_asm.S: Removed assembly language to vector ISR handler
515        on MIPS ISA I.  Now call mips_vector_isr_handlers() in libcpu or BSP.
516        * rtems/score/cpu.h (CPU_INTERRUPT_NUMBER_OF_VECTORS): No
517        longer a constant -- get the real value from libcpu.
518
5192000-12-13      Joel Sherrill <joel@OARcorp.com>
520
521        * cpu_asm.h: Removed.
522        * Makefile.am: Remove cpu_asm.h.
523        * rtems/score/mips64orion.h: Renamed mips.h.
524        * rtems/score/mips.h: New file, formerly mips64orion.h.
525        Header rewritten.
526        (mips_get_sr, mips_set_sr, mips_enable_in_interrupt_mask,
527        mips_disable_in_interrupt_mask): New macros.
528        * rtems/score/Makefile.am: Reflect renaming mips64orion.h.
529        * asm.h: Include <mips.h> not <mips64orion.h>. Now includes the
530        few defines that were in <cpu_asm.h>.
531        * cpu.c (_CPU_ISR_Get_level): Added MIPS ISA I version of this routine.
532        MIPS ISA 3 is still in assembly for now.
533        (_CPU_Thread_Idle_body): Rewrote in C.
534        * cpu_asm.S: Rewrote file header.
535        (FRAME,ENDFRAME) now in asm.h.
536        (_CPU_ISR_Get_level): Removed ISA I version and rewrote in C.
537        (_CPU_ISR_Set_level): Removed ISA I version and rewrote in C.
538        (_CPU_Context_switch): MIPS ISA I now manages preserves SR_IEC and
539        leaves other bits in SR alone on task switch.
540        (mips_enable_interrupts,mips_disable_interrupts,
541        mips_enable_global_interrupts,mips_disable_global_interrupts,
542        disable_int, enable_int): Removed.
543        (mips_get_sr): Rewritten as C macro.
544        (_CPU_Thread_Idle_body): Rewritten in C.
545        (init_exc_vecs): Rewritten in C as mips_install_isr_entries() and
546        placed in libcpu.
547        (exc_tlb_code, exc_xtlb_code, exc_cache_code, exc_norm_code): Moved
548        to libcpu/mips/shared/interrupts.
549        (general): Cleaned up comment blocks and #if 0 areas.
550        * idtcpu.h: Made ifdef report an error.
551        * iregdef.h: Removed warning.
552        * rtems/score/cpu.h (CPU_INTERRUPT_NUMBER_OF_VECTORS): Now a variable
553        number defined by libcpu.
554        (_CPU_ISR_Disable, _CPU_ISR_Enable): Rewritten to use new routines
555        to access SR.
556        (_CPU_ISR_Set_level): Rewritten as macro for ISA I.
557        (_CPU_Context_Initialize): Honor ISR level in task initialization.
558        (_CPU_Fatal_halt): Use new _CPU_ISR_Disable() macro.
559
5602000-12-06      Joel Sherrill <joel@OARcorp.com>
561
562        * rtems/score/cpu.h: When mips ISA level is 1, registers in the
563        context should be 32 not 64 bits.
564
5652000-11-30      Joel Sherrill <joel@OARcorp.com>
566
567        * cpu_asm.S: Changed "_CPU_Ccontext_switch_restore: typo to
568        correct name of _CPU_Context_switch_restore.  Added dummy
569        version of exc_utlb_code() so applications would link.
570
5712000-11-09      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
572
573        * Makefile.am: Use ... instead of RTEMS_TOPdir in ACLOCAL_AMFLAGS.
574
5752000-11-02      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
576
577        * Makefile.am: Switch to ACLOCAL_AMFLAGS = -I $(RTEMS_TOPdir)/aclocal.
578
5792000-10-25      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
580
581        * Makefile.am: ACLOCAL_AMFLAGS= -I $(RTEMS_TOPdir)/macros.
582        Switch to GNU canonicalization.
583
5842000-10-24      Alan Cudmore <alanc@linuxstart.com> and
585        Joel Sherrill <joel@OARcorp.com>
586
587        * This is a major reworking of the mips64orion port to use
588        gcc predefines as much as possible and a big push to multilib
589        the mips port.  The mips64orion port was copied/renamed to mips
590        to be more like other GNU tools.  Alan did most of the technical
591        work of determining how to map old macro names used by the mips64orion
592        port to standard compiler macro definitions.  Joel did the merge
593        with CVS magic to keep individual file history and did the BSP
594        modifications. Details follow:
595        * Makefile.am: idtmon.h in mips64orion port not present.
596        * asm.h: MIPS64ORION replaced with MIPS. Frame setup macros added.
597        * cpu.c: Comments added.
598        * cpu_asm.S: Conditionals changed.  MIPS ISA level 1 support added.
599        First attempt at exception/interrupt processing for ISA level 1
600        and minus any use of IDT/MON added.
601        * idtcpu.h: Conditionals changed to use gcc predefines.
602        * iregdef.h: Ditto.
603        * cpu_asm.h: No real change.  Merger required commit.
604        * rtems/Makefile.am: Ditto.
605        * rtems/score/Makefile.am: Ditto.
606        * rtems/score/cpu.h: Change MIPS64ORION to MIPS.
607        * rtems/score/mips64orion.h: Change MIPS64ORION to MIPS.  Convert
608        from using RTEMS_CPU_MODEL to gcc predefines to figre things out.
609
6102000-09-04      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
611
612        * Makefile.am: Include compile.am.
613
6142000-08-10      Joel Sherrill <joel@OARcorp.com>
615
616        * ChangeLog: New file.
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