[c163e3b9] | 1 | 2005-04-26 Joel Sherrill <joel@OARcorp.com> |
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| 2 | |
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| 3 | * rtems/asm.h: Eliminate warnings. |
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| 4 | |
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[babf575] | 5 | 2005-02-08 Ralf Corsepius <ralf.corsepius@rtems.org> |
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| 6 | |
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| 7 | * Makefile.am: Split out preinstallation rules. |
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| 8 | * preinstall.am: New (Split out from Makefile.am). |
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| 9 | |
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[b5cdddf] | 10 | 2005-02-04 Ralf Corsepius <ralf.corsepius@rtems.org> |
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| 11 | |
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| 12 | * rtems/mips/idtcpu.h, rtems/mips/iregdef.h, rtems/score/mips.h: |
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| 13 | Header guards cleanup. |
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| 14 | |
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[1f24914a] | 15 | 2005-02-04 Ralf Corsepius <ralf.corsepius@rtems.org> |
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| 16 | |
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| 17 | PR 754/rtems |
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| 18 | * rtems/asm.h: New (relocated from .). |
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| 19 | * asm.h: Remove (moved to rtems/asm.h). |
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| 20 | * Makefile.am: Reflect changes above. |
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| 21 | |
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[5236cf04] | 22 | 2005-02-01 Ralf Corsepius <ralf.corsepius@rtems.org> |
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| 23 | |
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| 24 | PR rtems/752 |
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| 25 | * rtems/mips/idtcpu.h rtems/mips/iregdef.h: New (relocated from .). |
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| 26 | New header guards. |
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| 27 | * idtcpu.h, iregdef.h: Remove. |
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| 28 | * Makefile.am: Reflect changes above. |
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| 29 | |
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[5ff0481] | 30 | 2004-01-28 Ralf Corsepius <ralf.corsepiu@rtems.org> |
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| 31 | |
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| 32 | * asm.h, rtems/score/cpu.h, rtems/score/mips.h, rtems/score/types.h: |
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| 33 | New header guards. |
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| 34 | |
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[609b924] | 35 | 2005-01-24 Ralf Corsepius <ralf.corsepius@rtems.org> |
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| 36 | |
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| 37 | * rtems/score/types.h: Remove signed8, signed16, signed32, |
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| 38 | unsigned8, unsigned16, unsigned32. |
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| 39 | |
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[ec8973ed] | 40 | 2005-01-24 Ralf Corsepius <ralf.corsepius@rtems.org> |
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| 41 | |
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| 42 | * rtems/score/cpu.h: *_swap_u32( uint32_t ). |
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| 43 | |
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[b9b531f] | 44 | 2005-01-24 Ralf Corsepius <ralf.corsepius@rtems.org> |
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| 45 | |
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| 46 | * rtems/score/types.h: #include <rtems/stdint.h>. |
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| 47 | |
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[28e9f45] | 48 | 2005-01-07 Joel Sherrill <joel@OARcorp.com> |
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| 49 | |
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| 50 | * rtems/score/cpu.h: Remove warnings. |
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| 51 | |
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[8fab7fa9] | 52 | 2005-01-07 Ralf Corsepius <ralf.corsepius@rtems.org> |
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[2bc236ba] | 53 | |
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| 54 | * Makefile.am: Eliminate CFLAGS_OPTIMIZE_V. |
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| 55 | |
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[e1765dd4] | 56 | 2005-01-03 Greg Menke <gregory.menke@gsfc.nasa.gov> |
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[dc7f3476] | 57 | |
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[e1765dd4] | 58 | PR 739 |
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| 59 | * iregdef.h: Fixes gcc warning about redundant definition of R_SZ |
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| 60 | when compiling cpu_asm.S. Problem was a #define sneaked in in |
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| 61 | version 1.11, no ill effects would have only affected R4000 |
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| 62 | builds. |
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| 63 | |
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[0b2bcb1] | 64 | 2005-01-03 Greg Menke <gregory.menke@gsfc.nasa.gov> |
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[dc7f3476] | 65 | |
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[0b2bcb1] | 66 | PR 737 |
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| 67 | * cpu_asm.S: Fixes gcc warning about instructions in branch delay |
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| 68 | slot when compiling cpu_asm.S |
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| 69 | |
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[f346774d] | 70 | 2005-01-01 Ralf Corsepius <ralf.corsepius@rtems.org> |
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| 71 | |
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| 72 | * Makefile.am: Remove build-variant support. |
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| 73 | |
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[5194a28] | 74 | 2004-12-02 Greg Menke <gregory.menke@gsfc.nasa.gov> |
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[dc7f3476] | 75 | |
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[5194a28] | 76 | PR 730 |
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| 77 | * cpu_asm.S: Collected PR 601 changes for commit to cvshead |
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[dc7f3476] | 78 | for rtems-4.7. |
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[78d4816] | 79 | |
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[c181345] | 80 | 2004-04-09 Joel Sherrill <joel@OARcorp.com> |
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| 81 | |
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| 82 | PR 605/bsps |
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| 83 | * cpu.c: Do not use C++ style comments. |
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| 84 | |
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[5194a28] | 85 | 2004-04-07 Greg Menke <gregory.menke@gsfc.nasa.gov> |
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| 86 | PR 601 |
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| 87 | * cpu_asm.S: Added __mips==32 support for R4000 processors running |
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| 88 | 32 bit code. Fixed #define problems that caused fpu code to |
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| 89 | always be included even when no fpu is present. |
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[be2ed3e] | 90 | |
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[0c9eaef] | 91 | 2004-04-03 Art Ferrer <arturo.b.ferrer@nasa.gov> |
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| 92 | |
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| 93 | PR 598/bsps |
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| 94 | * cpu_asm.S, rtems/score/cpu.h: Add save of floating point |
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| 95 | status/control register on context switches. Missing this register |
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| 96 | was causing intermittent floating point errors. |
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| 97 | |
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[5356c03] | 98 | 2003-09-04 Joel Sherrill <joel@OARcorp.com> |
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| 99 | |
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| 100 | * cpu.c, cpu_asm.S, rtems/score/cpu.h, rtems/score/mips.h, |
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| 101 | rtems/score/types.h: URL for license changed. |
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| 102 | |
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[7dcc3fe] | 103 | 2003-08-11 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 104 | |
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| 105 | * configure.ac: Use rtems-bugs@rtems.com as bug report email address. |
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| 106 | |
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[d2c26e4b] | 107 | 2003-03-06 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 108 | |
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| 109 | * configure.ac: Remove AC_CONFIG_AUX_DIR. |
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| 110 | |
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[53021d4] | 111 | 2002-12-11 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 112 | |
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| 113 | * configure.ac: Require autoconf-2.57 + automake-1.7.2. |
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| 114 | * Makefile.am: Eliminate C_O_FILES, S_O_FILES, libscorecpu_a_OBJECTS. |
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| 115 | |
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[47c0220] | 116 | 2002-11-19 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 117 | |
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| 118 | * configure.ac: Fix package name. |
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| 119 | |
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[9584c06] | 120 | 2002-11-04 Joel Sherrill <joel@OARcorp.com> |
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| 121 | |
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| 122 | * idtcpu.h: Removed warning. |
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| 123 | |
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[75749ff] | 124 | 2002-11-01 Joel Sherrill <joel@OARcorp.com> |
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| 125 | |
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| 126 | * idtcpu.h: Removed warnings. |
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| 127 | |
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[7a845e2f] | 128 | 2002-10-28 Joel Sherrill <joel@OARcorp.com> |
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| 129 | |
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| 130 | * idtcpu.h: Removed warning by turning extra token at the end of |
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| 131 | an endif into a comment. |
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| 132 | |
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[5c8b6b6] | 133 | 2002-10-25 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 134 | |
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| 135 | * configure.ac: Add nostdinc to AM_INIT_AUTOMAKE. |
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| 136 | |
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[f8cb04a5] | 137 | 2002-10-21 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 138 | |
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| 139 | * .cvsignore: Reformat. |
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| 140 | Add autom4te*cache. |
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| 141 | Remove autom4te.cache. |
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| 142 | |
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[5e39823] | 143 | 2002-08-14 Greg Menke <gregory.menke@gsfc.nasa.gov> |
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[a85d8ec] | 144 | |
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[5e39823] | 145 | * cpu_asm.S: Clarified some comments, removed code that forced |
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| 146 | SR_IEP on when returning from an interrupt. |
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[8c746fe] | 147 | |
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[a25b63b] | 148 | 2002-06-27 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 149 | |
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| 150 | * configure.ac: Add RTEMS_PROG_CCAS |
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| 151 | |
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[6f79a970] | 152 | 2002-06-27 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 153 | |
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| 154 | * configure.ac: Use AC_CONFIG_AUX_DIR(../../../..). |
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| 155 | Add AC_PROG_RANLIB. |
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| 156 | |
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[5e39823] | 157 | 2002-06-20 Greg Menke <gregory.menke@gsfc.nasa.gov> |
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| 158 | * cpu_asm.S: Added SR_IEO to context restore to fix isr disabled |
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| 159 | deadlock caused by interrupt arriving while dispatching. |
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| 160 | |
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[2f6261d] | 161 | 2002-06-17 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 162 | |
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| 163 | * Makefile.am: Include $(top_srcdir)/../../../automake/*.am. |
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| 164 | Use ../../../aclocal. |
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| 165 | |
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[eb4536c] | 166 | 2001-04-03 Joel Sherrill <joel@OARcorp.com> |
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| 167 | |
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| 168 | * Per PR94, all rtems/score/CPUtypes.h are named rtems/score/types.h. |
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| 169 | * rtems/score/mipstypes.h: Removed. |
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| 170 | * rtems/score/types.h: New file via CVS magic. |
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| 171 | * Makefile.am, rtems/score/cpu.h: Account for name change. |
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| 172 | |
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[7273b6e] | 173 | 2002-03-27 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 174 | |
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| 175 | * configure.ac: |
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| 176 | AC_INIT(package,_RTEMS_VERSION,_RTEMS_BUGS). |
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| 177 | AM_INIT_AUTOMAKE([no-define foreign 1.6]). |
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| 178 | * Makefile.am: Remove AUTOMAKE_OPTIONS. |
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| 179 | |
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[25d3d4d] | 180 | 2002-03-20 Greg Menke <gregory.menke@gsfc.nasa.gov> |
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| 181 | |
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| 182 | * cpu_asm.S: Now compiles on 4600 and 4650. |
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| 183 | |
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[293c0e30] | 184 | 2002-03-13 Greg Menke <gregory.menke@gsfc.nasa.gov> |
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[8264d23] | 185 | |
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[293c0e30] | 186 | * cpu_asm.S: Fixed a sneaky return from int w/ ints disabled bug. |
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| 187 | * rtems/score/cpu.h: Fixed register numbering in comments and made |
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| 188 | interrupt enable/disable more robust. |
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| 189 | |
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| 190 | 2002-03-05 Greg Menke <gregory.menke@gsfc.nasa.gov> |
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[8264d23] | 191 | * cpu_asm.S: Added support for the debug exception vector, cleaned |
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| 192 | up the exception processing & exception return stuff. Re-added |
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| 193 | EPC in the task context structure so the gdb stub will know where |
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| 194 | a thread is executing. Should've left it there in the first place... |
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| 195 | * idtcpu.h: Added support for the debug exception vector. |
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| 196 | * cpu.c: Added ___exceptionTaskStack to hold a pointer to the |
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| 197 | stack frame in an interrupt so context switch code can get the |
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| 198 | userspace EPC when scheduling. |
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| 199 | * rtems/score/cpu.h: Re-added EPC to the task context. |
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| 200 | |
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[bd1ecb0] | 201 | 2002-02-27 Greg Menke <gregory.menke@gsfc.nasa.gov> |
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| 202 | |
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| 203 | * cpu_asm.S: Fixed exception return address, modified FP context |
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| 204 | switch so FPU is properly enabled and also doesn't screw up the |
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| 205 | exception FP handling. |
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| 206 | * idtcpu.h: Added C0_TAR, the MIPS target address register used for |
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| 207 | returning from exceptions. |
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| 208 | * iregdef.h: Added R_TAR to the stack frame so the target address |
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| 209 | can be saved on a per-exception basis. The new entry is past the |
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| 210 | end of the frame gdb cares about, so doesn't affect gdb or cpu.h |
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| 211 | stuff. |
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| 212 | * rtems/score/cpu.h: added an #ifdef so cpu_asm.S can include it |
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[dc3848d0] | 213 | to obtain FPU defines without syntax errors generated by the C |
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[bd1ecb0] | 214 | defintions. |
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| 215 | * cpu.c: Improved interrupt level saves & restores. |
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| 216 | |
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[9099a85] | 217 | 2002-02-08 Joel Sherrill <joel@OARcorp.com> |
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| 218 | |
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| 219 | * iregdef.h, rtems/score/cpu.h: Reordered register in the |
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| 220 | exception stack frame to better match gdb's expectations. |
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| 221 | |
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[a37b8f95] | 222 | 2001-02-05 Joel Sherrill <joel@OARcorp.com> |
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| 223 | |
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| 224 | * cpu_asm.S: Enhanced to save/restore more registers on |
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| 225 | exceptions. |
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| 226 | * rtems/score/cpu.h (CPU_Interrupt_frame): Enhanced to list every |
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| 227 | register individually and document when it is saved. |
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| 228 | * idtcpu.h: Added constants for the coprocessor 1 registers |
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| 229 | revision and status. |
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| 230 | |
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[9535ba4] | 231 | 2001-02-05 Joel Sherrill <joel@OARcorp.com> |
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| 232 | |
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| 233 | * rtems/Makefile.am, rtems/score/Makefile.am: Removed again. |
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| 234 | |
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[0bc5329] | 235 | 2001-02-04 Joel Sherrill <joel@OARcorp.com> |
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| 236 | |
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| 237 | * rtems/score/cpu.h: IDLE task should not be FP. This was a mistake |
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| 238 | in the previous patch that has now been confirmed. |
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| 239 | |
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[e6dec71c] | 240 | 2001-02-01 Greg Menke <gregory.menke@gsfc.nasa.gov> |
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| 241 | |
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| 242 | * cpu.c: Enhancements and fixes for modifying the SR when changing |
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| 243 | the interrupt level. |
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| 244 | * cpu_asm.S: Fixed handling of FP enable bit so it is properly |
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| 245 | managed on a per-task basis, improved handling of interrupt levels, |
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| 246 | and made deferred FP contexts work on the MIPS. |
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| 247 | * rtems/score/cpu.h: Modified to support above changes. |
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| 248 | |
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[7a01fba1] | 249 | 2002-01-28 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 250 | |
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| 251 | * rtems/Makefile.am: Removed. |
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| 252 | * rtems/score/Makefile.am: Removed. |
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| 253 | * configure.ac: Reflect changes above. |
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| 254 | * Makefile.am: Reflect changes above. |
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| 255 | |
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[d49ce82] | 256 | 2002-02-09 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 257 | |
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| 258 | * asm.h: Remove #include <rtems/score/targopts.h>. |
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| 259 | Add #include <rtems/score/cpuopts.h>. |
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| 260 | * configure.ac: Remove RTEMS_CHECK_CUSTOM_BSP(RTEMS_BSP). |
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| 261 | |
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| 262 | |
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[e6dc43d] | 263 | 2001-12-20 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 264 | |
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| 265 | * configure.ac: Use RTEMS_ENV_RTEMSCPU. |
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| 266 | |
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[e9718415] | 267 | 2001-12-19 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 268 | |
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| 269 | * Makefile.am: Add multilib support. |
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| 270 | |
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[4db30283] | 271 | 2001-11-28 Joel Sherrill <joel@OARcorp.com>, |
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| 272 | |
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| 273 | This was tracked as PR91. |
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| 274 | * rtems/score/cpu.h: Added CPU_PROVIDES_ISR_IS_IN_PROGRESS macro which |
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| 275 | is used to specify if the port uses the standard macro for this (FALSE). |
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| 276 | A TRUE setting indicates the port provides its own implementation. |
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| 277 | |
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[f64f1816] | 278 | 2001-10-12 Joel Sherrill <joel@OARcorp.com> |
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| 279 | |
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| 280 | * cpu_asm.S: _CPU_Context_save_fp in was incorrectly in conditional |
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| 281 | compilation block with (CPU_HARDWARE_FP == FALSE). Reported by |
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| 282 | Wayne Bullaughey <wayne@wmi.com>. |
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| 283 | |
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[66387986] | 284 | 2001-10-11 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 285 | |
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| 286 | * .cvsignore: Add autom4te.cache for autoconf > 2.52. |
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| 287 | * configure.in: Remove. |
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| 288 | * configure.ac: New file, generated from configure.in by autoupdate. |
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| 289 | |
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[684eebc8] | 290 | 2001-09-23 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 291 | |
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| 292 | * rtems/score/Makefile.am: Use 'PREINSTALL_FILES ='. |
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| 293 | * Makefile.am: Use 'PREINSTALL_FILES ='. |
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| 294 | |
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[77b8106] | 295 | 2001-07-03 Joel Sherrill <joel@OARcorp.com> |
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| 296 | |
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| 297 | * cpu.c: Fixed typo. |
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| 298 | |
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[44ce2da1] | 299 | 2000-05-24 Joel Sherrill <joel@OARcorp.com> |
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| 300 | |
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| 301 | * rtems/score/mips.h: Added constants for MIPS exception numbers. |
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| 302 | All exceptions should be given low numbers and thus can be installed |
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| 303 | and processed in a uniform manner. Variances between various MIPS |
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| 304 | ISA levels were not accounted for. |
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| 305 | |
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[d26dce2] | 306 | 2001-05-24 Greg Menke <gregory.menke@gsfc.nasa.gov> |
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| 307 | |
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| 308 | * Assisted in design and debug by Joel Sherrill <joel@OARcorp.com>. |
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| 309 | * cpu_asm.S: Now works on Mongoose-V. Missed in previous patch. |
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| 310 | |
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[e2040ba] | 311 | 2001-05-22 Greg Menke <gregory.menke@gsfc.nasa.gov> |
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| 312 | |
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| 313 | * rtems/score/cpu.h: Add the interrupt stack structure and enhance |
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| 314 | the context initialization to account for floating point tasks. |
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| 315 | * rtems/score/mips.h: Added the routines mips_set_cause(), |
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| 316 | mips_get_fcr31(), and mips_set_fcr31(). |
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| 317 | * Assisted in design and debug by Joel Sherrill <joel@OARcorp.com>. |
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| 318 | |
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[c556d0ba] | 319 | 2001-05-07 Joel Sherrill <joel@OARcorp.com> |
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| 320 | |
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| 321 | * cpu_asm.S: Merged patches from Gregory Menke |
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| 322 | <Gregory.D.Menke.1@gsfc.nasa.gov> that clean up |
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| 323 | stack usage and include nops in the delay slots. |
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| 324 | |
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[176e1ed8] | 325 | 2001-04-20 Joel Sherrill <joel@OARcorp.com> |
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| 326 | |
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| 327 | * cpu_asm.S: Added code to save and restore SR and EPC to |
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| 328 | properly support nested interrupts. Note that the ISR |
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| 329 | (not RTEMS) enables interrupts allowing the nesting to occur. |
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| 330 | |
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[aa7f8a1f] | 331 | 2001-03-14 Joel Sherrill <joel@OARcorp.com> |
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| 332 | |
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| 333 | * cpu.c, rtems/score/cpu.h, rtems/score/mipstypes.h: |
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| 334 | Removed unused variable _CPU_Thread_dispatch_pointer |
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| 335 | and cleaned numerous comments. |
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| 336 | |
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[2e549dad] | 337 | 2001-03-13 Joel Sherrill <joel@OARcorp.com> |
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| 338 | |
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| 339 | * cpu.c, cpu_asm.S, iregdef.h, rtems/score/cpu.h, rtems/score/mips.h: |
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| 340 | Merged MIPS1 and MIPS3 code reducing the number of lines of assembly. |
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| 341 | Also reimplemented some assembly routines in C further reducing |
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| 342 | the amount of assembly and increasing maintainability. |
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| 343 | |
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[329509fb] | 344 | 2001-02-04 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 345 | |
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| 346 | * Makefile.am, rtems/score/Makefile.am: |
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| 347 | Apply include_*HEADERS instead of H_FILES. |
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| 348 | |
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[9c1dc8c] | 349 | 2001-01-12 Joel Sherrill <joel@OARcorp.com> |
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| 350 | |
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| 351 | * rtems/score/mips.h (mips_get_sr, mips_set_sr): Corrected |
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| 352 | register constraints from "general" to "register". |
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| 353 | |
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[16ad7ea] | 354 | 2001-01-09 Joel Sherrill <joel@OARcorp.com> |
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| 355 | |
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| 356 | * cpu_asm.S: Use SR_INTERRUPT_ENABLE_BITS instead of SR_XXX constants |
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| 357 | to make it easier to conditionalize the code for various ISA levels. |
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| 358 | |
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[1800f717] | 359 | 2001-01-08 Joel Sherrill <joel@OARcorp.com> |
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| 360 | |
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| 361 | * idtcpu.h: Commented out definition of "wait". It was stupid to |
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| 362 | use such a common word as a macro. |
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| 363 | * rtems/score/cpu.h (_CPU_ISR_Disable): Fixed for mips ISA 3. |
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| 364 | * rtems/score/mips.h: Added include of <idtcpu.h>. |
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| 365 | * rtems/score/mips.h (mips_enable_in_interrupt_mask): Corrected. |
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| 366 | |
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[9fd4f5c5] | 367 | 2001-01-03 Joel Sherrill <joel@OARcorp.com> |
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| 368 | |
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| 369 | * rtems/score/cpu.h: Added _CPU_Initialize_vectors(). |
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| 370 | * cpu_asm.S: Eliminated warning for duplicate definition of EXTERN. |
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| 371 | |
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[87e8f25] | 372 | 2000-12-19 Joel Sherrill <joel@OARcorp.com> |
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| 373 | |
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| 374 | * cpu_asm.S (_ISR_Handler): Return to the address in the EPC register. |
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| 375 | Previous code resulting in the interrupted immediately returning |
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| 376 | to the caller of the routine it was inside. |
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| 377 | |
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[3ad7c5d2] | 378 | 2000-12-19 Joel Sherrill <joel@OARcorp.com> |
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| 379 | |
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| 380 | * cpu.c (_CPU_Initialize): Do not initialize _ISR_Vector_table() here |
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| 381 | because it has not been allocated yet. |
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| 382 | |
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[797d88ba] | 383 | 2000-12-13 Joel Sherrill <joel@OARcorp.com> |
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| 384 | |
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| 385 | * cpu.c: Removed duplicate declaration for _ISR_Vector_table. |
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| 386 | * cpu_asm.S: Removed assembly language to vector ISR handler |
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| 387 | on MIPS ISA I. Now call mips_vector_isr_handlers() in libcpu or BSP. |
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| 388 | * rtems/score/cpu.h (CPU_INTERRUPT_NUMBER_OF_VECTORS): No |
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| 389 | longer a constant -- get the real value from libcpu. |
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| 390 | |
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[32f415d] | 391 | 2000-12-13 Joel Sherrill <joel@OARcorp.com> |
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| 392 | |
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| 393 | * cpu_asm.h: Removed. |
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| 394 | * Makefile.am: Remove cpu_asm.h. |
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| 395 | * rtems/score/mips64orion.h: Renamed mips.h. |
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| 396 | * rtems/score/mips.h: New file, formerly mips64orion.h. |
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| 397 | Header rewritten. |
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| 398 | (mips_get_sr, mips_set_sr, mips_enable_in_interrupt_mask, |
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| 399 | mips_disable_in_interrupt_mask): New macros. |
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| 400 | * rtems/score/Makefile.am: Reflect renaming mips64orion.h. |
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| 401 | * asm.h: Include <mips.h> not <mips64orion.h>. Now includes the |
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| 402 | few defines that were in <cpu_asm.h>. |
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| 403 | * cpu.c (_CPU_ISR_Get_level): Added MIPS ISA I version of this routine. |
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| 404 | MIPS ISA 3 is still in assembly for now. |
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| 405 | (_CPU_Thread_Idle_body): Rewrote in C. |
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| 406 | * cpu_asm.S: Rewrote file header. |
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| 407 | (FRAME,ENDFRAME) now in asm.h. |
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| 408 | (_CPU_ISR_Get_level): Removed ISA I version and rewrote in C. |
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| 409 | (_CPU_ISR_Set_level): Removed ISA I version and rewrote in C. |
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| 410 | (_CPU_Context_switch): MIPS ISA I now manages preserves SR_IEC and |
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| 411 | leaves other bits in SR alone on task switch. |
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| 412 | (mips_enable_interrupts,mips_disable_interrupts, |
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| 413 | mips_enable_global_interrupts,mips_disable_global_interrupts, |
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| 414 | disable_int, enable_int): Removed. |
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| 415 | (mips_get_sr): Rewritten as C macro. |
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| 416 | (_CPU_Thread_Idle_body): Rewritten in C. |
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| 417 | (init_exc_vecs): Rewritten in C as mips_install_isr_entries() and |
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| 418 | placed in libcpu. |
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| 419 | (exc_tlb_code, exc_xtlb_code, exc_cache_code, exc_norm_code): Moved |
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| 420 | to libcpu/mips/shared/interrupts. |
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| 421 | (general): Cleaned up comment blocks and #if 0 areas. |
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| 422 | * idtcpu.h: Made ifdef report an error. |
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| 423 | * iregdef.h: Removed warning. |
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| 424 | * rtems/score/cpu.h (CPU_INTERRUPT_NUMBER_OF_VECTORS): Now a variable |
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| 425 | number defined by libcpu. |
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| 426 | (_CPU_ISR_Disable, _CPU_ISR_Enable): Rewritten to use new routines |
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| 427 | to access SR. |
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| 428 | (_CPU_ISR_Set_level): Rewritten as macro for ISA I. |
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| 429 | (_CPU_Context_Initialize): Honor ISR level in task initialization. |
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| 430 | (_CPU_Fatal_halt): Use new _CPU_ISR_Disable() macro. |
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| 431 | |
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[5d7bfce3] | 432 | 2000-12-06 Joel Sherrill <joel@OARcorp.com> |
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| 433 | |
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| 434 | * rtems/score/cpu.h: When mips ISA level is 1, registers in the |
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| 435 | context should be 32 not 64 bits. |
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| 436 | |
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[7f8c11c] | 437 | 2000-11-30 Joel Sherrill <joel@OARcorp.com> |
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| 438 | |
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| 439 | * cpu_asm.S: Changed "_CPU_Ccontext_switch_restore: typo to |
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| 440 | correct name of _CPU_Context_switch_restore. Added dummy |
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| 441 | version of exc_utlb_code() so applications would link. |
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| 442 | |
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[feead226] | 443 | 2000-11-09 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 444 | |
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| 445 | * Makefile.am: Use ... instead of RTEMS_TOPdir in ACLOCAL_AMFLAGS. |
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| 446 | |
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[a314d3b4] | 447 | 2000-11-02 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 448 | |
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| 449 | * Makefile.am: Switch to ACLOCAL_AMFLAGS = -I $(RTEMS_TOPdir)/aclocal. |
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| 450 | |
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[5582de1] | 451 | 2000-10-25 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 452 | |
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| 453 | * Makefile.am: ACLOCAL_AMFLAGS= -I $(RTEMS_TOPdir)/macros. |
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| 454 | Switch to GNU canonicalization. |
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| 455 | |
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[fda47cd] | 456 | 2000-10-24 Alan Cudmore <alanc@linuxstart.com> and |
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| 457 | Joel Sherrill <joel@OARcorp.com> |
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| 458 | |
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| 459 | * This is a major reworking of the mips64orion port to use |
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| 460 | gcc predefines as much as possible and a big push to multilib |
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| 461 | the mips port. The mips64orion port was copied/renamed to mips |
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| 462 | to be more like other GNU tools. Alan did most of the technical |
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| 463 | work of determining how to map old macro names used by the mips64orion |
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| 464 | port to standard compiler macro definitions. Joel did the merge |
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| 465 | with CVS magic to keep individual file history and did the BSP |
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| 466 | modifications. Details follow: |
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| 467 | * Makefile.am: idtmon.h in mips64orion port not present. |
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| 468 | * asm.h: MIPS64ORION replaced with MIPS. Frame setup macros added. |
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| 469 | * cpu.c: Comments added. |
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| 470 | * cpu_asm.S: Conditionals changed. MIPS ISA level 1 support added. |
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| 471 | First attempt at exception/interrupt processing for ISA level 1 |
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| 472 | and minus any use of IDT/MON added. |
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| 473 | * idtcpu.h: Conditionals changed to use gcc predefines. |
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| 474 | * iregdef.h: Ditto. |
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| 475 | * cpu_asm.h: No real change. Merger required commit. |
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| 476 | * rtems/Makefile.am: Ditto. |
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| 477 | * rtems/score/Makefile.am: Ditto. |
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| 478 | * rtems/score/cpu.h: Change MIPS64ORION to MIPS. |
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| 479 | * rtems/score/mips64orion.h: Change MIPS64ORION to MIPS. Convert |
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| 480 | from using RTEMS_CPU_MODEL to gcc predefines to figre things out. |
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| 481 | |
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[d7118fd] | 482 | 2000-09-04 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 483 | |
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| 484 | * Makefile.am: Include compile.am. |
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| 485 | |
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[e94ad1fe] | 486 | 2000-08-10 Joel Sherrill <joel@OARcorp.com> |
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| 487 | |
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| 488 | * ChangeLog: New file. |
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