[af81910] | 1 | 2002-07-05 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 2 | |
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| 3 | * configure.ac: RTEMS_TOP(../../../..). |
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| 4 | |
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[e6938b4d] | 5 | 2002-07-03 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 6 | |
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| 7 | * rtems.c: Remove. |
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| 8 | * Makefile.am: Reflect changes above. |
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| 9 | |
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[8c746fe] | 10 | 2002-07-01 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 11 | |
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| 12 | * configure.ac: Remove RTEMS_PROJECT_ROOT. |
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| 13 | |
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[a25b63b] | 14 | 2002-06-27 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 15 | |
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| 16 | * configure.ac: Add RTEMS_PROG_CCAS |
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| 17 | |
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[6f79a970] | 18 | 2002-06-27 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 19 | |
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| 20 | * configure.ac: Use AC_CONFIG_AUX_DIR(../../../..). |
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| 21 | Add AC_PROG_RANLIB. |
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| 22 | |
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[2f6261d] | 23 | 2002-06-17 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 24 | |
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| 25 | * Makefile.am: Include $(top_srcdir)/../../../automake/*.am. |
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| 26 | Use ../../../aclocal. |
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| 27 | |
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[eb4536c] | 28 | 2001-04-03 Joel Sherrill <joel@OARcorp.com> |
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| 29 | |
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| 30 | * Per PR94, all rtems/score/CPUtypes.h are named rtems/score/types.h. |
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| 31 | * rtems/score/mipstypes.h: Removed. |
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| 32 | * rtems/score/types.h: New file via CVS magic. |
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| 33 | * Makefile.am, rtems/score/cpu.h: Account for name change. |
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| 34 | |
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[7273b6e] | 35 | 2002-03-27 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 36 | |
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| 37 | * configure.ac: |
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| 38 | AC_INIT(package,_RTEMS_VERSION,_RTEMS_BUGS). |
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| 39 | AM_INIT_AUTOMAKE([no-define foreign 1.6]). |
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| 40 | * Makefile.am: Remove AUTOMAKE_OPTIONS. |
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| 41 | |
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[25d3d4d] | 42 | 2002-03-20 Greg Menke <gregory.menke@gsfc.nasa.gov> |
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| 43 | |
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| 44 | * cpu_asm.S: Now compiles on 4600 and 4650. |
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| 45 | |
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[293c0e30] | 46 | 2002-03-13 Greg Menke <gregory.menke@gsfc.nasa.gov> |
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[8264d23] | 47 | |
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[293c0e30] | 48 | * cpu_asm.S: Fixed a sneaky return from int w/ ints disabled bug. |
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| 49 | * rtems/score/cpu.h: Fixed register numbering in comments and made |
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| 50 | interrupt enable/disable more robust. |
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| 51 | |
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| 52 | 2002-03-05 Greg Menke <gregory.menke@gsfc.nasa.gov> |
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[8264d23] | 53 | * cpu_asm.S: Added support for the debug exception vector, cleaned |
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| 54 | up the exception processing & exception return stuff. Re-added |
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| 55 | EPC in the task context structure so the gdb stub will know where |
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| 56 | a thread is executing. Should've left it there in the first place... |
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| 57 | * idtcpu.h: Added support for the debug exception vector. |
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| 58 | * cpu.c: Added ___exceptionTaskStack to hold a pointer to the |
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| 59 | stack frame in an interrupt so context switch code can get the |
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| 60 | userspace EPC when scheduling. |
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| 61 | * rtems/score/cpu.h: Re-added EPC to the task context. |
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| 62 | |
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[bd1ecb0] | 63 | 2002-02-27 Greg Menke <gregory.menke@gsfc.nasa.gov> |
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| 64 | |
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| 65 | * cpu_asm.S: Fixed exception return address, modified FP context |
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| 66 | switch so FPU is properly enabled and also doesn't screw up the |
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| 67 | exception FP handling. |
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| 68 | * idtcpu.h: Added C0_TAR, the MIPS target address register used for |
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| 69 | returning from exceptions. |
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| 70 | * iregdef.h: Added R_TAR to the stack frame so the target address |
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| 71 | can be saved on a per-exception basis. The new entry is past the |
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| 72 | end of the frame gdb cares about, so doesn't affect gdb or cpu.h |
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| 73 | stuff. |
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| 74 | * rtems/score/cpu.h: added an #ifdef so cpu_asm.S can include it |
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| 75 | to obtain FPU defines without systax errors generated by the C |
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| 76 | defintions. |
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| 77 | * cpu.c: Improved interrupt level saves & restores. |
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| 78 | |
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[9099a85] | 79 | 2002-02-08 Joel Sherrill <joel@OARcorp.com> |
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| 80 | |
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| 81 | * iregdef.h, rtems/score/cpu.h: Reordered register in the |
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| 82 | exception stack frame to better match gdb's expectations. |
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| 83 | |
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[a37b8f95] | 84 | 2001-02-05 Joel Sherrill <joel@OARcorp.com> |
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| 85 | |
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| 86 | * cpu_asm.S: Enhanced to save/restore more registers on |
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| 87 | exceptions. |
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| 88 | * rtems/score/cpu.h (CPU_Interrupt_frame): Enhanced to list every |
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| 89 | register individually and document when it is saved. |
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| 90 | * idtcpu.h: Added constants for the coprocessor 1 registers |
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| 91 | revision and status. |
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| 92 | |
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[9535ba4] | 93 | 2001-02-05 Joel Sherrill <joel@OARcorp.com> |
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| 94 | |
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| 95 | * rtems/Makefile.am, rtems/score/Makefile.am: Removed again. |
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| 96 | |
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[0bc5329] | 97 | 2001-02-04 Joel Sherrill <joel@OARcorp.com> |
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| 98 | |
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| 99 | * rtems/score/cpu.h: IDLE task should not be FP. This was a mistake |
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| 100 | in the previous patch that has now been confirmed. |
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| 101 | |
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[e6dec71c] | 102 | 2001-02-01 Greg Menke <gregory.menke@gsfc.nasa.gov> |
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| 103 | |
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| 104 | * cpu.c: Enhancements and fixes for modifying the SR when changing |
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| 105 | the interrupt level. |
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| 106 | * cpu_asm.S: Fixed handling of FP enable bit so it is properly |
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| 107 | managed on a per-task basis, improved handling of interrupt levels, |
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| 108 | and made deferred FP contexts work on the MIPS. |
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| 109 | * rtems/score/cpu.h: Modified to support above changes. |
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| 110 | |
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[7a01fba1] | 111 | 2002-01-28 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 112 | |
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| 113 | * rtems/Makefile.am: Removed. |
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| 114 | * rtems/score/Makefile.am: Removed. |
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| 115 | * configure.ac: Reflect changes above. |
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| 116 | * Makefile.am: Reflect changes above. |
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| 117 | |
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[d49ce82] | 118 | 2002-02-09 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 119 | |
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| 120 | * asm.h: Remove #include <rtems/score/targopts.h>. |
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| 121 | Add #include <rtems/score/cpuopts.h>. |
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| 122 | * configure.ac: Remove RTEMS_CHECK_CUSTOM_BSP(RTEMS_BSP). |
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| 123 | |
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| 124 | |
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[e6dc43d] | 125 | 2001-12-20 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 126 | |
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| 127 | * configure.ac: Use RTEMS_ENV_RTEMSCPU. |
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| 128 | |
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[e9718415] | 129 | 2001-12-19 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 130 | |
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| 131 | * Makefile.am: Add multilib support. |
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| 132 | |
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[4db30283] | 133 | 2001-11-28 Joel Sherrill <joel@OARcorp.com>, |
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| 134 | |
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| 135 | This was tracked as PR91. |
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| 136 | * rtems/score/cpu.h: Added CPU_PROVIDES_ISR_IS_IN_PROGRESS macro which |
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| 137 | is used to specify if the port uses the standard macro for this (FALSE). |
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| 138 | A TRUE setting indicates the port provides its own implementation. |
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| 139 | |
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[f64f1816] | 140 | 2001-10-12 Joel Sherrill <joel@OARcorp.com> |
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| 141 | |
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| 142 | * cpu_asm.S: _CPU_Context_save_fp in was incorrectly in conditional |
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| 143 | compilation block with (CPU_HARDWARE_FP == FALSE). Reported by |
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| 144 | Wayne Bullaughey <wayne@wmi.com>. |
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| 145 | |
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[66387986] | 146 | 2001-10-11 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 147 | |
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| 148 | * .cvsignore: Add autom4te.cache for autoconf > 2.52. |
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| 149 | * configure.in: Remove. |
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| 150 | * configure.ac: New file, generated from configure.in by autoupdate. |
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| 151 | |
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[684eebc8] | 152 | 2001-09-23 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 153 | |
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| 154 | * rtems/score/Makefile.am: Use 'PREINSTALL_FILES ='. |
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| 155 | * Makefile.am: Use 'PREINSTALL_FILES ='. |
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| 156 | |
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[77b8106] | 157 | 2001-07-03 Joel Sherrill <joel@OARcorp.com> |
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| 158 | |
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| 159 | * cpu.c: Fixed typo. |
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| 160 | |
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[44ce2da1] | 161 | 2000-05-24 Joel Sherrill <joel@OARcorp.com> |
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| 162 | |
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| 163 | * rtems/score/mips.h: Added constants for MIPS exception numbers. |
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| 164 | All exceptions should be given low numbers and thus can be installed |
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| 165 | and processed in a uniform manner. Variances between various MIPS |
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| 166 | ISA levels were not accounted for. |
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| 167 | |
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[d26dce2] | 168 | 2001-05-24 Greg Menke <gregory.menke@gsfc.nasa.gov> |
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| 169 | |
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| 170 | * Assisted in design and debug by Joel Sherrill <joel@OARcorp.com>. |
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| 171 | * cpu_asm.S: Now works on Mongoose-V. Missed in previous patch. |
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| 172 | |
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[e2040ba] | 173 | 2001-05-22 Greg Menke <gregory.menke@gsfc.nasa.gov> |
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| 174 | |
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| 175 | * rtems/score/cpu.h: Add the interrupt stack structure and enhance |
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| 176 | the context initialization to account for floating point tasks. |
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| 177 | * rtems/score/mips.h: Added the routines mips_set_cause(), |
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| 178 | mips_get_fcr31(), and mips_set_fcr31(). |
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| 179 | * Assisted in design and debug by Joel Sherrill <joel@OARcorp.com>. |
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| 180 | |
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[c556d0ba] | 181 | 2001-05-07 Joel Sherrill <joel@OARcorp.com> |
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| 182 | |
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| 183 | * cpu_asm.S: Merged patches from Gregory Menke |
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| 184 | <Gregory.D.Menke.1@gsfc.nasa.gov> that clean up |
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| 185 | stack usage and include nops in the delay slots. |
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| 186 | |
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[176e1ed8] | 187 | 2001-04-20 Joel Sherrill <joel@OARcorp.com> |
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| 188 | |
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| 189 | * cpu_asm.S: Added code to save and restore SR and EPC to |
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| 190 | properly support nested interrupts. Note that the ISR |
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| 191 | (not RTEMS) enables interrupts allowing the nesting to occur. |
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| 192 | |
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[aa7f8a1f] | 193 | 2001-03-14 Joel Sherrill <joel@OARcorp.com> |
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| 194 | |
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| 195 | * cpu.c, rtems/score/cpu.h, rtems/score/mipstypes.h: |
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| 196 | Removed unused variable _CPU_Thread_dispatch_pointer |
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| 197 | and cleaned numerous comments. |
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| 198 | |
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[2e549dad] | 199 | 2001-03-13 Joel Sherrill <joel@OARcorp.com> |
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| 200 | |
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| 201 | * cpu.c, cpu_asm.S, iregdef.h, rtems/score/cpu.h, rtems/score/mips.h: |
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| 202 | Merged MIPS1 and MIPS3 code reducing the number of lines of assembly. |
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| 203 | Also reimplemented some assembly routines in C further reducing |
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| 204 | the amount of assembly and increasing maintainability. |
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| 205 | |
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[329509fb] | 206 | 2001-02-04 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 207 | |
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| 208 | * Makefile.am, rtems/score/Makefile.am: |
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| 209 | Apply include_*HEADERS instead of H_FILES. |
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| 210 | |
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[9c1dc8c] | 211 | 2001-01-12 Joel Sherrill <joel@OARcorp.com> |
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| 212 | |
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| 213 | * rtems/score/mips.h (mips_get_sr, mips_set_sr): Corrected |
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| 214 | register constraints from "general" to "register". |
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| 215 | |
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[16ad7ea] | 216 | 2001-01-09 Joel Sherrill <joel@OARcorp.com> |
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| 217 | |
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| 218 | * cpu_asm.S: Use SR_INTERRUPT_ENABLE_BITS instead of SR_XXX constants |
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| 219 | to make it easier to conditionalize the code for various ISA levels. |
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| 220 | |
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[1800f717] | 221 | 2001-01-08 Joel Sherrill <joel@OARcorp.com> |
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| 222 | |
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| 223 | * idtcpu.h: Commented out definition of "wait". It was stupid to |
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| 224 | use such a common word as a macro. |
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| 225 | * rtems/score/cpu.h (_CPU_ISR_Disable): Fixed for mips ISA 3. |
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| 226 | * rtems/score/mips.h: Added include of <idtcpu.h>. |
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| 227 | * rtems/score/mips.h (mips_enable_in_interrupt_mask): Corrected. |
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| 228 | |
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[9fd4f5c5] | 229 | 2001-01-03 Joel Sherrill <joel@OARcorp.com> |
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| 230 | |
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| 231 | * rtems/score/cpu.h: Added _CPU_Initialize_vectors(). |
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| 232 | * cpu_asm.S: Eliminated warning for duplicate definition of EXTERN. |
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| 233 | |
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[87e8f25] | 234 | 2000-12-19 Joel Sherrill <joel@OARcorp.com> |
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| 235 | |
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| 236 | * cpu_asm.S (_ISR_Handler): Return to the address in the EPC register. |
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| 237 | Previous code resulting in the interrupted immediately returning |
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| 238 | to the caller of the routine it was inside. |
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| 239 | |
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[3ad7c5d2] | 240 | 2000-12-19 Joel Sherrill <joel@OARcorp.com> |
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| 241 | |
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| 242 | * cpu.c (_CPU_Initialize): Do not initialize _ISR_Vector_table() here |
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| 243 | because it has not been allocated yet. |
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| 244 | |
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[797d88ba] | 245 | 2000-12-13 Joel Sherrill <joel@OARcorp.com> |
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| 246 | |
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| 247 | * cpu.c: Removed duplicate declaration for _ISR_Vector_table. |
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| 248 | * cpu_asm.S: Removed assembly language to vector ISR handler |
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| 249 | on MIPS ISA I. Now call mips_vector_isr_handlers() in libcpu or BSP. |
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| 250 | * rtems/score/cpu.h (CPU_INTERRUPT_NUMBER_OF_VECTORS): No |
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| 251 | longer a constant -- get the real value from libcpu. |
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| 252 | |
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[32f415d] | 253 | 2000-12-13 Joel Sherrill <joel@OARcorp.com> |
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| 254 | |
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| 255 | * cpu_asm.h: Removed. |
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| 256 | * Makefile.am: Remove cpu_asm.h. |
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| 257 | * rtems/score/mips64orion.h: Renamed mips.h. |
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| 258 | * rtems/score/mips.h: New file, formerly mips64orion.h. |
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| 259 | Header rewritten. |
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| 260 | (mips_get_sr, mips_set_sr, mips_enable_in_interrupt_mask, |
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| 261 | mips_disable_in_interrupt_mask): New macros. |
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| 262 | * rtems/score/Makefile.am: Reflect renaming mips64orion.h. |
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| 263 | * asm.h: Include <mips.h> not <mips64orion.h>. Now includes the |
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| 264 | few defines that were in <cpu_asm.h>. |
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| 265 | * cpu.c (_CPU_ISR_Get_level): Added MIPS ISA I version of this routine. |
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| 266 | MIPS ISA 3 is still in assembly for now. |
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| 267 | (_CPU_Thread_Idle_body): Rewrote in C. |
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| 268 | * cpu_asm.S: Rewrote file header. |
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| 269 | (FRAME,ENDFRAME) now in asm.h. |
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| 270 | (_CPU_ISR_Get_level): Removed ISA I version and rewrote in C. |
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| 271 | (_CPU_ISR_Set_level): Removed ISA I version and rewrote in C. |
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| 272 | (_CPU_Context_switch): MIPS ISA I now manages preserves SR_IEC and |
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| 273 | leaves other bits in SR alone on task switch. |
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| 274 | (mips_enable_interrupts,mips_disable_interrupts, |
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| 275 | mips_enable_global_interrupts,mips_disable_global_interrupts, |
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| 276 | disable_int, enable_int): Removed. |
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| 277 | (mips_get_sr): Rewritten as C macro. |
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| 278 | (_CPU_Thread_Idle_body): Rewritten in C. |
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| 279 | (init_exc_vecs): Rewritten in C as mips_install_isr_entries() and |
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| 280 | placed in libcpu. |
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| 281 | (exc_tlb_code, exc_xtlb_code, exc_cache_code, exc_norm_code): Moved |
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| 282 | to libcpu/mips/shared/interrupts. |
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| 283 | (general): Cleaned up comment blocks and #if 0 areas. |
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| 284 | * idtcpu.h: Made ifdef report an error. |
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| 285 | * iregdef.h: Removed warning. |
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| 286 | * rtems/score/cpu.h (CPU_INTERRUPT_NUMBER_OF_VECTORS): Now a variable |
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| 287 | number defined by libcpu. |
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| 288 | (_CPU_ISR_Disable, _CPU_ISR_Enable): Rewritten to use new routines |
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| 289 | to access SR. |
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| 290 | (_CPU_ISR_Set_level): Rewritten as macro for ISA I. |
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| 291 | (_CPU_Context_Initialize): Honor ISR level in task initialization. |
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| 292 | (_CPU_Fatal_halt): Use new _CPU_ISR_Disable() macro. |
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| 293 | |
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[5d7bfce3] | 294 | 2000-12-06 Joel Sherrill <joel@OARcorp.com> |
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| 295 | |
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| 296 | * rtems/score/cpu.h: When mips ISA level is 1, registers in the |
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| 297 | context should be 32 not 64 bits. |
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| 298 | |
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[7f8c11c] | 299 | 2000-11-30 Joel Sherrill <joel@OARcorp.com> |
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| 300 | |
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| 301 | * cpu_asm.S: Changed "_CPU_Ccontext_switch_restore: typo to |
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| 302 | correct name of _CPU_Context_switch_restore. Added dummy |
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| 303 | version of exc_utlb_code() so applications would link. |
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| 304 | |
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[feead226] | 305 | 2000-11-09 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 306 | |
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| 307 | * Makefile.am: Use ... instead of RTEMS_TOPdir in ACLOCAL_AMFLAGS. |
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| 308 | |
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[a314d3b4] | 309 | 2000-11-02 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 310 | |
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| 311 | * Makefile.am: Switch to ACLOCAL_AMFLAGS = -I $(RTEMS_TOPdir)/aclocal. |
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| 312 | |
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[5582de1] | 313 | 2000-10-25 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 314 | |
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| 315 | * Makefile.am: ACLOCAL_AMFLAGS= -I $(RTEMS_TOPdir)/macros. |
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| 316 | Switch to GNU canonicalization. |
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| 317 | |
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[fda47cd] | 318 | 2000-10-24 Alan Cudmore <alanc@linuxstart.com> and |
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| 319 | Joel Sherrill <joel@OARcorp.com> |
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| 320 | |
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| 321 | * This is a major reworking of the mips64orion port to use |
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| 322 | gcc predefines as much as possible and a big push to multilib |
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| 323 | the mips port. The mips64orion port was copied/renamed to mips |
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| 324 | to be more like other GNU tools. Alan did most of the technical |
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| 325 | work of determining how to map old macro names used by the mips64orion |
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| 326 | port to standard compiler macro definitions. Joel did the merge |
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| 327 | with CVS magic to keep individual file history and did the BSP |
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| 328 | modifications. Details follow: |
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| 329 | * Makefile.am: idtmon.h in mips64orion port not present. |
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| 330 | * asm.h: MIPS64ORION replaced with MIPS. Frame setup macros added. |
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| 331 | * cpu.c: Comments added. |
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| 332 | * cpu_asm.S: Conditionals changed. MIPS ISA level 1 support added. |
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| 333 | First attempt at exception/interrupt processing for ISA level 1 |
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| 334 | and minus any use of IDT/MON added. |
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| 335 | * idtcpu.h: Conditionals changed to use gcc predefines. |
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| 336 | * iregdef.h: Ditto. |
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| 337 | * cpu_asm.h: No real change. Merger required commit. |
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| 338 | * rtems/Makefile.am: Ditto. |
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| 339 | * rtems/score/Makefile.am: Ditto. |
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| 340 | * rtems/score/cpu.h: Change MIPS64ORION to MIPS. |
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| 341 | * rtems/score/mips64orion.h: Change MIPS64ORION to MIPS. Convert |
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| 342 | from using RTEMS_CPU_MODEL to gcc predefines to figre things out. |
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| 343 | |
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[d7118fd] | 344 | 2000-09-04 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 345 | |
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| 346 | * Makefile.am: Include compile.am. |
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| 347 | |
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[e94ad1fe] | 348 | 2000-08-10 Joel Sherrill <joel@OARcorp.com> |
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| 349 | |
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| 350 | * ChangeLog: New file. |
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