[5ff0481] | 1 | 2004-01-28 Ralf Corsepius <ralf.corsepiu@rtems.org> |
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| 2 | |
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| 3 | * asm.h, rtems/score/cpu.h, rtems/score/mips.h, rtems/score/types.h: |
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| 4 | New header guards. |
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| 5 | |
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[609b924] | 6 | 2005-01-24 Ralf Corsepius <ralf.corsepius@rtems.org> |
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| 7 | |
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| 8 | * rtems/score/types.h: Remove signed8, signed16, signed32, |
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| 9 | unsigned8, unsigned16, unsigned32. |
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| 10 | |
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[ec8973ed] | 11 | 2005-01-24 Ralf Corsepius <ralf.corsepius@rtems.org> |
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| 12 | |
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| 13 | * rtems/score/cpu.h: *_swap_u32( uint32_t ). |
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| 14 | |
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[b9b531f] | 15 | 2005-01-24 Ralf Corsepius <ralf.corsepius@rtems.org> |
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| 16 | |
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| 17 | * rtems/score/types.h: #include <rtems/stdint.h>. |
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| 18 | |
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[28e9f45] | 19 | 2005-01-07 Joel Sherrill <joel@OARcorp.com> |
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| 20 | |
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| 21 | * rtems/score/cpu.h: Remove warnings. |
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| 22 | |
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[2bc236ba] | 23 | 2005-01-07 Ralf Corsepius <ralf.corsepius@freenet.de> |
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| 24 | |
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| 25 | * Makefile.am: Eliminate CFLAGS_OPTIMIZE_V. |
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| 26 | |
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[e1765dd4] | 27 | 2005-01-03 Greg Menke <gregory.menke@gsfc.nasa.gov> |
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[dc7f3476] | 28 | |
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[e1765dd4] | 29 | PR 739 |
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| 30 | * iregdef.h: Fixes gcc warning about redundant definition of R_SZ |
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| 31 | when compiling cpu_asm.S. Problem was a #define sneaked in in |
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| 32 | version 1.11, no ill effects would have only affected R4000 |
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| 33 | builds. |
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| 34 | |
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[0b2bcb1] | 35 | 2005-01-03 Greg Menke <gregory.menke@gsfc.nasa.gov> |
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[dc7f3476] | 36 | |
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[0b2bcb1] | 37 | PR 737 |
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| 38 | * cpu_asm.S: Fixes gcc warning about instructions in branch delay |
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| 39 | slot when compiling cpu_asm.S |
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| 40 | |
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[f346774d] | 41 | 2005-01-01 Ralf Corsepius <ralf.corsepius@rtems.org> |
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| 42 | |
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| 43 | * Makefile.am: Remove build-variant support. |
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| 44 | |
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[5194a28] | 45 | 2004-12-02 Greg Menke <gregory.menke@gsfc.nasa.gov> |
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[dc7f3476] | 46 | |
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[5194a28] | 47 | PR 730 |
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| 48 | * cpu_asm.S: Collected PR 601 changes for commit to cvshead |
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[dc7f3476] | 49 | for rtems-4.7. |
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[78d4816] | 50 | |
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[c181345] | 51 | 2004-04-09 Joel Sherrill <joel@OARcorp.com> |
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| 52 | |
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| 53 | PR 605/bsps |
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| 54 | * cpu.c: Do not use C++ style comments. |
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| 55 | |
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[5194a28] | 56 | 2004-04-07 Greg Menke <gregory.menke@gsfc.nasa.gov> |
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| 57 | PR 601 |
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| 58 | * cpu_asm.S: Added __mips==32 support for R4000 processors running |
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| 59 | 32 bit code. Fixed #define problems that caused fpu code to |
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| 60 | always be included even when no fpu is present. |
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[be2ed3e] | 61 | |
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[0c9eaef] | 62 | 2004-04-03 Art Ferrer <arturo.b.ferrer@nasa.gov> |
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| 63 | |
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| 64 | PR 598/bsps |
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| 65 | * cpu_asm.S, rtems/score/cpu.h: Add save of floating point |
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| 66 | status/control register on context switches. Missing this register |
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| 67 | was causing intermittent floating point errors. |
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| 68 | |
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[5356c03] | 69 | 2003-09-04 Joel Sherrill <joel@OARcorp.com> |
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| 70 | |
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| 71 | * cpu.c, cpu_asm.S, rtems/score/cpu.h, rtems/score/mips.h, |
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| 72 | rtems/score/types.h: URL for license changed. |
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| 73 | |
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[7dcc3fe] | 74 | 2003-08-11 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 75 | |
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| 76 | * configure.ac: Use rtems-bugs@rtems.com as bug report email address. |
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| 77 | |
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[d2c26e4b] | 78 | 2003-03-06 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 79 | |
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| 80 | * configure.ac: Remove AC_CONFIG_AUX_DIR. |
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| 81 | |
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[53021d4] | 82 | 2002-12-11 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 83 | |
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| 84 | * configure.ac: Require autoconf-2.57 + automake-1.7.2. |
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| 85 | * Makefile.am: Eliminate C_O_FILES, S_O_FILES, libscorecpu_a_OBJECTS. |
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| 86 | |
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[47c0220] | 87 | 2002-11-19 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 88 | |
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| 89 | * configure.ac: Fix package name. |
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| 90 | |
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[9584c06] | 91 | 2002-11-04 Joel Sherrill <joel@OARcorp.com> |
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| 92 | |
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| 93 | * idtcpu.h: Removed warning. |
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| 94 | |
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[75749ff] | 95 | 2002-11-01 Joel Sherrill <joel@OARcorp.com> |
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| 96 | |
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| 97 | * idtcpu.h: Removed warnings. |
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| 98 | |
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[7a845e2f] | 99 | 2002-10-28 Joel Sherrill <joel@OARcorp.com> |
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| 100 | |
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| 101 | * idtcpu.h: Removed warning by turning extra token at the end of |
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| 102 | an endif into a comment. |
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| 103 | |
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[5c8b6b6] | 104 | 2002-10-25 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 105 | |
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| 106 | * configure.ac: Add nostdinc to AM_INIT_AUTOMAKE. |
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| 107 | |
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[f8cb04a5] | 108 | 2002-10-21 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 109 | |
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| 110 | * .cvsignore: Reformat. |
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| 111 | Add autom4te*cache. |
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| 112 | Remove autom4te.cache. |
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| 113 | |
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[5e39823] | 114 | 2002-08-14 Greg Menke <gregory.menke@gsfc.nasa.gov> |
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[a85d8ec] | 115 | |
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[5e39823] | 116 | * cpu_asm.S: Clarified some comments, removed code that forced |
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| 117 | SR_IEP on when returning from an interrupt. |
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[8c746fe] | 118 | |
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[a25b63b] | 119 | 2002-06-27 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 120 | |
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| 121 | * configure.ac: Add RTEMS_PROG_CCAS |
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| 122 | |
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[6f79a970] | 123 | 2002-06-27 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 124 | |
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| 125 | * configure.ac: Use AC_CONFIG_AUX_DIR(../../../..). |
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| 126 | Add AC_PROG_RANLIB. |
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| 127 | |
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[5e39823] | 128 | 2002-06-20 Greg Menke <gregory.menke@gsfc.nasa.gov> |
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| 129 | * cpu_asm.S: Added SR_IEO to context restore to fix isr disabled |
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| 130 | deadlock caused by interrupt arriving while dispatching. |
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| 131 | |
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[2f6261d] | 132 | 2002-06-17 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 133 | |
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| 134 | * Makefile.am: Include $(top_srcdir)/../../../automake/*.am. |
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| 135 | Use ../../../aclocal. |
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| 136 | |
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[eb4536c] | 137 | 2001-04-03 Joel Sherrill <joel@OARcorp.com> |
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| 138 | |
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| 139 | * Per PR94, all rtems/score/CPUtypes.h are named rtems/score/types.h. |
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| 140 | * rtems/score/mipstypes.h: Removed. |
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| 141 | * rtems/score/types.h: New file via CVS magic. |
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| 142 | * Makefile.am, rtems/score/cpu.h: Account for name change. |
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| 143 | |
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[7273b6e] | 144 | 2002-03-27 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 145 | |
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| 146 | * configure.ac: |
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| 147 | AC_INIT(package,_RTEMS_VERSION,_RTEMS_BUGS). |
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| 148 | AM_INIT_AUTOMAKE([no-define foreign 1.6]). |
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| 149 | * Makefile.am: Remove AUTOMAKE_OPTIONS. |
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| 150 | |
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[25d3d4d] | 151 | 2002-03-20 Greg Menke <gregory.menke@gsfc.nasa.gov> |
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| 152 | |
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| 153 | * cpu_asm.S: Now compiles on 4600 and 4650. |
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| 154 | |
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[293c0e30] | 155 | 2002-03-13 Greg Menke <gregory.menke@gsfc.nasa.gov> |
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[8264d23] | 156 | |
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[293c0e30] | 157 | * cpu_asm.S: Fixed a sneaky return from int w/ ints disabled bug. |
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| 158 | * rtems/score/cpu.h: Fixed register numbering in comments and made |
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| 159 | interrupt enable/disable more robust. |
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| 160 | |
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| 161 | 2002-03-05 Greg Menke <gregory.menke@gsfc.nasa.gov> |
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[8264d23] | 162 | * cpu_asm.S: Added support for the debug exception vector, cleaned |
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| 163 | up the exception processing & exception return stuff. Re-added |
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| 164 | EPC in the task context structure so the gdb stub will know where |
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| 165 | a thread is executing. Should've left it there in the first place... |
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| 166 | * idtcpu.h: Added support for the debug exception vector. |
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| 167 | * cpu.c: Added ___exceptionTaskStack to hold a pointer to the |
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| 168 | stack frame in an interrupt so context switch code can get the |
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| 169 | userspace EPC when scheduling. |
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| 170 | * rtems/score/cpu.h: Re-added EPC to the task context. |
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| 171 | |
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[bd1ecb0] | 172 | 2002-02-27 Greg Menke <gregory.menke@gsfc.nasa.gov> |
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| 173 | |
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| 174 | * cpu_asm.S: Fixed exception return address, modified FP context |
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| 175 | switch so FPU is properly enabled and also doesn't screw up the |
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| 176 | exception FP handling. |
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| 177 | * idtcpu.h: Added C0_TAR, the MIPS target address register used for |
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| 178 | returning from exceptions. |
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| 179 | * iregdef.h: Added R_TAR to the stack frame so the target address |
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| 180 | can be saved on a per-exception basis. The new entry is past the |
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| 181 | end of the frame gdb cares about, so doesn't affect gdb or cpu.h |
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| 182 | stuff. |
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| 183 | * rtems/score/cpu.h: added an #ifdef so cpu_asm.S can include it |
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[dc3848d0] | 184 | to obtain FPU defines without syntax errors generated by the C |
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[bd1ecb0] | 185 | defintions. |
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| 186 | * cpu.c: Improved interrupt level saves & restores. |
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| 187 | |
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[9099a85] | 188 | 2002-02-08 Joel Sherrill <joel@OARcorp.com> |
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| 189 | |
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| 190 | * iregdef.h, rtems/score/cpu.h: Reordered register in the |
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| 191 | exception stack frame to better match gdb's expectations. |
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| 192 | |
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[a37b8f95] | 193 | 2001-02-05 Joel Sherrill <joel@OARcorp.com> |
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| 194 | |
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| 195 | * cpu_asm.S: Enhanced to save/restore more registers on |
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| 196 | exceptions. |
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| 197 | * rtems/score/cpu.h (CPU_Interrupt_frame): Enhanced to list every |
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| 198 | register individually and document when it is saved. |
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| 199 | * idtcpu.h: Added constants for the coprocessor 1 registers |
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| 200 | revision and status. |
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| 201 | |
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[9535ba4] | 202 | 2001-02-05 Joel Sherrill <joel@OARcorp.com> |
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| 203 | |
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| 204 | * rtems/Makefile.am, rtems/score/Makefile.am: Removed again. |
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| 205 | |
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[0bc5329] | 206 | 2001-02-04 Joel Sherrill <joel@OARcorp.com> |
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| 207 | |
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| 208 | * rtems/score/cpu.h: IDLE task should not be FP. This was a mistake |
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| 209 | in the previous patch that has now been confirmed. |
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| 210 | |
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[e6dec71c] | 211 | 2001-02-01 Greg Menke <gregory.menke@gsfc.nasa.gov> |
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| 212 | |
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| 213 | * cpu.c: Enhancements and fixes for modifying the SR when changing |
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| 214 | the interrupt level. |
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| 215 | * cpu_asm.S: Fixed handling of FP enable bit so it is properly |
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| 216 | managed on a per-task basis, improved handling of interrupt levels, |
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| 217 | and made deferred FP contexts work on the MIPS. |
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| 218 | * rtems/score/cpu.h: Modified to support above changes. |
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| 219 | |
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[7a01fba1] | 220 | 2002-01-28 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 221 | |
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| 222 | * rtems/Makefile.am: Removed. |
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| 223 | * rtems/score/Makefile.am: Removed. |
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| 224 | * configure.ac: Reflect changes above. |
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| 225 | * Makefile.am: Reflect changes above. |
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| 226 | |
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[d49ce82] | 227 | 2002-02-09 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 228 | |
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| 229 | * asm.h: Remove #include <rtems/score/targopts.h>. |
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| 230 | Add #include <rtems/score/cpuopts.h>. |
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| 231 | * configure.ac: Remove RTEMS_CHECK_CUSTOM_BSP(RTEMS_BSP). |
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| 232 | |
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| 233 | |
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[e6dc43d] | 234 | 2001-12-20 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 235 | |
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| 236 | * configure.ac: Use RTEMS_ENV_RTEMSCPU. |
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| 237 | |
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[e9718415] | 238 | 2001-12-19 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 239 | |
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| 240 | * Makefile.am: Add multilib support. |
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| 241 | |
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[4db30283] | 242 | 2001-11-28 Joel Sherrill <joel@OARcorp.com>, |
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| 243 | |
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| 244 | This was tracked as PR91. |
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| 245 | * rtems/score/cpu.h: Added CPU_PROVIDES_ISR_IS_IN_PROGRESS macro which |
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| 246 | is used to specify if the port uses the standard macro for this (FALSE). |
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| 247 | A TRUE setting indicates the port provides its own implementation. |
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| 248 | |
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[f64f1816] | 249 | 2001-10-12 Joel Sherrill <joel@OARcorp.com> |
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| 250 | |
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| 251 | * cpu_asm.S: _CPU_Context_save_fp in was incorrectly in conditional |
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| 252 | compilation block with (CPU_HARDWARE_FP == FALSE). Reported by |
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| 253 | Wayne Bullaughey <wayne@wmi.com>. |
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| 254 | |
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[66387986] | 255 | 2001-10-11 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 256 | |
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| 257 | * .cvsignore: Add autom4te.cache for autoconf > 2.52. |
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| 258 | * configure.in: Remove. |
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| 259 | * configure.ac: New file, generated from configure.in by autoupdate. |
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| 260 | |
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[684eebc8] | 261 | 2001-09-23 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 262 | |
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| 263 | * rtems/score/Makefile.am: Use 'PREINSTALL_FILES ='. |
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| 264 | * Makefile.am: Use 'PREINSTALL_FILES ='. |
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| 265 | |
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[77b8106] | 266 | 2001-07-03 Joel Sherrill <joel@OARcorp.com> |
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| 267 | |
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| 268 | * cpu.c: Fixed typo. |
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| 269 | |
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[44ce2da1] | 270 | 2000-05-24 Joel Sherrill <joel@OARcorp.com> |
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| 271 | |
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| 272 | * rtems/score/mips.h: Added constants for MIPS exception numbers. |
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| 273 | All exceptions should be given low numbers and thus can be installed |
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| 274 | and processed in a uniform manner. Variances between various MIPS |
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| 275 | ISA levels were not accounted for. |
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| 276 | |
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[d26dce2] | 277 | 2001-05-24 Greg Menke <gregory.menke@gsfc.nasa.gov> |
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| 278 | |
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| 279 | * Assisted in design and debug by Joel Sherrill <joel@OARcorp.com>. |
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| 280 | * cpu_asm.S: Now works on Mongoose-V. Missed in previous patch. |
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| 281 | |
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[e2040ba] | 282 | 2001-05-22 Greg Menke <gregory.menke@gsfc.nasa.gov> |
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| 283 | |
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| 284 | * rtems/score/cpu.h: Add the interrupt stack structure and enhance |
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| 285 | the context initialization to account for floating point tasks. |
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| 286 | * rtems/score/mips.h: Added the routines mips_set_cause(), |
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| 287 | mips_get_fcr31(), and mips_set_fcr31(). |
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| 288 | * Assisted in design and debug by Joel Sherrill <joel@OARcorp.com>. |
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| 289 | |
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[c556d0ba] | 290 | 2001-05-07 Joel Sherrill <joel@OARcorp.com> |
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| 291 | |
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| 292 | * cpu_asm.S: Merged patches from Gregory Menke |
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| 293 | <Gregory.D.Menke.1@gsfc.nasa.gov> that clean up |
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| 294 | stack usage and include nops in the delay slots. |
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| 295 | |
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[176e1ed8] | 296 | 2001-04-20 Joel Sherrill <joel@OARcorp.com> |
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| 297 | |
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| 298 | * cpu_asm.S: Added code to save and restore SR and EPC to |
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| 299 | properly support nested interrupts. Note that the ISR |
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| 300 | (not RTEMS) enables interrupts allowing the nesting to occur. |
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| 301 | |
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[aa7f8a1f] | 302 | 2001-03-14 Joel Sherrill <joel@OARcorp.com> |
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| 303 | |
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| 304 | * cpu.c, rtems/score/cpu.h, rtems/score/mipstypes.h: |
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| 305 | Removed unused variable _CPU_Thread_dispatch_pointer |
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| 306 | and cleaned numerous comments. |
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| 307 | |
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[2e549dad] | 308 | 2001-03-13 Joel Sherrill <joel@OARcorp.com> |
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| 309 | |
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| 310 | * cpu.c, cpu_asm.S, iregdef.h, rtems/score/cpu.h, rtems/score/mips.h: |
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| 311 | Merged MIPS1 and MIPS3 code reducing the number of lines of assembly. |
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| 312 | Also reimplemented some assembly routines in C further reducing |
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| 313 | the amount of assembly and increasing maintainability. |
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| 314 | |
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[329509fb] | 315 | 2001-02-04 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 316 | |
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| 317 | * Makefile.am, rtems/score/Makefile.am: |
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| 318 | Apply include_*HEADERS instead of H_FILES. |
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| 319 | |
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[9c1dc8c] | 320 | 2001-01-12 Joel Sherrill <joel@OARcorp.com> |
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| 321 | |
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| 322 | * rtems/score/mips.h (mips_get_sr, mips_set_sr): Corrected |
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| 323 | register constraints from "general" to "register". |
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| 324 | |
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[16ad7ea] | 325 | 2001-01-09 Joel Sherrill <joel@OARcorp.com> |
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| 326 | |
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| 327 | * cpu_asm.S: Use SR_INTERRUPT_ENABLE_BITS instead of SR_XXX constants |
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| 328 | to make it easier to conditionalize the code for various ISA levels. |
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| 329 | |
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[1800f717] | 330 | 2001-01-08 Joel Sherrill <joel@OARcorp.com> |
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| 331 | |
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| 332 | * idtcpu.h: Commented out definition of "wait". It was stupid to |
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| 333 | use such a common word as a macro. |
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| 334 | * rtems/score/cpu.h (_CPU_ISR_Disable): Fixed for mips ISA 3. |
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| 335 | * rtems/score/mips.h: Added include of <idtcpu.h>. |
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| 336 | * rtems/score/mips.h (mips_enable_in_interrupt_mask): Corrected. |
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| 337 | |
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[9fd4f5c5] | 338 | 2001-01-03 Joel Sherrill <joel@OARcorp.com> |
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| 339 | |
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| 340 | * rtems/score/cpu.h: Added _CPU_Initialize_vectors(). |
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| 341 | * cpu_asm.S: Eliminated warning for duplicate definition of EXTERN. |
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| 342 | |
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[87e8f25] | 343 | 2000-12-19 Joel Sherrill <joel@OARcorp.com> |
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| 344 | |
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| 345 | * cpu_asm.S (_ISR_Handler): Return to the address in the EPC register. |
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| 346 | Previous code resulting in the interrupted immediately returning |
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| 347 | to the caller of the routine it was inside. |
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| 348 | |
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[3ad7c5d2] | 349 | 2000-12-19 Joel Sherrill <joel@OARcorp.com> |
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| 350 | |
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| 351 | * cpu.c (_CPU_Initialize): Do not initialize _ISR_Vector_table() here |
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| 352 | because it has not been allocated yet. |
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| 353 | |
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[797d88ba] | 354 | 2000-12-13 Joel Sherrill <joel@OARcorp.com> |
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| 355 | |
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| 356 | * cpu.c: Removed duplicate declaration for _ISR_Vector_table. |
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| 357 | * cpu_asm.S: Removed assembly language to vector ISR handler |
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| 358 | on MIPS ISA I. Now call mips_vector_isr_handlers() in libcpu or BSP. |
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| 359 | * rtems/score/cpu.h (CPU_INTERRUPT_NUMBER_OF_VECTORS): No |
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| 360 | longer a constant -- get the real value from libcpu. |
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| 361 | |
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[32f415d] | 362 | 2000-12-13 Joel Sherrill <joel@OARcorp.com> |
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| 363 | |
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| 364 | * cpu_asm.h: Removed. |
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| 365 | * Makefile.am: Remove cpu_asm.h. |
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| 366 | * rtems/score/mips64orion.h: Renamed mips.h. |
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| 367 | * rtems/score/mips.h: New file, formerly mips64orion.h. |
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| 368 | Header rewritten. |
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| 369 | (mips_get_sr, mips_set_sr, mips_enable_in_interrupt_mask, |
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| 370 | mips_disable_in_interrupt_mask): New macros. |
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| 371 | * rtems/score/Makefile.am: Reflect renaming mips64orion.h. |
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| 372 | * asm.h: Include <mips.h> not <mips64orion.h>. Now includes the |
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| 373 | few defines that were in <cpu_asm.h>. |
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| 374 | * cpu.c (_CPU_ISR_Get_level): Added MIPS ISA I version of this routine. |
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| 375 | MIPS ISA 3 is still in assembly for now. |
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| 376 | (_CPU_Thread_Idle_body): Rewrote in C. |
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| 377 | * cpu_asm.S: Rewrote file header. |
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| 378 | (FRAME,ENDFRAME) now in asm.h. |
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| 379 | (_CPU_ISR_Get_level): Removed ISA I version and rewrote in C. |
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| 380 | (_CPU_ISR_Set_level): Removed ISA I version and rewrote in C. |
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| 381 | (_CPU_Context_switch): MIPS ISA I now manages preserves SR_IEC and |
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| 382 | leaves other bits in SR alone on task switch. |
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| 383 | (mips_enable_interrupts,mips_disable_interrupts, |
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| 384 | mips_enable_global_interrupts,mips_disable_global_interrupts, |
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| 385 | disable_int, enable_int): Removed. |
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| 386 | (mips_get_sr): Rewritten as C macro. |
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| 387 | (_CPU_Thread_Idle_body): Rewritten in C. |
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| 388 | (init_exc_vecs): Rewritten in C as mips_install_isr_entries() and |
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| 389 | placed in libcpu. |
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| 390 | (exc_tlb_code, exc_xtlb_code, exc_cache_code, exc_norm_code): Moved |
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| 391 | to libcpu/mips/shared/interrupts. |
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| 392 | (general): Cleaned up comment blocks and #if 0 areas. |
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| 393 | * idtcpu.h: Made ifdef report an error. |
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| 394 | * iregdef.h: Removed warning. |
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| 395 | * rtems/score/cpu.h (CPU_INTERRUPT_NUMBER_OF_VECTORS): Now a variable |
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| 396 | number defined by libcpu. |
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| 397 | (_CPU_ISR_Disable, _CPU_ISR_Enable): Rewritten to use new routines |
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| 398 | to access SR. |
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| 399 | (_CPU_ISR_Set_level): Rewritten as macro for ISA I. |
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| 400 | (_CPU_Context_Initialize): Honor ISR level in task initialization. |
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| 401 | (_CPU_Fatal_halt): Use new _CPU_ISR_Disable() macro. |
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| 402 | |
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[5d7bfce3] | 403 | 2000-12-06 Joel Sherrill <joel@OARcorp.com> |
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| 404 | |
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| 405 | * rtems/score/cpu.h: When mips ISA level is 1, registers in the |
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| 406 | context should be 32 not 64 bits. |
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| 407 | |
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[7f8c11c] | 408 | 2000-11-30 Joel Sherrill <joel@OARcorp.com> |
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| 409 | |
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| 410 | * cpu_asm.S: Changed "_CPU_Ccontext_switch_restore: typo to |
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| 411 | correct name of _CPU_Context_switch_restore. Added dummy |
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| 412 | version of exc_utlb_code() so applications would link. |
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| 413 | |
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[feead226] | 414 | 2000-11-09 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 415 | |
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| 416 | * Makefile.am: Use ... instead of RTEMS_TOPdir in ACLOCAL_AMFLAGS. |
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| 417 | |
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[a314d3b4] | 418 | 2000-11-02 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 419 | |
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| 420 | * Makefile.am: Switch to ACLOCAL_AMFLAGS = -I $(RTEMS_TOPdir)/aclocal. |
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| 421 | |
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[5582de1] | 422 | 2000-10-25 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 423 | |
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| 424 | * Makefile.am: ACLOCAL_AMFLAGS= -I $(RTEMS_TOPdir)/macros. |
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| 425 | Switch to GNU canonicalization. |
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| 426 | |
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[fda47cd] | 427 | 2000-10-24 Alan Cudmore <alanc@linuxstart.com> and |
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| 428 | Joel Sherrill <joel@OARcorp.com> |
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| 429 | |
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| 430 | * This is a major reworking of the mips64orion port to use |
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| 431 | gcc predefines as much as possible and a big push to multilib |
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| 432 | the mips port. The mips64orion port was copied/renamed to mips |
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| 433 | to be more like other GNU tools. Alan did most of the technical |
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| 434 | work of determining how to map old macro names used by the mips64orion |
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| 435 | port to standard compiler macro definitions. Joel did the merge |
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| 436 | with CVS magic to keep individual file history and did the BSP |
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| 437 | modifications. Details follow: |
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| 438 | * Makefile.am: idtmon.h in mips64orion port not present. |
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| 439 | * asm.h: MIPS64ORION replaced with MIPS. Frame setup macros added. |
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| 440 | * cpu.c: Comments added. |
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| 441 | * cpu_asm.S: Conditionals changed. MIPS ISA level 1 support added. |
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| 442 | First attempt at exception/interrupt processing for ISA level 1 |
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| 443 | and minus any use of IDT/MON added. |
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| 444 | * idtcpu.h: Conditionals changed to use gcc predefines. |
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| 445 | * iregdef.h: Ditto. |
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| 446 | * cpu_asm.h: No real change. Merger required commit. |
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| 447 | * rtems/Makefile.am: Ditto. |
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| 448 | * rtems/score/Makefile.am: Ditto. |
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| 449 | * rtems/score/cpu.h: Change MIPS64ORION to MIPS. |
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| 450 | * rtems/score/mips64orion.h: Change MIPS64ORION to MIPS. Convert |
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| 451 | from using RTEMS_CPU_MODEL to gcc predefines to figre things out. |
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| 452 | |
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[d7118fd] | 453 | 2000-09-04 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 454 | |
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| 455 | * Makefile.am: Include compile.am. |
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| 456 | |
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[e94ad1fe] | 457 | 2000-08-10 Joel Sherrill <joel@OARcorp.com> |
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| 458 | |
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| 459 | * ChangeLog: New file. |
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