source: rtems/cpukit/score/cpu/m68k/cpu_asm.S @ e339d8b

4.104.114.95
Last change on this file since e339d8b was e339d8b, checked in by Chris Johns <chrisj@…>, on 06/11/08 at 08:19:13

hris Johns <chrisj@…>

  • cpu_asm.S: Add Coldfire FPU support.
  • rtems/score/m68k.h: Change the Coldfire CPU defines to be based on the instruction set. Add Tiny RTEMS support to the small memory model RTEMS processors.
  • rtems/score/cpu.h: Handle the new Tiny RTEMS support.
  • Property mode set to 100644
File size: 11.3 KB
Line 
1/*  cpu_asm.s
2 *
3 *  This file contains all assembly code for the MC68020 implementation
4 *  of RTEMS.
5 *
6 *  COPYRIGHT (c) 1989-2008.
7 *  On-Line Applications Research Corporation (OAR).
8 *
9 *  The license and distribution terms for this file may be
10 *  found in the file LICENSE in this distribution or at
11 *  http://www.rtems.com/license/LICENSE.
12 *
13 *  $Id$
14 */
15
16
17#include <rtems/asm.h>
18
19        .text
20
21/*  void _CPU_Context_switch( run_context, heir_context )
22 *
23 *  This routine performs a normal non-FP context.
24 */
25
26        .align  4
27        .global SYM (_CPU_Context_switch)
28
29.set RUNCONTEXT_ARG,   4                 | save context argument
30.set HEIRCONTEXT_ARG,  8                 | restore context argument
31
32SYM (_CPU_Context_switch):
33          moval    a7@(RUNCONTEXT_ARG),a0| a0 = running thread context
34          movw     sr,d1                 | d1 = status register
35          movml    d1-d7/a2-a7,a0@       | save context
36
37          moval    a7@(HEIRCONTEXT_ARG),a0| a0 = heir thread context
38restore:  movml    a0@,d1-d7/a2-a7       | restore context
39          movw     d1,sr                 | restore status register
40          rts
41
42/*PAGE
43 *  void __CPU_Context_save_fp_context( &fp_context_ptr )
44 *  void __CPU_Context_restore_fp_context( &fp_context_ptr )
45 *
46 *  These routines are used to context switch a MC68881 or MC68882.
47 *
48 *  NOTE:  Context save and restore code is based upon the code shown
49 *         on page 6-38 of the MC68881/68882 Users Manual (rev 1).
50 *
51 *         CPU_FP_CONTEXT_SIZE is higher than expected to account for the
52 *         -1 pushed at end of this sequence.
53 *
54 *         Neither of these entries is required if we have software FPU
55 *         emulation.  But if we don't have an FPU or emulation, then
56 *         we need the stub versions of these routines.
57 */
58
59#if (CPU_SOFTWARE_FP == FALSE)
60
61.set FPCONTEXT_ARG,   4                   | save FP context argument
62.set FP_STATE_SAVED,  (4*4)               | FPU state is 4 longwords
63.set FP_REGS_SAVED,   (8*8)               | FPU regs is 8 64bit values
64
65        .align  4
66        .global SYM (_CPU_Context_save_fp)
67SYM (_CPU_Context_save_fp):
68#if ( M68K_HAS_FPU == 1 )
69        moval    a7@(FPCONTEXT_ARG),a1    | a1 = &ptr to context area
70        moval    a1@,a0                   | a0 = Save context area
71#if ( !defined(__mcoldfire__) && !__mc68060__ )
72        fsave    a0@-                     | save 68881/68882 state frame
73#else
74        lea      a0@(-FP_STATE_SAVED),a0  | save the state of the FPU
75        fsave    a0@                      | on a Coldfire and 68060.
76#endif
77        tstb     a0@                      | check for a null frame
78        beq.b    nosv                     | Yes, skip save of user model
79#if ( !defined(__mcoldfire__) )
80        fmovem   fp0-fp7,a0@-             | save data registers (fp0-fp7)
81        fmovem   fpc/fps/fpi,a0@-         | and save control registers
82#else
83        lea      a0@(-FP_REGS_SAVED),a0
84        fmovem   fp0-fp7,a0@              | save data registers (fp0-fp7)
85        fmove.l  fpc,a0@-                 | and save control registers
86        fmove.l  fps,a0@-
87        fmove.l  fpi,a0@-
88#endif
89        movl     #-1,a0@-                 | place not-null flag on stack
90nosv:   movl     a0,a1@                   | save pointer to saved context
91#endif
92        rts
93
94        .align  4
95        .global SYM (_CPU_Context_restore_fp)
96SYM (_CPU_Context_restore_fp):
97#if ( M68K_HAS_FPU == 1 )
98        moval    a7@(FPCONTEXT_ARG),a1    | a1 = &ptr to context area
99        moval    a1@,a0                   | a0 = address of saved context
100        tstb     a0@                      | Null context frame?
101        beq.b    norst                    | Yes, skip fp restore
102        addql    #4,a0                    | throwaway non-null flag
103#if ( !defined(__mcoldfire__) )
104        fmovem   a0@+,fpc/fps/fpi         | restore control registers
105        fmovem   a0@+,fp0-fp7             | restore data regs (fp0-fp7)
106norst:  frestore a0@+                     | restore the fp state frame
107#else
108        fmove.l  a0@+,fpc                 | restore control registers
109        fmove.l  a0@+,fps   
110        fmove.l  a0@+,fpi
111        fmovem   a0@,fp0-fp7              | restore data regs (fp0-fp7)
112        lea      a0@(FP_REGS_SAVED),a0
113norst:  frestore a0@                      | restore the fp state frame
114        lea      a0@(FP_STATE_SAVED),a0
115#endif
116        movl     a0,a1@                   | save pointer to saved context
117#endif
118        rts
119#endif
120
121/*PAGE
122 *  void _ISR_Handler()
123 *
124 *  This routine provides the RTEMS interrupt management.
125 *
126 *  NOTE:
127 *    Upon entry, the master stack will contain an interrupt stack frame
128 *    back to the interrupted thread and the interrupt stack will contain
129 *    a throwaway interrupt stack frame.  If dispatching is enabled, and this
130 *    is the outer most interrupt, and a context switch is necessary or
131 *    the current thread has pending signals, then set up the master stack to
132 *    transfer control to the interrupt dispatcher.
133 */
134
135#if ( defined(__mcoldfire__) )
136.set SR_OFFSET,    2                     | Status register offset
137.set PC_OFFSET,    4                     | Program Counter offset
138.set FVO_OFFSET,   0                     | Format/vector offset
139#elif ( M68K_HAS_VBR == 1)
140.set SR_OFFSET,    0                     | Status register offset
141.set PC_OFFSET,    2                     | Program Counter offset
142.set FVO_OFFSET,   6                     | Format/vector offset
143#else
144.set SR_OFFSET,    2                     | Status register offset
145.set PC_OFFSET,    4                     | Program Counter offset
146.set FVO_OFFSET,   0                     | Format/vector offset placed in the stack
147#endif /* M68K_HAS_VBR */
148 
149.set SAVED,        16                    | space for saved registers
150
151        .align  4
152        .global SYM (_ISR_Handler)
153
154SYM (_ISR_Handler):
155                                         | disable multitasking
156        addql   #1,SYM (_Thread_Dispatch_disable_level)
157#if ( !defined(__mcoldfire__) )
158        moveml  d0-d1/a0-a1,a7@-         | save d0-d1,a0-a1
159#else
160        lea     a7@(-SAVED),a7
161        movm.l  d0-d1/a0-a1,a7@          | save d0-d1,a0-a1
162#endif
163        movew   a7@(SAVED+FVO_OFFSET),d0 | d0 = F/VO
164        andl    #0x03fc,d0               | d0 = vector offset in vbr
165
166
167#if ( CPU_HAS_SOFTWARE_INTERRUPT_STACK == 1 )
168        | Make a0 point just above interrupt stack
169        movel   _CPU_Interrupt_stack_high,a0
170        cmpl    _CPU_Interrupt_stack_low,a7  | stack below interrupt stack?
171        bcs.b   1f                      | yes, switch to interrupt stack
172        cmpl    a0,a7                   | stack above interrupt stack?
173        bcs.b   2f                      | no, do not switch stacks
1741:
175        movel   a7,a1                   | copy task stack pointer
176        movel   a0,a7                   | switch to interrupt stack
177        movel   a1,a7@-                 | store task stack pointer
178                                        |     on interrupt stack
1792:
180#endif /* CPU_HAS_SOFTWARE_INTERRUPT_STACK == 1 */
181
182        addql   #1,SYM(_ISR_Nest_level) | one nest level deeper
183       
184        movel   SYM (_ISR_Vector_table),a0 | a0= base of RTEMS table
185#if ( M68K_HAS_PREINDEXING == 1 )
186        movel   (a0,d0:w:1),a0           | a0 = address of user routine
187#else
188        addal   d0,a0                    | a0 = address of vector
189        movel   (a0),a0                  | a0 = address of user routine
190#endif
191
192        lsrl    #2,d0                    | d0 = vector number
193        movel   d0,a7@-                  | push vector number
194        jbsr    a0@                      | invoke the user ISR
195        addql   #4,a7                    | remove vector number
196        subql   #1,SYM(_ISR_Nest_level)  | Reduce interrupt-nesting count
197
198#if ( CPU_HAS_SOFTWARE_INTERRUPT_STACK == 1 )
199        movel   _CPU_Interrupt_stack_high,a0
200        subql   #4,a0
201        cmpl    a0,a7                   | At top of interrupt stack?
202        bne.b   1f                      | No, do not restore task stack pointer
203        movel   (a7),a7                 | Restore task stack pointer
2041:
205#endif /* CPU_HAS_SOFTWARE_INTERRUPT_STACK == 1 */
206        subql   #1,SYM (_Thread_Dispatch_disable_level)
207                                         | unnest multitasking
208        bne.b    exit                    | If dispatch disabled, exit
209
210#if ( M68K_HAS_SEPARATE_STACKS == 1 )
211        movew   #0xf000,d0               | isolate format nibble
212        andw    a7@(SAVED+FVO_OFFSET),d0 | get F/VO
213        cmpiw   #0x1000,d0               | is it a throwaway isf?
214        bne.b   exit                     | NOT outer level, so branch
215#else
216/*
217 * If we have a CPU which allows a higher-priority interrupt to preempt a
218 * lower priority handler before the lower-priority handler can increment
219 * _Thread_Dispatch_disable_level then we must check the PC on the stack to
220 * see if it is _ISR_Handler.  If it is we have the case of nesting interrupts
221 * without the dispatch level being incremented.
222 */
223  #if ( !defined(__mcoldfire__) && !__mc68060__ )
224        cmpl    #_ISR_Handler,a7@(SAVED+PC_OFFSET)
225        beq.b   exit       
226  #endif
227#endif
228        tstl    SYM (_Context_Switch_necessary)
229                                         | Is thread switch necessary?
230        bne.b   bframe                   | Yes, invoke dispatcher
231
232        tstl    SYM (_ISR_Signals_to_thread_executing)
233                                         | signals sent to Run_thread
234                                         |   while in interrupt handler?
235        beq.b   exit                     | No, then exit
236
237bframe: clrl    SYM (_ISR_Signals_to_thread_executing)
238                                         | If sent, will be processed
239#if ( M68K_HAS_SEPARATE_STACKS == 1 )
240        movec   msp,a0                   | a0 = master stack pointer
241        movew   #0,a0@-                  | push format word
242        movel   #SYM(_ISR_Dispatch),a0@- | push return addr
243        movew   a0@(6),a0@-              | push saved sr
244        movec   a0,msp                   | set master stack pointer
245#else
246        jsr SYM (_Thread_Dispatch)       | Perform context switch
247#endif
248
249#if ( !defined(__mcoldfire__) )
250exit:   moveml  a7@+,d0-d1/a0-a1         | restore d0-d1,a0-a1
251#else
252exit:   moveml  a7@,d0-d1/a0-a1          | restore d0-d1,a0-a1
253        lea     a7@(SAVED),a7
254#endif
255
256#if ( M68K_HAS_VBR == 0 )
257        addql   #2,a7                    | pop format/id
258#endif /* M68K_HAS_VBR */
259        rte                              | return to thread
260                                         |   OR _Isr_dispatch
261
262/*PAGE
263 *  void _ISR_Dispatch()
264 *
265 *  Entry point from the outermost interrupt service routine exit.
266 *  The current stack is the supervisor mode stack if this processor
267 *  has separate stacks.
268 *
269 *    1.  save all registers not preserved across C calls.
270 *    2.  invoke the _Thread_Dispatch routine to switch tasks
271 *        or a signal to the currently executing task.
272 *    3.  restore all registers not preserved across C calls.
273 *    4.  return from interrupt
274 */
275
276        .global SYM (_ISR_Dispatch)
277SYM (_ISR_Dispatch):
278#if ( !defined(__mcoldfire__) )
279        movml   d0-d1/a0-a1,a7@-
280        jsr     SYM (_Thread_Dispatch)
281        movml   a7@+,d0-d1/a0-a1
282#else
283        lea     a7@(-SAVED),a7
284        movml   d0-d1/a0-a1,a7@
285        jsr     SYM (_Thread_Dispatch)
286        movml   a7@,d0-d1/a0-a1
287        lea     a7@(SAVED),a7
288#endif
289
290#if ( M68K_HAS_VBR == 0 )
291        addql   #2,a7                    | pop format/id
292#endif /* M68K_HAS_VBR */
293        rte
Note: See TracBrowser for help on using the repository browser.