source: rtems/cpukit/score/cpu/m32c/cpu_asm.c @ c9f5531

4.104.11
Last change on this file since c9f5531 was c9f5531, checked in by Joel Sherrill <joel.sherrill@…>, on Mar 27, 2010 at 3:01:57 PM

2010-03-27 Joel Sherrill <joel.sherrill@…>

  • context_init.c, context_switch.S, cpu.c, cpu_asm.c, varvects.S: Add include of config.h
  • Property mode set to 100644
File size: 3.4 KB
Line 
1/*  cpu_asm.c  ===> cpu_asm.S or cpu_asm.s
2 *
3 *  This file contains the basic algorithms for all assembly code used
4 *  in an specific CPU port of RTEMS.  These algorithms must be implemented
5 *  in assembly language
6 *
7 *  NOTE:  This is supposed to be a .S or .s file NOT a C file.
8 *
9 *  M32C does not yet have interrupt support.  When this functionality
10 *  is written, this file should become obsolete.
11 *
12 *  COPYRIGHT (c) 1989-2008.
13 *  On-Line Applications Research Corporation (OAR).
14 *
15 *  The license and distribution terms for this file may be
16 *  found in the file LICENSE in this distribution or at
17 *  http://www.rtems.com/license/LICENSE.
18 *
19 *  $Id$
20 */
21
22/*
23 *  This is supposed to be an assembly file.  This means that system.h
24 *  and cpu.h should not be included in a "real" cpu_asm file.  An
25 *  implementation in assembly should include "cpu_asm.h>
26 */
27
28#ifdef HAVE_CONFIG_H
29#include "config.h"
30#endif
31
32#include <rtems/system.h>
33#include <rtems/score/cpu.h>
34
35/*  void __ISR_Handler()
36 *
37 *  This routine provides the RTEMS interrupt management.
38 *
39 *  NO_CPU Specific Information:
40 *
41 *  XXX document implementation including references if appropriate
42 */
43
44void _ISR_Handler(void)
45{
46   /*
47    *  This discussion ignores a lot of the ugly details in a real
48    *  implementation such as saving enough registers/state to be
49    *  able to do something real.  Keep in mind that the goal is
50    *  to invoke a user's ISR handler which is written in C and
51    *  uses a certain set of registers.
52    *
53    *  Also note that the exact order is to a large extent flexible.
54    *  Hardware will dictate a sequence for a certain subset of
55    *  _ISR_Handler while requirements for setting
56    */
57
58  /*
59   *  At entry to "common" _ISR_Handler, the vector number must be
60   *  available.  On some CPUs the hardware puts either the vector
61   *  number or the offset into the vector table for this ISR in a
62   *  known place.  If the hardware does not give us this information,
63   *  then the assembly portion of RTEMS for this port will contain
64   *  a set of distinct interrupt entry points which somehow place
65   *  the vector number in a known place (which is safe if another
66   *  interrupt nests this one) and branches to _ISR_Handler.
67   *
68   *  save some or all context on stack
69   *  may need to save some special interrupt information for exit
70   *
71   *  #if ( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE )
72   *    if ( _ISR_Nest_level == 0 )
73   *      switch to software interrupt stack
74   *  #endif
75   *
76   *  _ISR_Nest_level++;
77   *
78   *  _Thread_Dispatch_disable_level++;
79   *
80   *  (*_ISR_Vector_table[ vector ])( vector );
81   *
82   *  _Thread_Dispatch_disable_level--;
83   *
84   *  --_ISR_Nest_level;
85   *
86   *  if ( _ISR_Nest_level )
87   *    goto the label "exit interrupt (simple case)"
88   *
89   *  if ( _Thread_Dispatch_disable_level )
90   *    _ISR_Signals_to_thread_executing = FALSE;
91   *    goto the label "exit interrupt (simple case)"
92   *
93   *  if ( _Context_Switch_necessary || _ISR_Signals_to_thread_executing ) {
94   *    _ISR_Signals_to_thread_executing = FALSE;
95   *    call _Thread_Dispatch() or prepare to return to _ISR_Dispatch
96   *    prepare to get out of interrupt
97   *    return from interrupt  (maybe to _ISR_Dispatch)
98   *
99   *  LABEL "exit interrupt (simple case):
100   *  #if ( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE )
101   *    if outermost interrupt
102   *      restore stack
103   *  #endif
104   *  prepare to get out of interrupt
105   *  return from interrupt
106   */
107}
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