source: rtems/cpukit/score/cpu/lm32/rtems/score/types.h @ 4ef13360

4.11
Last change on this file since 4ef13360 was 4ef13360, checked in by Joel Sherrill <joel.sherrill@…>, on Jul 29, 2010 at 5:51:56 PM

2010-07-29 Gedare Bloom <giddyup44@…>

PR 1635/cpukit

  • rtems/score/cpu.h, rtems/score/types.h: Refactoring of priority handling, to isolate the bitmap implementation of priorities in the supercore so that priority management is a little more modular. This change is in anticipation of scheduler implementations that can select how they manage tracking priority levels / finding the highest priority ready task. Note that most of the changes here are simple renaming, to clarify the use of the bitmap-based priority management.
  • Property mode set to 100644
File size: 1.0 KB
Line 
1/**
2 * @file rtems/score/types.h
3 */
4
5/*
6 *  This include file contains type definitions pertaining to the
7 *  Lattice lm32 processor family.
8 *
9 *  COPYRIGHT (c) 1989-2006.
10 *  On-Line Applications Research Corporation (OAR).
11 *
12 *  The license and distribution terms for this file may be
13 *  found in the file LICENSE in this distribution or at
14 *  http://www.rtems.com/license/LICENSE.
15 *
16 *  $Id$
17 *
18 *  Jukka Pietarinen <jukka.pietarinen@mrf.fi>, 2008,
19 *  Micro-Research Finland Oy
20 */
21
22#ifndef _RTEMS_SCORE_TYPES_H
23#define _RTEMS_SCORE_TYPES_H
24
25#include <rtems/score/basedefs.h>
26
27#ifndef ASM
28
29#ifdef __cplusplus
30extern "C" {
31#endif
32
33/*
34 *  This section defines the basic types for this processor.
35 */
36
37/** This defines the type for a priority bit map entry. */
38typedef uint16_t Priority_bit_map_Control;
39
40/** This defines the return type for an ISR entry point. */
41typedef void lm32_isr;
42
43/** This defines the prototype for an ISR entry point. */
44typedef lm32_isr ( *lm32_isr_entry )( void );
45
46#ifdef __cplusplus
47}
48#endif
49
50#endif  /* !ASM */
51
52#endif
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