source: rtems/cpukit/score/cpu/lm32/irq.c @ 5632f8d

4.104.11
Last change on this file since 5632f8d was 5632f8d, checked in by Joel Sherrill <joel.sherrill@…>, on Mar 27, 2010 at 3:02:21 PM

2010-03-27 Joel Sherrill <joel.sherrill@…>

  • cpu.c, cpu_asm.S, irq.c: Add include of config.h
  • Property mode set to 100644
File size: 2.1 KB
Line 
1/*
2 *  lm32 interrupt handler
3 *
4 *  Derived from c4x/irq.c and nios2/irq.c
5 *
6 *  COPYRIGHT (c) 1989-2009.
7 *  On-Line Applications Research Corporation (OAR).
8 *
9 *  The license and distribution terms for this file may be
10 *  found in the file LICENSE in this distribution or at
11 *  http://www.rtems.com/license/LICENSE.
12 *
13 *  $Id$
14 */
15
16#ifdef HAVE_CONFIG_H
17#include "config.h"
18#endif
19
20#include <rtems/system.h>
21#include <rtems/score/cpu.h>
22#include <rtems/score/isr.h>
23#include <rtems/score/thread.h>
24
25/*
26 *  This routine provides the RTEMS interrupt management.
27 *
28 *  Upon entry, interrupts are disabled
29 */
30
31#if( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE)
32  unsigned long    *_old_stack_ptr;
33#endif
34
35unsigned long *_exception_stack_frame;
36
37register unsigned long  *stack_ptr asm("sp");
38
39void __ISR_Handler(uint32_t vector, CPU_Interrupt_frame *ifr)
40{
41  register uint32_t   level;
42  _exception_stack_frame = NULL;
43
44  /* Interrupts are disabled upon entry to this Handler */
45
46  _Thread_Dispatch_disable_level++;
47
48#if( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE)
49  if ( _ISR_Nest_level == 0 ) {
50    /* Install irq stack */
51    _old_stack_ptr = stack_ptr;
52    stack_ptr = _CPU_Interrupt_stack_high - 4;
53  }
54#endif
55
56  _ISR_Nest_level++;
57
58  if ( _ISR_Vector_table[ vector] )
59  {
60    (*_ISR_Vector_table[ vector ])(vector, ifr);
61  };
62
63  /* Make sure that interrupts are disabled again */
64  _CPU_ISR_Disable( level );
65
66  _ISR_Nest_level--;
67
68#if( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE)
69  if( _ISR_Nest_level == 0)
70    stack_ptr = _old_stack_ptr;
71#endif
72
73  _Thread_Dispatch_disable_level--;
74
75  _CPU_ISR_Enable( level );
76
77  if ( _ISR_Nest_level )
78    return;
79
80  if ( _Thread_Dispatch_disable_level ) {
81    _ISR_Signals_to_thread_executing = FALSE;
82    return;
83  }
84
85  if ( _Context_Switch_necessary || _ISR_Signals_to_thread_executing ) {
86    _ISR_Signals_to_thread_executing = FALSE;
87
88    /* save off our stack frame so the context switcher can get to it */
89    _exception_stack_frame = ifr;
90
91    _Thread_Dispatch();
92
93    /* and make sure its clear in case we didn't dispatch. if we did, its
94     * already cleared */
95    _exception_stack_frame = NULL;
96  }
97}
98
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