source: rtems/cpukit/score/cpu/lm32/irq.c @ 511dc4b

5
Last change on this file since 511dc4b was 511dc4b, checked in by Sebastian Huber <sebastian.huber@…>, on 06/19/18 at 07:09:51

Rework initialization and interrupt stack support

Statically initialize the interrupt stack area
(_Configuration_Interrupt_stack_area_begin,
_Configuration_Interrupt_stack_area_end, and
_Configuration_Interrupt_stack_size) via <rtems/confdefs.h>. Place the
interrupt stack area in a special section ".rtemsstack.interrupt". Let
BSPs define the optimal placement of this section in their linker
command files (e.g. in a fast on-chip memory).

This change makes makes the CPU_HAS_SOFTWARE_INTERRUPT_STACK and
CPU_HAS_HARDWARE_INTERRUPT_STACK CPU port defines superfluous, since the
low level initialization code has all information available via global
symbols.

This change makes the CPU_ALLOCATE_INTERRUPT_STACK CPU port define
superfluous, since the interrupt stacks are allocated by confdefs.h for
all architectures. There is no need for BSP-specific linker command
file magic (except the section placement), see previous ARM linker
command file as a bad example.

Remove _CPU_Install_interrupt_stack(). Initialize the hardware
interrupt stack in _CPU_Initialize() if necessary (e.g.
m68k_install_interrupt_stack()).

The optional _CPU_Interrupt_stack_setup() is still useful to customize
the registration of the interrupt stack area in the per-CPU information.

The initialization stack can reuse the interrupt stack, since

  • interrupts are disabled during the sequential system initialization, and
  • the boot_card() function does not return.

This stack resuse saves memory.

Changes per architecture:

arm:

  • Mostly replace the linker symbol based configuration of stacks with the standard <rtems/confdefs.h> configuration via CONFIGURE_INTERRUPT_STACK_SIZE. The size of the FIQ, ABT and UND mode stack is still defined via linker symbols. These modes are rarely used in applications and the default values provided by the BSP should be sufficient in most cases.
  • Remove the bsp_processor_count linker symbol hack used for the SMP support. This is possible since the interrupt stack area is now allocated by the linker and not allocated from the heap. This makes some configure.ac stuff obsolete. Remove the now superfluous BSP variants altcycv_devkit_smp and realview_pbx_a9_qemu_smp.

bfin:

  • Remove unused magic linker command file allocation of initialization stack. Maybe a previous linker command file copy and paste problem? In the start.S the initialization stack is set to a hard coded value.

lm32, m32c, mips, nios2, riscv, sh, v850:

  • Remove magic linker command file allocation of initialization stack. Reuse interrupt stack for initialization stack.

m68k:

  • Remove magic linker command file allocation of initialization stack. Reuse interrupt stack for initialization stack.

powerpc:

  • Remove magic linker command file allocation of initialization stack. Reuse interrupt stack for initialization stack.
  • Used dedicated memory region (REGION_RTEMSSTACK) for the interrupt stack on BSPs using the shared linkcmds.base (replacement for REGION_RWEXTRA).

sparc:

  • Remove the hard coded initialization stack. Use the interrupt stack for the initialization stack on the boot processor. This saves 16KiB of RAM.

Update #3459.
  • Property mode set to 100644
File size: 1.8 KB
Line 
1/**
2 *  @file
3 *
4 *  @brief LM32 Initialize the ISR Handler
5 */
6
7/*
8 *  COPYRIGHT (c) 1989-2009.
9 *  On-Line Applications Research Corporation (OAR).
10 *
11 *  The license and distribution terms for this file may be
12 *  found in the file LICENSE in this distribution or at
13 *  http://www.rtems.org/license/LICENSE.
14 */
15
16#ifdef HAVE_CONFIG_H
17#include "config.h"
18#endif
19
20#include <rtems/score/isr.h>
21#include <rtems/score/percpu.h>
22#include <rtems/score/threaddispatch.h>
23
24unsigned long *_old_stack_ptr;
25
26void *_exception_stack_frame;
27
28register unsigned long  *stack_ptr __asm__ ("sp");
29
30/*
31 *  Prototypes for routines called from assembly that we don't want in
32 *  the public name space.
33 */
34void __ISR_Handler(uint32_t vector, CPU_Interrupt_frame *ifr);
35
36void __ISR_Handler(uint32_t vector, CPU_Interrupt_frame *ifr)
37{
38  register uint32_t   level;
39  _exception_stack_frame = NULL;
40
41  /* Interrupts are disabled upon entry to this Handler */
42
43  _Thread_Dispatch_disable();
44
45  if ( _ISR_Nest_level == 0 ) {
46    /* Install irq stack */
47    _old_stack_ptr = stack_ptr;
48    stack_ptr = _CPU_Interrupt_stack_high - 4;
49  }
50
51  _ISR_Nest_level++;
52
53  if ( _ISR_Vector_table[ vector] )
54  {
55    (*_ISR_Vector_table[ vector ])(vector, ifr);
56  };
57
58  /* Make sure that interrupts are disabled again */
59  _CPU_ISR_Disable( level );
60
61  _ISR_Nest_level--;
62
63  if( _ISR_Nest_level == 0)
64    stack_ptr = _old_stack_ptr;
65
66  _Thread_Dispatch_unnest( _Per_CPU_Get() );
67
68  _CPU_ISR_Enable( level );
69
70  if ( _ISR_Nest_level )
71    return;
72
73  if ( _Thread_Dispatch_necessary && _Thread_Dispatch_is_enabled() ) {
74    /* save off our stack frame so the context switcher can get to it */
75    _exception_stack_frame = ifr;
76
77    _Thread_Dispatch();
78
79    /* and make sure its clear in case we didn't dispatch. if we did, its
80     * already cleared */
81    _exception_stack_frame = NULL;
82  }
83}
84
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