source: rtems/cpukit/score/cpu/lm32/irq.c @ 0e74a51

4.115
Last change on this file since 0e74a51 was 0e74a51, checked in by Joel Sherrill <joel.sherrill@…>, on 10/20/14 at 02:46:06

cpukit/score/cpu/lm32/irq.c: Fix warning

  • Property mode set to 100644
File size: 2.0 KB
Line 
1/**
2 *  @file
3 *
4 *  @brief LM32 Initialize the ISR Handler
5 */
6
7/*
8 *  COPYRIGHT (c) 1989-2009.
9 *  On-Line Applications Research Corporation (OAR).
10 *
11 *  The license and distribution terms for this file may be
12 *  found in the file LICENSE in this distribution or at
13 *  http://www.rtems.org/license/LICENSE.
14 */
15
16#ifdef HAVE_CONFIG_H
17#include "config.h"
18#endif
19
20#include <rtems/score/isr.h>
21#include <rtems/score/percpu.h>
22#include <rtems/score/threaddispatch.h>
23
24#if( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE)
25  unsigned long    *_old_stack_ptr;
26#endif
27
28void *_exception_stack_frame;
29
30register unsigned long  *stack_ptr __asm__ ("sp");
31
32/*
33 *  Prototypes for routines called from assembly that we don't want in
34 *  the public name space.
35 */
36void __ISR_Handler(uint32_t vector, CPU_Interrupt_frame *ifr);
37
38void __ISR_Handler(uint32_t vector, CPU_Interrupt_frame *ifr)
39{
40  register uint32_t   level;
41  _exception_stack_frame = NULL;
42
43  /* Interrupts are disabled upon entry to this Handler */
44
45  _Thread_Dispatch_increment_disable_level();
46
47#if( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE)
48  if ( _ISR_Nest_level == 0 ) {
49    /* Install irq stack */
50    _old_stack_ptr = stack_ptr;
51    stack_ptr = _CPU_Interrupt_stack_high - 4;
52  }
53#endif
54
55  _ISR_Nest_level++;
56
57  if ( _ISR_Vector_table[ vector] )
58  {
59    (*_ISR_Vector_table[ vector ])(vector, ifr);
60  };
61
62  /* Make sure that interrupts are disabled again */
63  _CPU_ISR_Disable( level );
64
65  _ISR_Nest_level--;
66
67#if( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE)
68  if( _ISR_Nest_level == 0)
69    stack_ptr = _old_stack_ptr;
70#endif
71
72  _Thread_Dispatch_decrement_disable_level();
73
74  _CPU_ISR_Enable( level );
75
76  if ( _ISR_Nest_level )
77    return;
78
79  if ( _Thread_Dispatch_necessary && _Thread_Dispatch_is_enabled() ) {
80    /* save off our stack frame so the context switcher can get to it */
81    _exception_stack_frame = ifr;
82
83    _Thread_Dispatch();
84
85    /* and make sure its clear in case we didn't dispatch. if we did, its
86     * already cleared */
87    _exception_stack_frame = NULL;
88  }
89}
90
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