5
Last change
on this file since c954003 was
5d4a1edc,
checked in by Jan Sommer <jan.sommer@…>, on 05/31/20 at 14:22:55
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bsp/pc386: Define interrupt stack frame for smp
- Defines CPU_Interrupt_frame in cpu_impl.h
- Updates isq_asm.S to save/restore registers in matching order to
interrupt frame
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-
Property mode set to
100644
|
File size:
1.1 KB
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1 | /** |
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2 | * @file |
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3 | * |
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4 | * @brief CPU Port Implementation API |
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5 | */ |
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6 | |
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7 | /* |
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8 | * Copyright (c) 2013 embedded brains GmbH |
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9 | * |
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10 | * The license and distribution terms for this file may be |
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11 | * found in the file LICENSE in this distribution or at |
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12 | * http://www.rtems.org/license/LICENSE. |
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13 | */ |
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14 | |
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15 | #ifndef _RTEMS_SCORE_CPUIMPL_H |
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16 | #define _RTEMS_SCORE_CPUIMPL_H |
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17 | |
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18 | #include <rtems/score/cpu.h> |
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19 | |
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20 | /** |
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21 | * @defgroup RTEMSScoreCPUi386 i386 |
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22 | * |
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23 | * @ingroup RTEMSScoreCPU |
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24 | * |
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25 | * @brief i386 Architecture Support |
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26 | * |
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27 | * @{ |
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28 | */ |
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29 | |
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30 | #define CPU_PER_CPU_CONTROL_SIZE 0 |
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31 | |
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32 | #define CPU_INTERRUPT_FRAME_SIZE 52 |
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33 | |
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34 | #ifndef ASM |
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35 | |
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36 | #ifdef __cplusplus |
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37 | extern "C" { |
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38 | #endif |
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39 | |
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40 | RTEMS_INLINE_ROUTINE void _CPU_Context_volatile_clobber( uintptr_t pattern ) |
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41 | { |
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42 | /* TODO */ |
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43 | } |
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44 | |
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45 | RTEMS_INLINE_ROUTINE void _CPU_Context_validate( uintptr_t pattern ) |
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46 | { |
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47 | while (1) { |
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48 | /* TODO */ |
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49 | } |
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50 | } |
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51 | |
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52 | RTEMS_INLINE_ROUTINE void _CPU_Instruction_illegal( void ) |
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53 | { |
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54 | __asm__ volatile ( ".word 0" ); |
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55 | } |
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56 | |
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57 | RTEMS_INLINE_ROUTINE void _CPU_Instruction_no_operation( void ) |
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58 | { |
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59 | __asm__ volatile ( "nop" ); |
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60 | } |
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61 | |
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62 | #ifdef __cplusplus |
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63 | } |
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64 | #endif |
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65 | |
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66 | #endif /* ASM */ |
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67 | |
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68 | /** @} */ |
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69 | |
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70 | #endif /* _RTEMS_SCORE_CPUIMPL_H */ |
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