source: rtems/cpukit/score/cpu/i386/cpu.c @ 9b4422a2

4.11
Last change on this file since 9b4422a2 was 9b4422a2, checked in by Joel Sherrill <joel.sherrill@…>, on May 3, 2012 at 3:09:24 PM

Remove All CVS Id Strings Possible Using a Script

Script does what is expected and tries to do it as
smartly as possible.

+ remove occurrences of two blank comment lines

next to each other after Id string line removed.

+ remove entire comment blocks which only exited to

contain CVS Ids

+ If the processing left a blank line at the top of

a file, it was removed.

  • Property mode set to 100644
File size: 6.5 KB
Line 
1/*
2 *  Intel i386 Dependent Source
3 *
4 *  COPYRIGHT (c) 1989-1999.
5 *  On-Line Applications Research Corporation (OAR).
6 *
7 *  The license and distribution terms for this file may be
8 *  found in the file LICENSE in this distribution or at
9 *  http://www.rtems.com/license/LICENSE.
10 */
11
12#ifdef HAVE_CONFIG_H
13#include "config.h"
14#endif
15
16#include <rtems.h>
17#include <rtems/system.h>
18#include <rtems/score/types.h>
19#include <rtems/score/isr.h>
20#include <rtems/score/idtr.h>
21
22#include <rtems/bspIo.h>
23#include <rtems/score/thread.h>
24
25/*  _CPU_Initialize
26 *
27 *  This routine performs processor dependent initialization.
28 *
29 *  INPUT PARAMETERS: NONE
30 */
31
32void _CPU_Initialize(void)
33{
34#if CPU_HARDWARE_FP
35  register uint16_t             fp_status __asm__ ("ax");
36  register Context_Control_fp  *fp_context;
37#endif
38
39  /*
40   *  The following code saves a NULL i387 context which is given
41   *  to each task at start and restart time.  The following code
42   *  is based upon that provided in the i386 Programmer's
43   *  Manual and should work on any coprocessor greater than
44   *  the i80287.
45   *
46   *  NOTE: The NO WAIT form of the coprocessor instructions
47   *        MUST be used in case there is not a coprocessor
48   *        to wait for.
49   */
50
51#if CPU_HARDWARE_FP
52  fp_status = 0xa5a5;
53  __asm__ volatile( "fninit" );
54  __asm__ volatile( "fnstsw %0" : "=a" (fp_status) : "0" (fp_status) );
55
56  if ( fp_status ==  0 ) {
57
58    fp_context = &_CPU_Null_fp_context;
59
60#ifdef __SSE__
61        asm volatile( "fstcw %0":"=m"(fp_context->fpucw) );
62#else
63    __asm__ volatile( "fsave (%0)" : "=r" (fp_context)
64                               : "0"  (fp_context)
65                );
66#endif
67  }
68#endif
69
70#ifdef __SSE__
71
72  __asm__ volatile("stmxcsr %0":"=m"(fp_context->mxcsr));
73
74  /* The BSP must enable the SSE extensions (early).
75   * If any SSE instruction was already attempted
76   * then that crashed the system.
77   * As a courtesy, we double-check here but it
78   * may be too late (which is also why we don't
79   * enable SSE here).
80   */
81  {
82  uint32_t cr4;
83    __asm__ __volatile__("mov %%cr4, %0":"=r"(cr4));
84    if ( 0x600 != (cr4 & 0x600) ) {
85      printk("PANIC: RTEMS was compiled for SSE but BSP did not enable it (CR4: 0x%08x)\n", cr4);
86      while ( 1 ) {
87        __asm__ __volatile__("hlt");
88          }
89        }
90  }
91#endif
92}
93
94/*
95 *  _CPU_ISR_Get_level
96 */
97
98uint32_t   _CPU_ISR_Get_level( void )
99{
100  uint32_t   level;
101
102  i386_get_interrupt_level( level );
103
104  return level;
105}
106
107void *_CPU_Thread_Idle_body( uintptr_t ignored )
108{
109  while(1){
110    __asm__ volatile ("hlt");
111  }
112  return NULL;
113}
114
115struct Frame_ {
116        struct Frame_  *up;
117        uintptr_t               pc;
118};
119
120static void _defaultExcHandler (CPU_Exception_frame *ctx)
121{
122  unsigned int faultAddr = 0;
123  printk("----------------------------------------------------------\n");
124  printk("Exception %d caught at PC %x by thread %d\n",
125         ctx->idtIndex,
126         ctx->eip,
127         _Thread_Executing->Object.id);
128  printk("----------------------------------------------------------\n");
129  printk("Processor execution context at time of the fault was  :\n");
130  printk("----------------------------------------------------------\n");
131  printk(" EAX = %x     EBX = %x        ECX = %x        EDX = %x\n",
132         ctx->eax, ctx->ebx, ctx->ecx, ctx->edx);
133  printk(" ESI = %x     EDI = %x        EBP = %x        ESP = %x\n",
134         ctx->esi, ctx->edi, ctx->ebp, ctx->esp0);
135  printk("----------------------------------------------------------\n");
136  printk("Error code pushed by processor itself (if not 0) = %x\n",
137         ctx->faultCode);
138  printk("----------------------------------------------------------\n");
139  if (ctx->idtIndex == I386_EXCEPTION_PAGE_FAULT){
140    faultAddr = i386_get_cr2();
141    printk("Page fault linear address (CR2) = %x\n", faultAddr);
142    printk("----------------------------------------------------------\n\n");
143  }
144 if (_ISR_Nest_level > 0) {
145    /*
146     * In this case we shall not delete the task interrupted as
147     * it has nothing to do with the fault. We cannot return either
148     * because the eip points to the faulty instruction so...
149     */
150    printk("Exception while executing ISR!!!. System locked\n");
151    _CPU_Fatal_halt(faultAddr);
152  }
153  else {
154        struct Frame_ *fp = (struct Frame_*)ctx->ebp;
155        int           i;
156
157        printk("Call Stack Trace of EIP:\n");
158        if ( fp ) {
159                for ( i=1; fp->up; fp=fp->up, i++ ) {
160                        printk("0x%08x ",fp->pc);
161                        if ( ! (i&3) )
162                                printk("\n");
163                }
164        }
165        printk("\n");
166    /*
167     * OK I could probably use a simplified version but at least this
168     * should work.
169     */
170#if 0
171    printk(" ************ FAULTY THREAD WILL BE SUSPENDED **************\n");
172    rtems_task_suspend(_Thread_Executing->Object.id);
173#endif
174    bsp_reset();
175  }
176}
177
178cpuExcHandlerType _currentExcHandler = _defaultExcHandler;
179
180extern void rtems_exception_prologue_0(void);
181extern void rtems_exception_prologue_1(void);
182extern void rtems_exception_prologue_2(void);
183extern void rtems_exception_prologue_3(void);
184extern void rtems_exception_prologue_4(void);
185extern void rtems_exception_prologue_5(void);
186extern void rtems_exception_prologue_6(void);
187extern void rtems_exception_prologue_7(void);
188extern void rtems_exception_prologue_8(void);
189extern void rtems_exception_prologue_9(void);
190extern void rtems_exception_prologue_10(void);
191extern void rtems_exception_prologue_11(void);
192extern void rtems_exception_prologue_12(void);
193extern void rtems_exception_prologue_13(void);
194extern void rtems_exception_prologue_14(void);
195extern void rtems_exception_prologue_16(void);
196extern void rtems_exception_prologue_17(void);
197extern void rtems_exception_prologue_18(void);
198#ifdef __SSE__
199extern void rtems_exception_prologue_19(void);
200#endif
201
202static rtems_raw_irq_hdl tbl[] = {
203         rtems_exception_prologue_0,
204         rtems_exception_prologue_1,
205         rtems_exception_prologue_2,
206         rtems_exception_prologue_3,
207         rtems_exception_prologue_4,
208         rtems_exception_prologue_5,
209         rtems_exception_prologue_6,
210         rtems_exception_prologue_7,
211         rtems_exception_prologue_8,
212         rtems_exception_prologue_9,
213         rtems_exception_prologue_10,
214         rtems_exception_prologue_11,
215         rtems_exception_prologue_12,
216         rtems_exception_prologue_13,
217         rtems_exception_prologue_14,
218     0,
219         rtems_exception_prologue_16,
220         rtems_exception_prologue_17,
221         rtems_exception_prologue_18,
222#ifdef __SSE__
223         rtems_exception_prologue_19,
224#endif
225};
226
227void rtems_exception_init_mngt(void)
228{
229      size_t                     i,j;
230      interrupt_gate_descriptor  *currentIdtEntry;
231      unsigned                   limit;
232      unsigned                   level;
233
234      i = sizeof(tbl) / sizeof (rtems_raw_irq_hdl);
235
236      i386_get_info_from_IDTR (&currentIdtEntry, &limit);
237
238      _CPU_ISR_Disable(level);
239      for (j = 0; j < i; j++) {
240        create_interrupt_gate_descriptor (&currentIdtEntry[j], tbl[j]);
241      }
242      _CPU_ISR_Enable(level);
243}
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