[ac7d5ef0] | 1 | /* |
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| 2 | * Intel i386 Dependent Source |
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| 3 | * |
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| 4 | * |
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[08311cc3] | 5 | * COPYRIGHT (c) 1989-1999. |
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[ac7d5ef0] | 6 | * On-Line Applications Research Corporation (OAR). |
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| 7 | * |
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[98e4ebf5] | 8 | * The license and distribution terms for this file may be |
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| 9 | * found in the file LICENSE in this distribution or at |
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[51fa11c] | 10 | * http://www.rtems.com/license/LICENSE. |
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[ac7d5ef0] | 11 | * |
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| 12 | * $Id$ |
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| 13 | */ |
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| 14 | |
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[a324355] | 15 | #include <rtems.h> |
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[ac7d5ef0] | 16 | #include <rtems/system.h> |
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[a324355] | 17 | #include <rtems/score/types.h> |
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[5e9b32b] | 18 | #include <rtems/score/isr.h> |
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[a324355] | 19 | #include <rtems/score/idtr.h> |
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| 20 | |
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[d56918c9] | 21 | #include <rtems/bspIo.h> |
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[eb562f2] | 22 | #include <rtems/score/thread.h> |
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[ac7d5ef0] | 23 | |
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| 24 | /* _CPU_Initialize |
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| 25 | * |
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| 26 | * This routine performs processor dependent initialization. |
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| 27 | * |
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| 28 | * INPUT PARAMETERS: |
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| 29 | * cpu_table - CPU table to initialize |
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| 30 | * thread_dispatch - address of disptaching routine |
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| 31 | */ |
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| 32 | |
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| 33 | |
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| 34 | void _CPU_Initialize( |
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| 35 | rtems_cpu_table *cpu_table, |
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| 36 | void (*thread_dispatch) /* ignored on this CPU */ |
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| 37 | ) |
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| 38 | { |
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[752badac] | 39 | #if CPU_HARDWARE_FP |
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[e6aeabd] | 40 | register uint16_t fp_status asm ("ax"); |
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[3652ad35] | 41 | register void *fp_context; |
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[752badac] | 42 | #endif |
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[ac7d5ef0] | 43 | |
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| 44 | _CPU_Table = *cpu_table; |
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| 45 | |
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| 46 | /* |
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| 47 | * The following code saves a NULL i387 context which is given |
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| 48 | * to each task at start and restart time. The following code |
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| 49 | * is based upon that provided in the i386 Programmer's |
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| 50 | * Manual and should work on any coprocessor greater than |
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| 51 | * the i80287. |
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| 52 | * |
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[6805640e] | 53 | * NOTE: The NO WAIT form of the coprocessor instructions |
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[ac7d5ef0] | 54 | * MUST be used in case there is not a coprocessor |
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| 55 | * to wait for. |
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| 56 | */ |
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| 57 | |
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[6805640e] | 58 | #if CPU_HARDWARE_FP |
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[ac7d5ef0] | 59 | fp_status = 0xa5a5; |
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| 60 | asm volatile( "fninit" ); |
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| 61 | asm volatile( "fnstsw %0" : "=a" (fp_status) : "0" (fp_status) ); |
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| 62 | |
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| 63 | if ( fp_status == 0 ) { |
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| 64 | |
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[3652ad35] | 65 | fp_context = &_CPU_Null_fp_context; |
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[ac7d5ef0] | 66 | |
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| 67 | asm volatile( "fsave (%0)" : "=r" (fp_context) |
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| 68 | : "0" (fp_context) |
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| 69 | ); |
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| 70 | } |
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[6805640e] | 71 | #endif |
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| 72 | |
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[ac7d5ef0] | 73 | } |
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| 74 | |
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[3a4ae6c] | 75 | /*PAGE |
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| 76 | * |
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| 77 | * _CPU_ISR_Get_level |
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| 78 | */ |
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[84c53452] | 79 | |
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[e6aeabd] | 80 | uint32_t _CPU_ISR_Get_level( void ) |
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[3a4ae6c] | 81 | { |
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[e6aeabd] | 82 | uint32_t level; |
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[84c53452] | 83 | |
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[3a4ae6c] | 84 | i386_get_interrupt_level( level ); |
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[84c53452] | 85 | |
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[3a4ae6c] | 86 | return level; |
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| 87 | } |
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[8b2ee37c] | 88 | |
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| 89 | void _CPU_Thread_Idle_body () |
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| 90 | { |
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| 91 | while(1){ |
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| 92 | asm volatile ("hlt"); |
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| 93 | } |
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| 94 | } |
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[eb562f2] | 95 | |
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| 96 | void _defaultExcHandler (CPU_Exception_frame *ctx) |
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| 97 | { |
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[1dfc188e] | 98 | unsigned int faultAddr = 0; |
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[eb562f2] | 99 | printk("----------------------------------------------------------\n"); |
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| 100 | printk("Exception %d caught at PC %x by thread %d\n", |
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| 101 | ctx->idtIndex, |
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| 102 | ctx->eip, |
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| 103 | _Thread_Executing->Object.id); |
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| 104 | printk("----------------------------------------------------------\n"); |
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| 105 | printk("Processor execution context at time of the fault was :\n"); |
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| 106 | printk("----------------------------------------------------------\n"); |
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| 107 | printk(" EAX = %x EBX = %x ECX = %x EDX = %x\n", |
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| 108 | ctx->eax, ctx->ebx, ctx->ecx, ctx->edx); |
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| 109 | printk(" ESI = %x EDI = %x EBP = %x ESP = %x\n", |
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| 110 | ctx->esi, ctx->edi, ctx->ebp, ctx->esp0); |
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| 111 | printk("----------------------------------------------------------\n"); |
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| 112 | printk("Error code pushed by processor itself (if not 0) = %x\n", |
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| 113 | ctx->faultCode); |
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[e029467] | 114 | printk("----------------------------------------------------------\n"); |
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[6dfebd9] | 115 | if (ctx->idtIndex == I386_EXCEPTION_PAGE_FAULT){ |
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[e029467] | 116 | faultAddr = i386_get_cr2(); |
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[1dfc188e] | 117 | printk("Page fault linear address (CR2) = %x\n", faultAddr); |
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| 118 | printk("----------------------------------------------------------\n\n"); |
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[e029467] | 119 | } |
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| 120 | if (_ISR_Nest_level > 0) { |
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[b285860] | 121 | /* |
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| 122 | * In this case we shall not delete the task interrupted as |
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| 123 | * it has nothing to do with the fault. We cannot return either |
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| 124 | * because the eip points to the faulty instruction so... |
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| 125 | */ |
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| 126 | printk("Exception while executing ISR!!!. System locked\n"); |
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[8f3c1d20] | 127 | _CPU_Fatal_halt(faultAddr); |
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[b285860] | 128 | } |
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| 129 | else { |
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| 130 | /* |
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| 131 | * OK I could probably use a simplified version but at least this |
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| 132 | * should work. |
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| 133 | */ |
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| 134 | printk(" ************ FAULTY THREAD WILL BE DELETED **************\n"); |
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| 135 | rtems_task_delete(_Thread_Executing->Object.id); |
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| 136 | } |
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[eb562f2] | 137 | } |
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| 138 | |
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| 139 | cpuExcHandlerType _currentExcHandler = _defaultExcHandler; |
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| 140 | |
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| 141 | extern void rtems_exception_prologue_0(); |
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| 142 | extern void rtems_exception_prologue_1(); |
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| 143 | extern void rtems_exception_prologue_2(); |
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| 144 | extern void rtems_exception_prologue_3(); |
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| 145 | extern void rtems_exception_prologue_4(); |
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| 146 | extern void rtems_exception_prologue_5(); |
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| 147 | extern void rtems_exception_prologue_6(); |
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| 148 | extern void rtems_exception_prologue_7(); |
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| 149 | extern void rtems_exception_prologue_8(); |
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| 150 | extern void rtems_exception_prologue_9(); |
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| 151 | extern void rtems_exception_prologue_10(); |
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| 152 | extern void rtems_exception_prologue_11(); |
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| 153 | extern void rtems_exception_prologue_12(); |
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| 154 | extern void rtems_exception_prologue_13(); |
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| 155 | extern void rtems_exception_prologue_14(); |
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| 156 | extern void rtems_exception_prologue_16(); |
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| 157 | extern void rtems_exception_prologue_17(); |
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| 158 | extern void rtems_exception_prologue_18(); |
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| 159 | |
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| 160 | static rtems_raw_irq_hdl tbl[] = { |
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| 161 | rtems_exception_prologue_0, |
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| 162 | rtems_exception_prologue_1, |
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| 163 | rtems_exception_prologue_2, |
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| 164 | rtems_exception_prologue_3, |
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| 165 | rtems_exception_prologue_4, |
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| 166 | rtems_exception_prologue_5, |
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| 167 | rtems_exception_prologue_6, |
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| 168 | rtems_exception_prologue_7, |
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| 169 | rtems_exception_prologue_8, |
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| 170 | rtems_exception_prologue_9, |
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| 171 | rtems_exception_prologue_10, |
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| 172 | rtems_exception_prologue_11, |
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| 173 | rtems_exception_prologue_12, |
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| 174 | rtems_exception_prologue_13, |
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| 175 | rtems_exception_prologue_14, |
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| 176 | rtems_exception_prologue_16, |
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| 177 | rtems_exception_prologue_17, |
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| 178 | rtems_exception_prologue_18, |
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| 179 | }; |
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| 180 | |
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| 181 | void rtems_exception_init_mngt() |
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| 182 | { |
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| 183 | unsigned int i,j; |
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| 184 | interrupt_gate_descriptor *currentIdtEntry; |
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| 185 | unsigned limit; |
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| 186 | unsigned level; |
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[84c53452] | 187 | |
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[eb562f2] | 188 | i = sizeof(tbl) / sizeof (rtems_raw_irq_hdl); |
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| 189 | |
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| 190 | i386_get_info_from_IDTR (¤tIdtEntry, &limit); |
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| 191 | |
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| 192 | _CPU_ISR_Disable(level); |
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| 193 | for (j = 0; j < i; j++) { |
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| 194 | create_interrupt_gate_descriptor (¤tIdtEntry[j], tbl[j]); |
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| 195 | } |
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| 196 | _CPU_ISR_Enable(level); |
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| 197 | } |
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