source: rtems/cpukit/score/cpu/hppa1.1/cpu.c @ 591d45e

4.104.114.84.95
Last change on this file since 591d45e was 591d45e, checked in by Joel Sherrill <joel.sherrill@…>, on 10/06/95 at 20:49:51

fixed null pointer dereference

  • Property mode set to 100644
File size: 8.2 KB
Line 
1/*
2 *  HP PA-RISC Dependent Source
3 *
4 *  COPYRIGHT (c) 1994 by Division Incorporated
5 *
6 *  To anyone who acknowledges that this file is provided "AS IS"
7 *  without any express or implied warranty:
8 *      permission to use, copy, modify, and distribute this file
9 *      for any purpose is hereby granted without fee, provided that
10 *      the above copyright notice and this notice appears in all
11 *      copies, and that the name of Division Incorporated not be
12 *      used in advertising or publicity pertaining to distribution
13 *      of the software without specific, written prior permission.
14 *      Division Incorporated makes no representations about the
15 *      suitability of this software for any purpose.
16 *
17 *  $Id$
18 */
19
20#include <rtems/system.h>
21#include <rtems/fatal.h>
22#include <rtems/core/isr.h>
23#include <rtems/core/wkspace.h>
24
25void hppa_external_interrupt_initialize(void);
26void hppa_external_interrupt_enable(unsigned32);
27void hppa_external_interrupt_disable(unsigned32);
28void hppa_external_interrupt(unsigned32, CPU_Interrupt_frame *);
29
30/*
31 * Our interrupt handlers take a 2nd argument:
32 *   a pointer to a CPU_Interrupt_frame
33 * So we use our own prototype instead of rtems_isr_entry
34 */
35
36typedef void ( *hppa_rtems_isr_entry )(
37    ISR_Vector_number,
38    CPU_Interrupt_frame *
39 );
40
41
42/*
43 * who are we?  cpu number
44 * Not used by executive proper, just kept (or not) as a convenience
45 * for libcpu and libbsp stuff that wants it.
46 *
47 * Defaults to 0.  If the BSP doesn't like it, it can change it.
48 */
49
50int cpu_number;                 /* from 0; cpu number in a multi cpu system */
51
52
53/*  _CPU_Initialize
54 *
55 *  This routine performs processor dependent initialization.
56 *
57 *  INPUT PARAMETERS:
58 *    cpu_table       - CPU table to initialize
59 *    thread_dispatch - address of disptaching routine
60 *
61 */
62
63void _CPU_Initialize(
64  rtems_cpu_table  *cpu_table,
65  void      (*thread_dispatch)      /* ignored on this CPU */
66)
67{
68    register unsigned8  *fp_context;
69    unsigned32 iva;
70    unsigned32 iva_table;
71    int i;
72
73    extern void IVA_Table(void);
74
75    /*
76     * XXX; need to setup fpsr smarter perhaps
77     */
78
79    fp_context = (unsigned8*) &_CPU_Null_fp_context;
80    for (i=0 ; i<sizeof(Context_Control_fp); i++)
81        *fp_context++ = 0;
82
83    /*
84     *  Set _CPU_Default_gr27 here so it will hopefully be the correct
85     *  global data pointer for the entire system.
86     */
87
88    asm volatile( "stw   %%r27,%0" : "=m" (_CPU_Default_gr27): );
89
90    /*
91     * Stabilize the interrupt stuff
92     */
93
94    (void) hppa_external_interrupt_initialize();
95
96    /*
97     * Set the IVA to point to physical address of the IVA_Table
98     */
99
100    iva_table = (unsigned32) IVA_Table;
101    HPPA_ASM_LPA(0, iva_table, iva);
102    set_iva(iva);
103
104    _CPU_Table = *cpu_table;
105}
106
107/*PAGE
108 *
109 *  _CPU_ISR_Get_level
110 */
111 
112unsigned32 _CPU_ISR_Get_level(void)
113{
114    int level;
115    HPPA_ASM_SSM(0, level);     /* change no bits; just get copy */
116    if (level & HPPA_PSW_I)
117        return 1;
118    return 0;
119}
120
121/*PAGE
122 *
123 *  _CPU_ISR_install_raw_handler
124 */
125 
126void _CPU_ISR_install_raw_handler(
127  unsigned32  vector,
128  proc_ptr    new_handler,
129  proc_ptr   *old_handler
130)
131{
132  /*
133   *  This is unsupported.
134   */
135
136  _CPU_Fatal_halt( 0xdeaddead );
137}
138
139/*PAGE
140 *
141 *  _CPU_ISR_install_vector
142 *
143 *  This kernel routine installs the RTEMS handler for the
144 *  specified vector.
145 *
146 *  Input parameters:
147 *    vector      - interrupt vector number
148 *    old_handler - former ISR for this vector number
149 *    new_handler - replacement ISR for this vector number
150 *
151 *  Output parameters:  NONE
152 *
153 */
154
155/*
156 * HPPA has 8w for each vector instead of an address to jump to.
157 * We put the actual ISR address in '_ISR_vector_table'.  This will
158 * be pulled by the code in the vector.
159 */
160
161void _CPU_ISR_install_vector(
162  unsigned32  vector,
163  proc_ptr    new_handler,
164  proc_ptr   *old_handler
165)
166{
167    *old_handler = _ISR_Vector_table[vector];
168
169    _ISR_Vector_table[vector] = new_handler;
170
171    if (vector >= HPPA_INTERRUPT_EXTERNAL_BASE)
172    {
173        unsigned32 external_vector;
174
175        external_vector = vector - HPPA_INTERRUPT_EXTERNAL_BASE;
176        if (new_handler)
177            hppa_external_interrupt_enable(external_vector);
178        else
179            /* XXX this can never happen due to _ISR_Is_valid_user_handler */
180            hppa_external_interrupt_disable(external_vector);
181    }
182}
183
184
185/*
186 * Support for external and spurious interrupts on HPPA
187 *
188 *  TODO:
189 *    delete interrupt.c etc.
190 *    Count interrupts
191 *    make sure interrupts disabled properly
192 *    should handler check again for more interrupts before exit?
193 *    How to enable interrupts from an interrupt handler?
194 *    Make sure there is an entry for everything in ISR_Vector_Table
195 */
196
197#define DISMISS(mask)           set_eirr(mask)
198#define DISABLE(mask)           set_eiem(get_eiem() & ~(mask))
199#define ENABLE(mask)            set_eiem(get_eiem() | (mask))
200#define VECTOR_TO_MASK(v)       (1 << (31 - (v)))
201
202/*
203 * Init the external interrupt scheme
204 * called by bsp_start()
205 */
206
207void
208hppa_external_interrupt_initialize(void)
209{
210    proc_ptr ignore;
211
212    /* mark them all unused */
213
214    DISABLE(~0);
215    DISMISS(~0);
216
217    /* install the external interrupt handler */
218  _CPU_ISR_install_vector(
219    HPPA_INTERRUPT_EXTERNAL_INTERRUPT,
220    (proc_ptr)hppa_external_interrupt,
221    &ignore
222  );
223}
224
225/*
226 * Enable a specific external interrupt
227 */
228
229void
230hppa_external_interrupt_enable(unsigned32 v)
231{
232    unsigned32 isrlevel;
233
234    _CPU_ISR_Disable(isrlevel);
235    ENABLE(VECTOR_TO_MASK(v));
236    _CPU_ISR_Enable(isrlevel);
237}
238
239/*
240 * Does not clear or otherwise affect any pending requests
241 */
242
243void
244hppa_external_interrupt_disable(unsigned32 v)
245{
246    unsigned32 isrlevel;
247
248    _CPU_ISR_Disable(isrlevel);
249    DISABLE(VECTOR_TO_MASK(v));
250    _CPU_ISR_Enable(isrlevel);
251}
252
253void
254hppa_external_interrupt_spurious_handler(unsigned32           vector,
255                                         CPU_Interrupt_frame *iframe)
256{
257/* XXX should not be printing :)
258    printf("spurious external interrupt: %d at pc 0x%x; disabling\n",
259       vector, iframe->Interrupt.pcoqfront);
260*/
261    DISMISS(VECTOR_TO_MASK(vector));
262    DISABLE(VECTOR_TO_MASK(vector));
263}
264
265void
266hppa_external_interrupt_report_spurious(unsigned32           spurious,
267                                        CPU_Interrupt_frame *iframe)
268{
269    int v;
270    for (v=0; v < HPPA_EXTERNAL_INTERRUPTS; v++)
271        if (VECTOR_TO_MASK(v) & spurious)
272            hppa_external_interrupt_spurious_handler(v, iframe);
273    DISMISS(spurious);
274}
275
276
277/*
278 * External interrupt handler.
279 * This is installed as cpu interrupt handler for
280 * HPPA_INTERRUPT_EXTERNAL_INTERRUPT. It vectors out to
281 * specific external interrupt handlers.
282 */
283
284void
285hppa_external_interrupt(unsigned32           vector,
286                        CPU_Interrupt_frame *iframe)
287{
288    unsigned32   mask;
289    unsigned32  *vp, *max_vp;
290    unsigned32   external_vector;
291    unsigned32   global_vector;
292    hppa_rtems_isr_entry handler;
293
294    max_vp = &_CPU_Table.external_interrupt[_CPU_Table.external_interrupts];
295    while ( (mask = (get_eirr() & get_eiem())) )
296    {
297        for (vp = _CPU_Table.external_interrupt; (vp < max_vp) && mask; vp++)
298        {
299            unsigned32 m;
300
301            external_vector = *vp;
302            global_vector = external_vector + HPPA_INTERRUPT_EXTERNAL_BASE;
303            m = VECTOR_TO_MASK(external_vector);
304            handler = (hppa_rtems_isr_entry) _ISR_Vector_table[global_vector];
305            if ((m & mask) && handler)
306            {
307                DISMISS(m);
308                mask &= ~m;
309                (*handler)(global_vector, iframe);
310            }
311        }
312
313        if (mask != 0) {
314            if ( _CPU_Table.spurious_handler )
315              (*((hppa_rtems_isr_entry) _CPU_Table.spurious_handler))(
316                  mask,
317                  iframe
318                );
319            else
320              hppa_external_interrupt_report_spurious(mask, iframe);
321        }
322    }
323}
324
325/*
326 * Halt the system.
327 * Called by the _CPU_Fatal_halt macro
328 *
329 * XXX
330 * Later on, this will allow us to return to the prom.
331 * For now, we just ignore 'type_of_halt'
332 */
333
334void
335hppa_cpu_halt(unsigned32 type_of_halt,
336              unsigned32 the_error)
337{
338    unsigned32 isrlevel;
339
340    _CPU_ISR_Disable(isrlevel);
341
342    asm volatile( "copy %0,%%r1" : : "r" (the_error) );
343    HPPA_ASM_BREAK(1, 0);
344}
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