source: rtems/cpukit/score/cpu/h8300/cpu.c @ c346f33d

4.104.114.84.95
Last change on this file since c346f33d was c346f33d, checked in by Ralf Corsepius <ralf.corsepius@…>, on Mar 30, 2004 at 11:49:14 AM

2004-03-30 Ralf Corsepius <ralf_corsepius@…>

  • cpu.c, rtems/score/cpu.h: Convert to using c99 fixed size types.
  • Property mode set to 100644
File size: 3.9 KB
Line 
1/*
2 *  Hitachi H8300 CPU Dependent Source
3 *
4 *  COPYRIGHT (c) 1989-1999.
5 *  On-Line Applications Research Corporation (OAR).
6 *
7 *  The license and distribution terms for this file may be
8 *  found in the file LICENSE in this distribution or at
9 *  http://www.rtems.com/license/LICENSE.
10 *
11 *  $Id$
12 */
13
14#include <rtems/system.h>
15#include <rtems/score/isr.h>
16#include <rtems/score/wkspace.h>
17
18/*  _CPU_Initialize
19 *
20 *  This routine performs processor dependent initialization.
21 *
22 *  INPUT PARAMETERS:
23 *    cpu_table       - CPU table to initialize
24 *    thread_dispatch - address of disptaching routine
25 */
26
27
28void _CPU_Initialize(
29  rtems_cpu_table  *cpu_table,
30  void      (*thread_dispatch)      /* ignored on this CPU */
31)
32{
33  /*
34   *  The thread_dispatch argument is the address of the entry point
35   *  for the routine called at the end of an ISR once it has been
36   *  decided a context switch is necessary.  On some compilation
37   *  systems it is difficult to call a high-level language routine
38   *  from assembly.  This allows us to trick these systems.
39   *
40   *  If you encounter this problem save the entry point in a CPU
41   *  dependent variable.
42   */
43
44  _CPU_Thread_dispatch_pointer = thread_dispatch;
45
46  /*
47   *  If there is not an easy way to initialize the FP context
48   *  during Context_Initialize, then it is usually easier to
49   *  save an "uninitialized" FP context here and copy it to
50   *  the task's during Context_Initialize.
51   */
52
53  /* FP context initialization support goes here */
54
55  _CPU_Table = *cpu_table;
56}
57
58/*PAGE
59 *
60 *  _CPU_ISR_Get_level
61 *
62 *  This routine returns the current interrupt level.
63 */
64 
65uint32_t   _CPU_ISR_Get_level( void )
66{
67  unsigned int _ccr;
68
69#if defined(__H8300__)
70#warning "How do we get ccr on base CPU models"
71#else
72  asm volatile ( "stc ccr, %0" : "=m" (_ccr) : );
73#endif
74
75  if ( _ccr & 0x80 )
76    return 1;
77  return 0;
78}
79
80/*PAGE
81 *
82 *  _CPU_ISR_install_raw_handler
83 */
84 
85void _CPU_ISR_install_raw_handler(
86  uint32_t    vector,
87  proc_ptr    new_handler,
88  proc_ptr   *old_handler
89)
90{
91  /*
92   *  This is where we install the interrupt handler into the "raw" interrupt
93   *  table used by the CPU to dispatch interrupt handlers.
94   *  Use Debug level IRQ Handlers
95   */
96  H8BD_Install_IRQ(vector,new_handler,old_handler);
97}
98
99/*PAGE
100 *
101 *  _CPU_ISR_install_vector
102 *
103 *  This kernel routine installs the RTEMS handler for the
104 *  specified vector.
105 *
106 *  Input parameters:
107 *    vector      - interrupt vector number
108 *    old_handler - former ISR for this vector number
109 *    new_handler - replacement ISR for this vector number
110 *
111 *  Output parameters:  NONE
112 *
113 */
114
115void _CPU_ISR_install_vector(
116  uint32_t    vector,
117  proc_ptr    new_handler,
118  proc_ptr   *old_handler
119)
120{
121   *old_handler = _ISR_Vector_table[ vector ];
122
123   /*
124    *  If the interrupt vector table is a table of pointer to isr entry
125    *  points, then we need to install the appropriate RTEMS interrupt
126    *  handler for this vector number.
127    */
128
129   _CPU_ISR_install_raw_handler( vector, new_handler, old_handler );
130
131   /*
132    *  We put the actual user ISR address in '_ISR_vector_table'.  This will
133    *  be used by the _ISR_Handler so the user gets control.
134    */
135
136    _ISR_Vector_table[ vector ] = new_handler;
137}
138
139/*PAGE
140 *
141 *  _CPU_Install_interrupt_stack
142 */
143
144void _CPU_Install_interrupt_stack( void )
145{
146}
147
148/*PAGE
149 *
150 *  _CPU_Thread_Idle_body
151 *
152 *  NOTES:
153 *
154 *  1. This is the same as the regular CPU independent algorithm.
155 *
156 *  2. If you implement this using a "halt", "idle", or "shutdown"
157 *     instruction, then don't forget to put it in an infinite loop.
158 *
159 *  3. Be warned. Some processors with onboard DMA have been known
160 *     to stop the DMA if the CPU were put in IDLE mode.  This might
161 *     also be a problem with other on-chip peripherals.  So use this
162 *     hook with caution.
163 */
164
165#if 0
166void _CPU_Thread_Idle_body( void )
167{
168
169  for( ; ; )
170    IDLE_Monitor();
171        /*asm(" sleep   \n"); */
172    /* insert your "halt" instruction here */ ;
173}
174#endif
Note: See TracBrowser for help on using the repository browser.