source: rtems/cpukit/score/cpu/h8300/cpu.c @ 60f016f

4.104.114.84.95
Last change on this file since 60f016f was 60f016f, checked in by Joel Sherrill <joel.sherrill@…>, on May 22, 2007 at 8:57:34 PM

2007-05-22 Joel Sherrill <joel.sherrill@…>

  • score/cpu/arm/cpu.c, score/cpu/avr/cpu.c, score/cpu/bfin/cpu.c, score/cpu/c4x/cpu.c, score/cpu/h8300/cpu.c, score/cpu/i386/cpu.c, score/cpu/m68k/cpu.c, score/cpu/mips/cpu.c, score/cpu/nios2/cpu.c, score/cpu/no_cpu/cpu.c, score/cpu/sh/cpu.c, score/cpu/sparc/cpu.c, cpukit/sapi/src/exinit.c: Move copying of CPU Table to shared executive initialization.
  • Property mode set to 100644
File size: 3.9 KB
Line 
1/*
2 *  Hitachi H8300 CPU Dependent Source
3 *
4 *  COPYRIGHT (c) 1989-1999.
5 *  On-Line Applications Research Corporation (OAR).
6 *
7 *  The license and distribution terms for this file may be
8 *  found in the file LICENSE in this distribution or at
9 *  http://www.rtems.com/license/LICENSE.
10 *
11 *  $Id$
12 */
13
14#include <rtems/system.h>
15#include <rtems/score/isr.h>
16#include <rtems/score/wkspace.h>
17
18/*  _CPU_Initialize
19 *
20 *  This routine performs processor dependent initialization.
21 *
22 *  INPUT PARAMETERS:
23 *    cpu_table       - CPU table to initialize
24 *    thread_dispatch - address of disptaching routine
25 */
26
27
28void _CPU_Initialize(
29  rtems_cpu_table  *cpu_table,
30  void      (*thread_dispatch)      /* ignored on this CPU */
31)
32{
33  /*
34   *  The thread_dispatch argument is the address of the entry point
35   *  for the routine called at the end of an ISR once it has been
36   *  decided a context switch is necessary.  On some compilation
37   *  systems it is difficult to call a high-level language routine
38   *  from assembly.  This allows us to trick these systems.
39   *
40   *  If you encounter this problem save the entry point in a CPU
41   *  dependent variable.
42   */
43
44  _CPU_Thread_dispatch_pointer = thread_dispatch;
45
46  /*
47   *  If there is not an easy way to initialize the FP context
48   *  during Context_Initialize, then it is usually easier to
49   *  save an "uninitialized" FP context here and copy it to
50   *  the task's during Context_Initialize.
51   */
52
53  /* FP context initialization support goes here */
54}
55
56/*PAGE
57 *
58 *  _CPU_ISR_Get_level
59 *
60 *  This routine returns the current interrupt level.
61 */
62 
63uint32_t   _CPU_ISR_Get_level( void )
64{
65  unsigned int _ccr;
66
67#if defined(__H8300__)
68#warning "How do we get ccr on base CPU models"
69#else
70  asm volatile ( "stc ccr, %0" : "=m" (_ccr) : );
71#endif
72
73  if ( _ccr & 0x80 )
74    return 1;
75  return 0;
76}
77
78/*PAGE
79 *
80 *  _CPU_ISR_install_raw_handler
81 */
82 
83void _CPU_ISR_install_raw_handler(
84  uint32_t    vector,
85  proc_ptr    new_handler,
86  proc_ptr   *old_handler
87)
88{
89  /*
90   *  This is where we install the interrupt handler into the "raw" interrupt
91   *  table used by the CPU to dispatch interrupt handlers.
92   *  Use Debug level IRQ Handlers
93   */
94  H8BD_Install_IRQ(vector,new_handler,old_handler);
95}
96
97/*PAGE
98 *
99 *  _CPU_ISR_install_vector
100 *
101 *  This kernel routine installs the RTEMS handler for the
102 *  specified vector.
103 *
104 *  Input parameters:
105 *    vector      - interrupt vector number
106 *    old_handler - former ISR for this vector number
107 *    new_handler - replacement ISR for this vector number
108 *
109 *  Output parameters:  NONE
110 *
111 */
112
113void _CPU_ISR_install_vector(
114  uint32_t    vector,
115  proc_ptr    new_handler,
116  proc_ptr   *old_handler
117)
118{
119   *old_handler = _ISR_Vector_table[ vector ];
120
121   /*
122    *  If the interrupt vector table is a table of pointer to isr entry
123    *  points, then we need to install the appropriate RTEMS interrupt
124    *  handler for this vector number.
125    */
126
127   _CPU_ISR_install_raw_handler( vector, new_handler, old_handler );
128
129   /*
130    *  We put the actual user ISR address in '_ISR_vector_table'.  This will
131    *  be used by the _ISR_Handler so the user gets control.
132    */
133
134    _ISR_Vector_table[ vector ] = new_handler;
135}
136
137/*PAGE
138 *
139 *  _CPU_Install_interrupt_stack
140 */
141
142void _CPU_Install_interrupt_stack( void )
143{
144}
145
146/*PAGE
147 *
148 *  _CPU_Thread_Idle_body
149 *
150 *  NOTES:
151 *
152 *  1. This is the same as the regular CPU independent algorithm.
153 *
154 *  2. If you implement this using a "halt", "idle", or "shutdown"
155 *     instruction, then don't forget to put it in an infinite loop.
156 *
157 *  3. Be warned. Some processors with onboard DMA have been known
158 *     to stop the DMA if the CPU were put in IDLE mode.  This might
159 *     also be a problem with other on-chip peripherals.  So use this
160 *     hook with caution.
161 */
162
163#if 0
164void _CPU_Thread_Idle_body( void )
165{
166
167  for( ; ; )
168    IDLE_Monitor();
169        /*asm(" sleep   \n"); */
170    /* insert your "halt" instruction here */ ;
171}
172#endif
Note: See TracBrowser for help on using the repository browser.