1 | /* |
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2 | * Epiphany CPU Dependent Source |
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3 | * |
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4 | * Copyright (c) 2015 University of York. |
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5 | * Hesham ALMatary <hmka501@york.ac.uk> |
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6 | * |
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7 | * COPYRIGHT (c) 1989-1999. |
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8 | * On-Line Applications Research Corporation (OAR). |
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9 | * |
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10 | * Redistribution and use in source and binary forms, with or without |
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11 | * modification, are permitted provided that the following conditions |
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12 | * are met: |
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13 | * 1. Redistributions of source code must retain the above copyright |
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14 | * notice, this list of conditions and the following disclaimer. |
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15 | * 2. Redistributions in binary form must reproduce the above copyright |
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16 | * notice, this list of conditions and the following disclaimer in the |
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17 | * documentation and/or other materials provided with the distribution. |
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18 | * |
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19 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND |
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20 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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21 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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22 | * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE |
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23 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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24 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
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25 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
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26 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
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27 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
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28 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
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29 | * SUCH DAMAGE. |
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30 | */ |
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31 | |
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32 | #include <rtems/score/cpu.h> |
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33 | |
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34 | void _init(void); |
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35 | void _fini(void); |
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36 | |
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37 | void _init(void) |
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38 | { |
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39 | } |
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40 | |
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41 | void _fini(void) |
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42 | { |
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43 | } |
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44 | |
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45 | void _CPU_Exception_frame_print (const CPU_Exception_frame *ctx) |
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46 | { |
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47 | /* Do nothing */ |
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48 | } |
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49 | /** |
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50 | * @brief Performs processor dependent initialization. |
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51 | */ |
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52 | void _CPU_Initialize(void) |
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53 | { |
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54 | /* Do nothing */ |
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55 | } |
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56 | |
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57 | void _CPU_ISR_Set_level(uint32_t level) |
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58 | { |
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59 | /* Do nothing */ |
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60 | } |
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61 | |
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62 | uint32_t _CPU_ISR_Get_level( void ) |
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63 | { |
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64 | /* Do nothing */ |
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65 | return 0; |
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66 | } |
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67 | |
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68 | CPU_Counter_ticks _CPU_Counter_read( void ) |
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69 | { |
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70 | static CPU_Counter_ticks counter; |
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71 | |
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72 | CPU_Counter_ticks snapshot; |
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73 | |
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74 | snapshot = counter; |
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75 | counter = snapshot + 1; |
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76 | |
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77 | return snapshot; |
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78 | } |
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79 | |
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80 | void *_CPU_Thread_Idle_body( uintptr_t ignored ) |
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81 | { |
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82 | do { |
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83 | __asm__ __volatile__ ("idle"); |
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84 | } while (1); |
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85 | |
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86 | return NULL; |
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87 | } |
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