source: rtems/cpukit/score/cpu/epiphany/cpu.c @ 12641f7b

5
Last change on this file since 12641f7b was 12641f7b, checked in by Sebastian Huber <sebastian.huber@…>, on Dec 14, 2017 at 7:12:52 AM

epiphany: Remove superfluous includes

Update #3254.

  • Property mode set to 100644
File size: 2.5 KB
Line 
1/*
2 * Epiphany CPU Dependent Source
3 *
4 * Copyright (c) 2015 University of York.
5 * Hesham ALMatary <hmka501@york.ac.uk>
6 *
7 * COPYRIGHT (c) 1989-1999.
8 * On-Line Applications Research Corporation (OAR).
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 *    notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 *    notice, this list of conditions and the following disclaimer in the
17 *    documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 * SUCH DAMAGE.
30 */
31
32#include <rtems/score/cpu.h>
33
34void _init(void);
35void _fini(void);
36
37void _init(void)
38{
39}
40
41void _fini(void)
42{
43}
44
45void _CPU_Exception_frame_print (const CPU_Exception_frame *ctx)
46{
47  /* Do nothing */
48}
49/**
50 * @brief Performs processor dependent initialization.
51 */
52void _CPU_Initialize(void)
53{
54  /* Do nothing */
55}
56
57void _CPU_ISR_Set_level(uint32_t level)
58{
59  /* Do nothing */
60}
61
62uint32_t  _CPU_ISR_Get_level( void )
63{
64  /* Do nothing */
65  return 0;
66}
67
68void _CPU_ISR_install_raw_handler(
69  uint32_t   vector,
70  proc_ptr    new_handler,
71  proc_ptr   *old_handler
72)
73{
74  /* Do nothing */
75}
76
77void _CPU_ISR_install_vector(
78  uint32_t    vector,
79  proc_ptr    new_handler,
80  proc_ptr   *old_handler
81)
82{
83  /* Do nothing */
84}
85
86void _CPU_Install_interrupt_stack( void )
87{
88  /* Do nothing */
89}
90
91CPU_Counter_ticks _CPU_Counter_read( void )
92{
93  static CPU_Counter_ticks counter;
94
95  CPU_Counter_ticks snapshot;
96
97  snapshot = counter;
98  counter = snapshot + 1;
99
100  return snapshot;
101}
102
103void *_CPU_Thread_Idle_body( uintptr_t ignored )
104{
105  do {
106    __asm__ __volatile__ ("idle");
107  } while (1);
108 
109  return NULL;
110}
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