source: rtems/cpukit/score/cpu/epiphany/cpu.c @ 0c334a5

Last change on this file since 0c334a5 was 0c334a5, checked in by Joel Sherrill <joel@…>, on Apr 23, 2017 at 5:57:27 PM

epiphany/cpu.c: Fix not a prototype warning

  • Property mode set to 100644
File size: 2.6 KB
Line 
1/*
2 * Epiphany CPU Dependent Source
3 *
4 * Copyright (c) 2015 University of York.
5 * Hesham ALMatary <hmka501@york.ac.uk>
6 *
7 * COPYRIGHT (c) 1989-1999.
8 * On-Line Applications Research Corporation (OAR).
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 *    notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 *    notice, this list of conditions and the following disclaimer in the
17 *    documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 * SUCH DAMAGE.
30 */
31
32#include <rtems/system.h>
33#include <rtems/score/isr.h>
34#include <rtems/score/wkspace.h>
35#include <bsp/linker-symbols.h>
36#include <rtems/score/cpu.h>
37
38void init(void);
39void fini(void);
40
41void _init(void)
42{
43}
44
45void _fini(void)
46{
47}
48
49void _CPU_Exception_frame_print (const CPU_Exception_frame *ctx)
50{
51  /* Do nothing */
52}
53/**
54 * @brief Performs processor dependent initialization.
55 */
56void _CPU_Initialize(void)
57{
58  /* Do nothing */
59}
60
61void _CPU_ISR_Set_level(uint32_t level)
62{
63  /* Do nothing */
64}
65
66uint32_t  _CPU_ISR_Get_level( void )
67{
68  /* Do nothing */
69  return 0;
70}
71
72void _CPU_ISR_install_raw_handler(
73  uint32_t   vector,
74  proc_ptr    new_handler,
75  proc_ptr   *old_handler
76)
77{
78  /* Do nothing */
79}
80
81void _CPU_ISR_install_vector(
82  uint32_t    vector,
83  proc_ptr    new_handler,
84  proc_ptr   *old_handler
85)
86{
87  /* Do nothing */
88}
89
90void _CPU_Install_interrupt_stack( void )
91{
92  /* Do nothing */
93}
94
95CPU_Counter_ticks _CPU_Counter_read( void )
96{
97  static CPU_Counter_ticks counter;
98
99  CPU_Counter_ticks snapshot;
100
101  snapshot = counter;
102  counter = snapshot + 1;
103
104  return snapshot;
105}
106
107void *_CPU_Thread_Idle_body( uintptr_t ignored )
108{
109  do {
110    __asm__ __volatile__ ("idle");
111  } while (1);
112 
113  return NULL;
114}
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