[61ba9763] | 1 | /* |
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[4a2b4f0] | 2 | * C4x CPU Dependent Source |
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[61ba9763] | 3 | * |
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| 4 | * |
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| 5 | * COPYRIGHT (c) 1989-1999. |
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| 6 | * On-Line Applications Research Corporation (OAR). |
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| 7 | * |
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| 8 | * The license and distribution terms for this file may be |
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| 9 | * found in the file LICENSE in this distribution or at |
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[b6577224] | 10 | * http://www.rtems.com/license/LICENSE. |
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[61ba9763] | 11 | * |
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| 12 | * $Id$ |
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| 13 | */ |
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| 14 | |
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| 15 | #include <rtems/system.h> |
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| 16 | #include <rtems/score/isr.h> |
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| 17 | #include <rtems/score/wkspace.h> |
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| 18 | |
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| 19 | |
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| 20 | /* _CPU_Initialize |
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| 21 | * |
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| 22 | * This routine performs processor dependent initialization. |
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| 23 | * |
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| 24 | * INPUT PARAMETERS: |
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| 25 | * cpu_table - CPU table to initialize |
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| 26 | * thread_dispatch - address of disptaching routine |
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| 27 | * |
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| 28 | * C4x Specific Information: |
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| 29 | * |
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| 30 | */ |
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| 31 | |
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| 32 | void _CPU_Initialize( |
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| 33 | rtems_cpu_table *cpu_table, |
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| 34 | void (*thread_dispatch) /* ignored on this CPU */ |
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| 35 | ) |
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| 36 | { |
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| 37 | #if 0 |
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| 38 | /* |
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| 39 | * The thread_dispatch argument is the address of the entry point |
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| 40 | * for the routine called at the end of an ISR once it has been |
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| 41 | * decided a context switch is necessary. On some compilation |
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| 42 | * systems it is difficult to call a high-level language routine |
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| 43 | * from assembly. This allows us to trick these systems. |
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| 44 | * |
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| 45 | * If you encounter this problem save the entry point in a CPU |
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| 46 | * dependent variable. |
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| 47 | */ |
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| 48 | |
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| 49 | _CPU_Thread_dispatch_pointer = thread_dispatch; |
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| 50 | #endif |
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| 51 | |
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| 52 | #if (CPU_HARDWARE_FP == TRUE) |
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| 53 | /* |
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| 54 | * If there is not an easy way to initialize the FP context |
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| 55 | * during Context_Initialize, then it is usually easier to |
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| 56 | * save an "uninitialized" FP context here and copy it to |
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| 57 | * the task's during Context_Initialize. |
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| 58 | */ |
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| 59 | |
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| 60 | /* FP context initialization support goes here */ |
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| 61 | #endif |
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| 62 | |
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| 63 | _CPU_Table = *cpu_table; |
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| 64 | } |
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| 65 | |
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| 66 | /*PAGE |
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| 67 | * |
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| 68 | * _CPU_ISR_install_raw_handler |
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| 69 | * |
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| 70 | * C4x Specific Information: |
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| 71 | * |
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| 72 | */ |
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| 73 | |
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| 74 | void _CPU_ISR_install_raw_handler( |
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[16ce0e70] | 75 | uint32_t vector, |
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[61ba9763] | 76 | proc_ptr new_handler, |
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| 77 | proc_ptr *old_handler |
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| 78 | ) |
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| 79 | { |
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| 80 | void **ittp; |
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| 81 | |
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| 82 | /* |
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| 83 | * This is where we install the interrupt handler into the "raw" interrupt |
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| 84 | * table used by the CPU to dispatch interrupt handlers. |
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| 85 | */ |
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| 86 | |
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| 87 | ittp = c4x_get_ittp(); |
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| 88 | *old_handler = ittp[ vector ]; |
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| 89 | ittp[ vector ] = new_handler; |
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| 90 | } |
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| 91 | |
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| 92 | /*XXX */ |
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| 93 | |
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| 94 | #define C4X_CACHE 1 |
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| 95 | #define C4X_BASE_ST (C4X_CACHE==1) ? 0x4800 : 0x4000 |
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| 96 | |
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| 97 | void _CPU_Context_Initialize( |
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| 98 | Context_Control *_the_context, |
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| 99 | void *_stack_base, |
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[16ce0e70] | 100 | uint32_t _size, |
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| 101 | uint32_t _isr, |
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[61ba9763] | 102 | void (*_entry_point)(void), |
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| 103 | int _is_fp |
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| 104 | ) |
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| 105 | { |
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| 106 | unsigned int *_stack; |
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| 107 | _stack = (unsigned int *)_stack_base; |
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| 108 | |
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| 109 | *_stack = (unsigned int) _entry_point; |
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| 110 | _the_context->sp = (unsigned int) _stack; |
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| 111 | _the_context->st = C4X_BASE_ST; |
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| 112 | if ( _isr == 0 ) |
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| 113 | _the_context->st |= C4X_ST_GIE; |
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| 114 | } |
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| 115 | |
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| 116 | /*PAGE |
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| 117 | * |
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| 118 | * _CPU_ISR_install_vector |
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| 119 | * |
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| 120 | * This kernel routine installs the RTEMS handler for the |
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| 121 | * specified vector. |
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| 122 | * |
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| 123 | * Input parameters: |
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| 124 | * vector - interrupt vector number |
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| 125 | * old_handler - former ISR for this vector number |
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| 126 | * new_handler - replacement ISR for this vector number |
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| 127 | * |
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| 128 | * Output parameters: NONE |
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| 129 | * |
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| 130 | * |
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| 131 | * C4x Specific Information: |
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| 132 | * |
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| 133 | */ |
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| 134 | |
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| 135 | void _CPU_ISR_install_vector( |
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[16ce0e70] | 136 | uint32_t vector, |
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[61ba9763] | 137 | proc_ptr new_handler, |
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| 138 | proc_ptr *old_handler |
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| 139 | ) |
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| 140 | { |
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| 141 | proc_ptr ignored; |
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| 142 | extern void rtems_irq_prologue_0(void); |
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| 143 | extern void rtems_irq_prologue_1(void); |
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| 144 | void *entry; |
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| 145 | |
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| 146 | *old_handler = _ISR_Vector_table[ vector ]; |
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| 147 | |
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| 148 | /* |
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| 149 | * If the interrupt vector table is a table of pointer to isr entry |
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| 150 | * points, then we need to install the appropriate RTEMS interrupt |
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| 151 | * handler for this vector number. |
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| 152 | */ |
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| 153 | |
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| 154 | entry = (void *)rtems_irq_prologue_0 + |
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| 155 | ((rtems_irq_prologue_1 - rtems_irq_prologue_0) * vector); |
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| 156 | _CPU_ISR_install_raw_handler( vector, entry, &ignored ); |
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| 157 | |
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| 158 | /* |
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| 159 | * We put the actual user ISR address in '_ISR_vector_table'. This will |
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| 160 | * be used by the _ISR_Handler so the user gets control. |
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| 161 | */ |
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| 162 | |
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| 163 | _ISR_Vector_table[ vector ] = new_handler; |
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| 164 | } |
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| 165 | |
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| 166 | /*PAGE |
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| 167 | * |
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| 168 | * _CPU_Thread_Idle_body |
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| 169 | * |
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| 170 | * NOTES: |
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| 171 | * |
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| 172 | * 1. This is the same as the regular CPU independent algorithm. |
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| 173 | * |
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| 174 | * 2. If you implement this using a "halt", "idle", or "shutdown" |
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| 175 | * instruction, then don't forget to put it in an infinite loop. |
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| 176 | * |
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| 177 | * 3. Be warned. Some processors with onboard DMA have been known |
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| 178 | * to stop the DMA if the CPU were put in IDLE mode. This might |
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| 179 | * also be a problem with other on-chip peripherals. So use this |
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| 180 | * hook with caution. |
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| 181 | * |
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| 182 | * C4x Specific Information: |
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| 183 | * |
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| 184 | * |
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| 185 | */ |
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| 186 | |
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| 187 | #if (CPU_PROVIDES_IDLE_THREAD_BODY == 1) |
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| 188 | void _CPU_Thread_Idle_body( void ) |
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| 189 | { |
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| 190 | |
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| 191 | for( ; ; ) { |
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| 192 | __asm__( "idle" ); |
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| 193 | __asm__( "nop" ); |
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| 194 | __asm__( "nop" ); |
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| 195 | __asm__( "nop" ); |
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| 196 | /* insert your "halt" instruction here */ ; |
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| 197 | } |
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| 198 | } |
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| 199 | #endif |
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