source: rtems/cpukit/score/cpu/bfin/irq.c @ 30e2df6

4.104.114.95
Last change on this file since 30e2df6 was 4daebbd, checked in by Joel Sherrill <joel.sherrill@…>, on 08/14/08 at 15:25:14

2008-08-14 Sebastian Huber <sebastian.huber@…>

  • rtems/include/rtems/rtems/ratemon.h, rtems/include/rtems/rtems/status.h, score/include/rtems/score/coremutex.h, score/include/rtems/score/object.h: Removed extraneous commas.
  • Property mode set to 100644
File size: 2.4 KB
Line 
1/*  Blackfin CPU Dependent Source
2 *
3 *  COPYRIGHT (c) 2006 by Atos Automacao Industrial Ltda.
4 *             written by Alain Schaefer <alain.schaefer@easc.ch>
5 *                    and Antonio Giovanini <antonio@atos.com.br>
6 *
7 *  The license and distribution terms for this file may be
8 *  found in the file LICENSE in this distribution or at
9 *  http://www.rtems.com/license/LICENSE.
10 *
11 *  $Id$
12 */
13 
14
15#if 0 /* this file no longer used */
16 
17#include <rtems/system.h>
18#include <rtems/score/cpu.h>
19#include <rtems/score/isr.h>
20#include <rtems/score/thread.h>
21
22/*
23 *  This routine provides the RTEMS interrupt management.
24 */
25
26#if( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE)
27  unsigned long    *_old_stack_ptr;
28#endif
29
30register unsigned long  *stack_ptr asm("SP");
31
32void ISR_Handler2(uint32_t   vector, void *isr_sp)
33{
34  register uint32_t   level;
35
36  _CPU_ISR_Disable( level );
37
38  _Thread_Dispatch_disable_level++;
39
40#if( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE)
41  if ( _ISR_Nest_level == 0 ) {
42    /* Install irq stack */
43    _old_stack_ptr = stack_ptr;
44    stack_ptr = _CPU_Interrupt_stack_high;
45  }
46#endif
47
48  _ISR_Nest_level++;
49
50  /* leave it to the ISR to decide if they get reenabled */
51  _CPU_ISR_Enable( level );
52
53  /* call isp */
54  if ( _ISR_Vector_table[ vector] )
55    (*_ISR_Vector_table[ vector ])(
56       vector, isr_sp - sizeof(CPU_Interrupt_frame) + 1 );
57
58  _CPU_ISR_Disable( level );
59
60  _ISR_Nest_level--;
61
62#if( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE)
63  if ( _ISR_Nest_level == 0 )       /* restore old stack pointer */
64    stack_ptr = _old_stack_ptr;
65#endif
66
67  _Thread_Dispatch_disable_level--;
68
69  _CPU_ISR_Enable( level );
70
71  if ( _ISR_Nest_level )
72    return;
73
74  if ( _Thread_Dispatch_disable_level ) {
75    _ISR_Signals_to_thread_executing = FALSE;
76    return;
77  }
78
79  if ( _Context_Switch_necessary || _ISR_Signals_to_thread_executing ) {
80    _ISR_Signals_to_thread_executing = FALSE;
81    _ISR_Thread_Dispatch();
82    /*_Thread_Running->Registers.register_rets = current_thread_pc;*/
83  }
84}
85
86uint32_t SIC_IAR_Value ( uint8_t Vector )
87{
88  switch ( Vector ){
89    case 7:
90      return 0x00000000;
91    case 8:
92      return 0x11111111;
93    case 9:
94      return 0x22222222;
95    case 10:
96      return 0x33333333;
97    case 11:
98      return 0x44444444;
99    case 12:
100      return 0x55555555;
101    case 13:
102      return 0x66666666;
103    case 14:
104      return 0x77777777;
105    case 15:
106      return 0x88888888;
107  }
108}
109
110#endif /* 0 */
111
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