1 | /* Blackfin CPU Dependent Source |
---|
2 | * |
---|
3 | * Copyright (c) 2006 by Atos Automacao Industrial Ltda. |
---|
4 | * written by Alain Schaefer <alain.schaefer@easc.ch> |
---|
5 | * and Antonio Giovanini <antonio@atos.com.br> |
---|
6 | * |
---|
7 | * The license and distribution terms for this file may be |
---|
8 | * found in the file LICENSE in this distribution or at |
---|
9 | * http://www.rtems.com/license/LICENSE. |
---|
10 | * |
---|
11 | * $Id$ |
---|
12 | */ |
---|
13 | |
---|
14 | #include <rtems/system.h> |
---|
15 | #include <rtems/score/isr.h> |
---|
16 | #include <rtems/score/wkspace.h> |
---|
17 | #include <rtems/score/bfin.h> |
---|
18 | #include <rtems/bfin/bfin.h> |
---|
19 | |
---|
20 | /* _CPU_Initialize |
---|
21 | * |
---|
22 | * This routine performs processor dependent initialization. |
---|
23 | * |
---|
24 | * INPUT PARAMETERS: |
---|
25 | * cpu_table - CPU table to initialize |
---|
26 | * thread_dispatch - address of disptaching routine |
---|
27 | * |
---|
28 | * NO_CPU Specific Information: |
---|
29 | * |
---|
30 | * XXX document implementation including references if appropriate |
---|
31 | */ |
---|
32 | |
---|
33 | |
---|
34 | void _CPU_Initialize( |
---|
35 | rtems_cpu_table *cpu_table, |
---|
36 | void (*thread_dispatch) /* ignored on this CPU */ |
---|
37 | ) |
---|
38 | { |
---|
39 | /* |
---|
40 | * The thread_dispatch argument is the address of the entry point |
---|
41 | * for the routine called at the end of an ISR once it has been |
---|
42 | * decided a context switch is necessary. On some compilation |
---|
43 | * systems it is difficult to call a high-level language routine |
---|
44 | * from assembly. This allows us to trick these systems. |
---|
45 | * |
---|
46 | * If you encounter this problem save the entry point in a CPU |
---|
47 | * dependent variable. |
---|
48 | */ |
---|
49 | |
---|
50 | _CPU_Thread_dispatch_pointer = thread_dispatch; |
---|
51 | |
---|
52 | /* |
---|
53 | * If there is not an easy way to initialize the FP context |
---|
54 | * during Context_Initialize, then it is usually easier to |
---|
55 | * save an "uninitialized" FP context here and copy it to |
---|
56 | * the task's during Context_Initialize. |
---|
57 | */ |
---|
58 | |
---|
59 | /* FP context initialization support goes here */ |
---|
60 | } |
---|
61 | |
---|
62 | /*PAGE |
---|
63 | * |
---|
64 | * _CPU_ISR_Get_level |
---|
65 | * |
---|
66 | * NO_CPU Specific Information: |
---|
67 | * |
---|
68 | * XXX document implementation including references if appropriate |
---|
69 | */ |
---|
70 | |
---|
71 | uint32_t _CPU_ISR_Get_level( void ) |
---|
72 | { |
---|
73 | /* |
---|
74 | * This routine returns the current interrupt level. |
---|
75 | */ |
---|
76 | |
---|
77 | register uint32_t _tmpimask; |
---|
78 | |
---|
79 | /*read from the IMASK registers*/ |
---|
80 | |
---|
81 | _tmpimask = *((uint32_t*)IMASK); |
---|
82 | |
---|
83 | return _tmpimask; |
---|
84 | } |
---|
85 | |
---|
86 | /*PAGE |
---|
87 | * |
---|
88 | * _CPU_ISR_install_raw_handler |
---|
89 | * |
---|
90 | * NO_CPU Specific Information: |
---|
91 | * |
---|
92 | * XXX document implementation including references if appropriate |
---|
93 | */ |
---|
94 | |
---|
95 | void _CPU_ISR_install_raw_handler( |
---|
96 | uint32_t vector, |
---|
97 | proc_ptr new_handler, |
---|
98 | proc_ptr *old_handler |
---|
99 | ) |
---|
100 | { |
---|
101 | proc_ptr *interrupt_table = NULL; |
---|
102 | /* |
---|
103 | * This is where we install the interrupt handler into the "raw" interrupt |
---|
104 | * table used by the CPU to dispatch interrupt handlers. |
---|
105 | */ |
---|
106 | |
---|
107 | /* base of vector table on blackfin architecture */ |
---|
108 | interrupt_table = (void*)0xFFE02000; |
---|
109 | |
---|
110 | *old_handler = interrupt_table[ vector ]; |
---|
111 | interrupt_table[ vector ] = new_handler; |
---|
112 | |
---|
113 | } |
---|
114 | |
---|
115 | /*PAGE |
---|
116 | * |
---|
117 | * _CPU_ISR_install_vector |
---|
118 | * |
---|
119 | * This kernel routine installs the RTEMS handler for the |
---|
120 | * specified vector. |
---|
121 | * |
---|
122 | * Input parameters: |
---|
123 | * vector - interrupt vector number |
---|
124 | * old_handler - former ISR for this vector number |
---|
125 | * new_handler - replacement ISR for this vector number |
---|
126 | * |
---|
127 | * Output parameters: NONE |
---|
128 | * |
---|
129 | * |
---|
130 | * NO_CPU Specific Information: |
---|
131 | * |
---|
132 | * XXX document implementation including references if appropriate |
---|
133 | */ |
---|
134 | |
---|
135 | void _CPU_ISR_install_vector( |
---|
136 | uint32_t vector, |
---|
137 | proc_ptr new_handler, |
---|
138 | proc_ptr *old_handler |
---|
139 | ) |
---|
140 | { |
---|
141 | *old_handler = _ISR_Vector_table[ vector ]; |
---|
142 | |
---|
143 | /* |
---|
144 | * If the interrupt vector table is a table of pointer to isr entry |
---|
145 | * points, then we need to install the appropriate RTEMS interrupt |
---|
146 | * handler for this vector number. |
---|
147 | */ |
---|
148 | |
---|
149 | _CPU_ISR_install_raw_handler( vector, _ISR_Handler, old_handler ); |
---|
150 | |
---|
151 | /* |
---|
152 | * We put the actual user ISR address in '_ISR_vector_table'. This will |
---|
153 | * be used by the _ISR_Handler so the user gets control. |
---|
154 | */ |
---|
155 | |
---|
156 | _ISR_Vector_table[ vector ] = new_handler; |
---|
157 | } |
---|
158 | |
---|
159 | /* |
---|
160 | * Copied from the arm port. |
---|
161 | */ |
---|
162 | void _CPU_Context_Initialize( |
---|
163 | Context_Control *the_context, |
---|
164 | uint32_t *stack_base, |
---|
165 | uint32_t size, |
---|
166 | uint32_t new_level, |
---|
167 | void *entry_point, |
---|
168 | boolean is_fp |
---|
169 | ) |
---|
170 | { |
---|
171 | uint32_t stack_high; /* highest "stack aligned" address */ |
---|
172 | stack_high = ((uint32_t )(stack_base) + size); |
---|
173 | |
---|
174 | the_context->register_sp = stack_high; |
---|
175 | // gcc/config/bfin/bfin.h defines CPU_MINIMUM_STACK_FRAME_SIZE = 0 thus we do sp=fp |
---|
176 | // is this correct ????? |
---|
177 | the_context->register_fp = stack_high; |
---|
178 | the_context->register_rets = (uint32_t) entry_point; |
---|
179 | |
---|
180 | //mask the interrupt level |
---|
181 | } |
---|
182 | |
---|
183 | |
---|
184 | |
---|
185 | /*PAGE |
---|
186 | * |
---|
187 | * _CPU_Install_interrupt_stack |
---|
188 | * |
---|
189 | * NO_CPU Specific Information: |
---|
190 | * |
---|
191 | * XXX document implementation including references if appropriate |
---|
192 | */ |
---|
193 | |
---|
194 | void _CPU_Install_interrupt_stack( void ) |
---|
195 | { |
---|
196 | } |
---|