1 | /* |
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2 | * AVR CPU Dependent Source |
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3 | * |
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4 | * |
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5 | * COPYRIGHT (c) 1989-2008. |
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6 | * On-Line Applications Research Corporation (OAR). |
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7 | * |
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8 | * The license and distribution terms for this file may be |
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9 | * found in the file LICENSE in this distribution or at |
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10 | * http://www.rtems.com/license/LICENSE. |
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11 | * |
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12 | * $Id$ |
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13 | */ |
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14 | |
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15 | #include <rtems/system.h> |
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16 | #include <rtems/score/isr.h> |
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17 | #include <rtems/score/wkspace.h> |
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18 | |
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19 | #include <rtems/bspIo.h> /* XXX remove me later */ |
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20 | |
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21 | /* _CPU_Initialize |
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22 | * |
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23 | * This routine performs processor dependent initialization. |
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24 | * |
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25 | * INPUT PARAMETERS: NONE |
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26 | * |
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27 | * NO_CPU Specific Information: |
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28 | * |
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29 | * XXX document implementation including references if appropriate |
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30 | */ |
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31 | void _CPU_Initialize(void) |
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32 | { |
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33 | printk( "AVR CPU Initialize\n" ); |
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34 | |
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35 | /* |
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36 | * If there is not an easy way to initialize the FP context |
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37 | * during Context_Initialize, then it is usually easier to |
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38 | * save an "uninitialized" FP context here and copy it to |
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39 | * the task's during Context_Initialize. |
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40 | */ |
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41 | |
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42 | /* FP context initialization support goes here */ |
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43 | } |
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44 | |
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45 | /*PAGE |
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46 | * |
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47 | * _CPU_Context_Initialize |
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48 | * |
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49 | * This kernel routine initializes the basic non-FP context area associated |
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50 | * with each thread. |
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51 | * |
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52 | * Input parameters: |
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53 | * the_context - pointer to the context area |
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54 | * stack_base - address of memory for the SPARC |
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55 | * size - size in bytes of the stack area |
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56 | * new_level - interrupt level for this context area |
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57 | * entry_point - the starting execution point for this this context |
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58 | * is_fp - TRUE if this context is associated with an FP thread |
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59 | * |
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60 | * Output parameters: NONE |
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61 | */ |
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62 | |
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63 | void _CPU_Context_Initialize( |
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64 | Context_Control *the_context, |
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65 | uint32_t *stack_base, |
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66 | uint32_t size, |
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67 | uint32_t new_level, |
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68 | void *entry_point, |
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69 | bool is_fp |
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70 | ) |
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71 | { |
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72 | uint16_t _stack; //declare helper variable |
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73 | _stack = (uint16_t) (stack_base) + (uint16_t) (size); //calc stack pointer |
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74 | the_context->stack_pointer = _stack - 2; //save stack pointer (- 2 bytes) |
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75 | _CPU_Push(_stack, (uint16_t)(entry_point)); //push entry point onto context stack |
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76 | the_context->status = 0; //init status to zero |
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77 | if (new_level == TRUE) _CPU_ISR_Enable( 0 ); |
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78 | #if 0 |
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79 | printk(""); |
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80 | printk("the_context = 0x%x\n", the_context); |
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81 | printk("sp = 0x%x\n\n",_stack); |
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82 | #endif |
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83 | } |
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84 | |
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85 | |
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86 | /*PAGE |
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87 | * |
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88 | * _CPU_ISR_Get_level |
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89 | * |
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90 | * NO_CPU Specific Information: |
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91 | * |
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92 | * XXX document implementation including references if appropriate |
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93 | */ |
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94 | |
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95 | uint32_t _CPU_ISR_Get_level( void ) |
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96 | { |
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97 | /* |
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98 | * This routine returns the current interrupt level. |
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99 | */ |
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100 | |
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101 | return 0; |
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102 | } |
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103 | |
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104 | /*PAGE |
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105 | * |
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106 | * _CPU_ISR_install_raw_handler |
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107 | * |
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108 | * NO_CPU Specific Information: |
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109 | * |
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110 | * XXX document implementation including references if appropriate |
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111 | */ |
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112 | |
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113 | void _CPU_ISR_install_raw_handler( |
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114 | uint32_t vector, |
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115 | proc_ptr new_handler, |
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116 | proc_ptr *old_handler |
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117 | ) |
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118 | { |
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119 | /* |
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120 | * This is where we install the interrupt handler into the "raw" interrupt |
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121 | * table used by the CPU to dispatch interrupt handlers. |
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122 | */ |
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123 | } |
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124 | |
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125 | /*PAGE |
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126 | * |
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127 | * _CPU_ISR_install_vector |
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128 | * |
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129 | * This kernel routine installs the RTEMS handler for the |
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130 | * specified vector. |
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131 | * |
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132 | * Input parameters: |
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133 | * vector - interrupt vector number |
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134 | * old_handler - former ISR for this vector number |
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135 | * new_handler - replacement ISR for this vector number |
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136 | * |
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137 | * Output parameters: NONE |
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138 | * |
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139 | * |
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140 | * NO_CPU Specific Information: |
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141 | * |
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142 | * XXX document implementation including references if appropriate |
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143 | */ |
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144 | |
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145 | void _CPU_ISR_install_vector( |
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146 | uint32_t vector, |
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147 | proc_ptr new_handler, |
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148 | proc_ptr *old_handler |
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149 | ) |
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150 | { |
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151 | *old_handler = _ISR_Vector_table[ vector ]; |
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152 | |
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153 | /* |
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154 | * If the interrupt vector table is a table of pointer to isr entry |
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155 | * points, then we need to install the appropriate RTEMS interrupt |
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156 | * handler for this vector number. |
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157 | */ |
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158 | |
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159 | _CPU_ISR_install_raw_handler( vector, new_handler, old_handler ); |
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160 | |
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161 | /* |
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162 | * We put the actual user ISR address in '_ISR_vector_table'. This will |
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163 | * be used by the _ISR_Handler so the user gets control. |
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164 | */ |
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165 | |
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166 | _ISR_Vector_table[ vector ] = new_handler; |
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167 | } |
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168 | |
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169 | /*PAGE |
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170 | * |
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171 | * _CPU_Install_interrupt_stack |
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172 | * |
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173 | * NO_CPU Specific Information: |
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174 | * |
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175 | * XXX document implementation including references if appropriate |
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176 | */ |
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177 | |
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178 | void _CPU_Install_interrupt_stack( void ) |
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179 | { |
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180 | } |
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181 | |
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182 | /*PAGE |
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183 | * |
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184 | * _CPU_Thread_Idle_body |
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185 | * |
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186 | * NOTES: |
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187 | * |
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188 | * 1. This is the same as the regular CPU independent algorithm. |
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189 | * |
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190 | * 2. If you implement this using a "halt", "idle", or "shutdown" |
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191 | * instruction, then don't forget to put it in an infinite loop. |
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192 | * |
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193 | * 3. Be warned. Some processors with onboard DMA have been known |
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194 | * to stop the DMA if the CPU were put in IDLE mode. This might |
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195 | * also be a problem with other on-chip peripherals. So use this |
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196 | * hook with caution. |
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197 | * |
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198 | * NO_CPU Specific Information: |
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199 | * |
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200 | * XXX document implementation including references if appropriate |
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201 | */ |
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202 | |
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203 | void *_CPU_Thread_Idle_body( uintptr_t ignored ) |
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204 | { |
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205 | |
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206 | for( ; ; ) asm volatile ("sleep"::); |
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207 | /* insert your "halt" instruction here */ ; |
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208 | return (void *) 0; |
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209 | } |
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