source: rtems/cpukit/score/cpu/avr/cpu.c @ b4404843

4.104.115
Last change on this file since b4404843 was b4404843, checked in by Joel Sherrill <joel.sherrill@…>, on 07/17/09 at 18:33:35

2009-07-17 Josh Switnicki <josh.switnicki@…>

*cpu_asm.S: implemented _CPU_Context_Restore by adding tags to
restore section of context switch.
Fixed bug in _CPU_Context_Switch. The wrong registers were being
used for pointer to running task Context_Control struct.

  • Property mode set to 100644
File size: 4.9 KB
Line 
1/*
2 *  AVR CPU Dependent Source
3 *
4 *
5 *  COPYRIGHT (c) 1989-2008.
6 *  On-Line Applications Research Corporation (OAR).
7 *
8 *  The license and distribution terms for this file may be
9 *  found in the file LICENSE in this distribution or at
10 *  http://www.rtems.com/license/LICENSE.
11 *
12 *  $Id$
13 */
14
15#include <rtems/system.h>
16#include <rtems/score/isr.h>
17#include <rtems/score/wkspace.h>
18
19#include <rtems/bspIo.h> /* XXX remove me later */
20
21/*  _CPU_Initialize
22 *
23 *  This routine performs processor dependent initialization.
24 *
25 *  INPUT PARAMETERS: NONE
26 *
27 *  NO_CPU Specific Information:
28 *
29 *  XXX document implementation including references if appropriate
30 */
31void _CPU_Initialize(void)
32{
33  printk( "AVR CPU Initialize\n" );
34
35  /*
36   *  If there is not an easy way to initialize the FP context
37   *  during Context_Initialize, then it is usually easier to
38   *  save an "uninitialized" FP context here and copy it to
39   *  the task's during Context_Initialize.
40   */
41
42  /* FP context initialization support goes here */
43}
44
45/*PAGE
46 *
47 *  _CPU_Context_Initialize
48 *
49 *  This kernel routine initializes the basic non-FP context area associated
50 *  with each thread.
51 *
52 *  Input parameters:
53 *    the_context  - pointer to the context area
54 *    stack_base   - address of memory for the SPARC
55 *    size         - size in bytes of the stack area
56 *    new_level    - interrupt level for this context area
57 *    entry_point  - the starting execution point for this this context
58 *    is_fp        - TRUE if this context is associated with an FP thread
59 *
60 *  Output parameters: NONE
61 */
62
63void _CPU_Context_Initialize(
64  Context_Control  *the_context,
65  uint32_t         *stack_base,
66  uint32_t          size,
67  uint32_t          new_level,
68  void             *entry_point,
69  bool              is_fp
70)
71{
72        uint16_t _stack; //declare helper variable
73        _stack = (uint16_t) (stack_base) + (uint16_t) (size); //calc stack pointer
74        the_context->stack_pointer = _stack - 2; //save stack pointer (- 2 bytes)
75        _CPU_Push(_stack, (uint16_t)(entry_point)); //push entry point onto context stack
76        the_context->status = 0; //init status to zero
77        if (new_level == TRUE)  _CPU_ISR_Enable( 0 );
78#if 0
79        printk("");
80        printk("the_context = 0x%x\n", the_context);
81        printk("sp = 0x%x\n\n",_stack);
82#endif
83}
84
85
86/*PAGE
87 *
88 *  _CPU_ISR_Get_level
89 *
90 *  NO_CPU Specific Information:
91 *
92 *  XXX document implementation including references if appropriate
93 */
94 
95uint32_t   _CPU_ISR_Get_level( void )
96{
97  /*
98   *  This routine returns the current interrupt level.
99   */
100
101  return 0;
102}
103
104/*PAGE
105 *
106 *  _CPU_ISR_install_raw_handler
107 *
108 *  NO_CPU Specific Information:
109 *
110 *  XXX document implementation including references if appropriate
111 */
112 
113void _CPU_ISR_install_raw_handler(
114  uint32_t    vector,
115  proc_ptr    new_handler,
116  proc_ptr   *old_handler
117)
118{
119  /*
120   *  This is where we install the interrupt handler into the "raw" interrupt
121   *  table used by the CPU to dispatch interrupt handlers.
122   */
123}
124
125/*PAGE
126 *
127 *  _CPU_ISR_install_vector
128 *
129 *  This kernel routine installs the RTEMS handler for the
130 *  specified vector.
131 *
132 *  Input parameters:
133 *    vector      - interrupt vector number
134 *    old_handler - former ISR for this vector number
135 *    new_handler - replacement ISR for this vector number
136 *
137 *  Output parameters:  NONE
138 *
139 *
140 *  NO_CPU Specific Information:
141 *
142 *  XXX document implementation including references if appropriate
143 */
144
145void _CPU_ISR_install_vector(
146  uint32_t    vector,
147  proc_ptr    new_handler,
148  proc_ptr   *old_handler
149)
150{
151   *old_handler = _ISR_Vector_table[ vector ];
152
153   /*
154    *  If the interrupt vector table is a table of pointer to isr entry
155    *  points, then we need to install the appropriate RTEMS interrupt
156    *  handler for this vector number.
157    */
158
159   _CPU_ISR_install_raw_handler( vector, new_handler, old_handler );
160
161   /*
162    *  We put the actual user ISR address in '_ISR_vector_table'.  This will
163    *  be used by the _ISR_Handler so the user gets control.
164    */ 
165
166    _ISR_Vector_table[ vector ] = new_handler;
167}
168
169/*PAGE
170 *
171 *  _CPU_Install_interrupt_stack
172 *
173 *  NO_CPU Specific Information:
174 *
175 *  XXX document implementation including references if appropriate
176 */
177
178void _CPU_Install_interrupt_stack( void )
179{
180}
181
182/*PAGE
183 *
184 *  _CPU_Thread_Idle_body
185 *
186 *  NOTES:
187 *
188 *  1. This is the same as the regular CPU independent algorithm.
189 *
190 *  2. If you implement this using a "halt", "idle", or "shutdown"
191 *     instruction, then don't forget to put it in an infinite loop.
192 *
193 *  3. Be warned. Some processors with onboard DMA have been known
194 *     to stop the DMA if the CPU were put in IDLE mode.  This might
195 *     also be a problem with other on-chip peripherals.  So use this
196 *     hook with caution.
197 *
198 *  NO_CPU Specific Information:
199 *
200 *  XXX document implementation including references if appropriate
201 */
202
203void *_CPU_Thread_Idle_body( uintptr_t ignored )
204{
205
206  for( ; ; ) asm volatile ("sleep"::);
207    /* insert your "halt" instruction here */ ;
208  return (void *) 0;
209}
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