source: rtems/cpukit/score/cpu/avr/cpu.c @ 60f016f

4.104.114.84.95
Last change on this file since 60f016f was 60f016f, checked in by Joel Sherrill <joel.sherrill@…>, on May 22, 2007 at 8:57:34 PM

2007-05-22 Joel Sherrill <joel.sherrill@…>

  • score/cpu/arm/cpu.c, score/cpu/avr/cpu.c, score/cpu/bfin/cpu.c, score/cpu/c4x/cpu.c, score/cpu/h8300/cpu.c, score/cpu/i386/cpu.c, score/cpu/m68k/cpu.c, score/cpu/mips/cpu.c, score/cpu/nios2/cpu.c, score/cpu/no_cpu/cpu.c, score/cpu/sh/cpu.c, score/cpu/sparc/cpu.c, cpukit/sapi/src/exinit.c: Move copying of CPU Table to shared executive initialization.
  • Property mode set to 100644
File size: 4.2 KB
Line 
1/*
2 *  XXX CPU Dependent Source
3 *
4 *
5 *  COPYRIGHT (c) 1989-1999.
6 *  On-Line Applications Research Corporation (OAR).
7 *
8 *  The license and distribution terms for this file may be
9 *  found in the file LICENSE in this distribution or at
10 *  http://www.rtems.com/license/LICENSE.
11 *
12 *  $Id$
13 */
14
15#include <rtems/system.h>
16#include <rtems/score/isr.h>
17#include <rtems/score/wkspace.h>
18
19/*  _CPU_Initialize
20 *
21 *  This routine performs processor dependent initialization.
22 *
23 *  INPUT PARAMETERS:
24 *    cpu_table       - CPU table to initialize
25 *    thread_dispatch - address of disptaching routine
26 *
27 *  NO_CPU Specific Information:
28 *
29 *  XXX document implementation including references if appropriate
30 */
31
32
33void _CPU_Initialize(
34  rtems_cpu_table  *cpu_table,
35  void      (*thread_dispatch)      /* ignored on this CPU */
36)
37{
38  /*
39   *  The thread_dispatch argument is the address of the entry point
40   *  for the routine called at the end of an ISR once it has been
41   *  decided a context switch is necessary.  On some compilation
42   *  systems it is difficult to call a high-level language routine
43   *  from assembly.  This allows us to trick these systems.
44   *
45   *  If you encounter this problem save the entry point in a CPU
46   *  dependent variable.
47   */
48
49  _CPU_Thread_dispatch_pointer = thread_dispatch;
50
51  /*
52   *  If there is not an easy way to initialize the FP context
53   *  during Context_Initialize, then it is usually easier to
54   *  save an "uninitialized" FP context here and copy it to
55   *  the task's during Context_Initialize.
56   */
57
58  /* FP context initialization support goes here */
59}
60
61/*PAGE
62 *
63 *  _CPU_ISR_Get_level
64 *
65 *  NO_CPU Specific Information:
66 *
67 *  XXX document implementation including references if appropriate
68 */
69 
70uint32_t   _CPU_ISR_Get_level( void )
71{
72  /*
73   *  This routine returns the current interrupt level.
74   */
75
76  return 0;
77}
78
79/*PAGE
80 *
81 *  _CPU_ISR_install_raw_handler
82 *
83 *  NO_CPU Specific Information:
84 *
85 *  XXX document implementation including references if appropriate
86 */
87 
88void _CPU_ISR_install_raw_handler(
89  uint32_t    vector,
90  proc_ptr    new_handler,
91  proc_ptr   *old_handler
92)
93{
94  /*
95   *  This is where we install the interrupt handler into the "raw" interrupt
96   *  table used by the CPU to dispatch interrupt handlers.
97   */
98}
99
100/*PAGE
101 *
102 *  _CPU_ISR_install_vector
103 *
104 *  This kernel routine installs the RTEMS handler for the
105 *  specified vector.
106 *
107 *  Input parameters:
108 *    vector      - interrupt vector number
109 *    old_handler - former ISR for this vector number
110 *    new_handler - replacement ISR for this vector number
111 *
112 *  Output parameters:  NONE
113 *
114 *
115 *  NO_CPU Specific Information:
116 *
117 *  XXX document implementation including references if appropriate
118 */
119
120void _CPU_ISR_install_vector(
121  uint32_t    vector,
122  proc_ptr    new_handler,
123  proc_ptr   *old_handler
124)
125{
126   *old_handler = _ISR_Vector_table[ vector ];
127
128   /*
129    *  If the interrupt vector table is a table of pointer to isr entry
130    *  points, then we need to install the appropriate RTEMS interrupt
131    *  handler for this vector number.
132    */
133
134   _CPU_ISR_install_raw_handler( vector, new_handler, old_handler );
135
136   /*
137    *  We put the actual user ISR address in '_ISR_vector_table'.  This will
138    *  be used by the _ISR_Handler so the user gets control.
139    */
140
141    _ISR_Vector_table[ vector ] = new_handler;
142}
143
144/*PAGE
145 *
146 *  _CPU_Install_interrupt_stack
147 *
148 *  NO_CPU Specific Information:
149 *
150 *  XXX document implementation including references if appropriate
151 */
152
153void _CPU_Install_interrupt_stack( void )
154{
155}
156
157/*PAGE
158 *
159 *  _CPU_Thread_Idle_body
160 *
161 *  NOTES:
162 *
163 *  1. This is the same as the regular CPU independent algorithm.
164 *
165 *  2. If you implement this using a "halt", "idle", or "shutdown"
166 *     instruction, then don't forget to put it in an infinite loop.
167 *
168 *  3. Be warned. Some processors with onboard DMA have been known
169 *     to stop the DMA if the CPU were put in IDLE mode.  This might
170 *     also be a problem with other on-chip peripherals.  So use this
171 *     hook with caution.
172 *
173 *  NO_CPU Specific Information:
174 *
175 *  XXX document implementation including references if appropriate
176 */
177
178void _CPU_Thread_Idle_body( void )
179{
180
181  for( ; ; )
182    /* insert your "halt" instruction here */ ;
183}
Note: See TracBrowser for help on using the repository browser.