[be4a4d2] | 1 | /* |
---|
[78aa060] | 2 | * AVR CPU Dependent Source |
---|
[be4a4d2] | 3 | * |
---|
| 4 | * |
---|
[78aa060] | 5 | * COPYRIGHT (c) 1989-2008. |
---|
[be4a4d2] | 6 | * On-Line Applications Research Corporation (OAR). |
---|
| 7 | * |
---|
| 8 | * The license and distribution terms for this file may be |
---|
| 9 | * found in the file LICENSE in this distribution or at |
---|
| 10 | * http://www.rtems.com/license/LICENSE. |
---|
| 11 | * |
---|
| 12 | * $Id$ |
---|
| 13 | */ |
---|
| 14 | |
---|
[febaa8a] | 15 | #ifdef HAVE_CONFIG_H |
---|
| 16 | #include "config.h" |
---|
| 17 | #endif |
---|
| 18 | |
---|
[be4a4d2] | 19 | #include <rtems/system.h> |
---|
| 20 | #include <rtems/score/isr.h> |
---|
| 21 | #include <rtems/score/wkspace.h> |
---|
| 22 | |
---|
[78aa060] | 23 | #include <rtems/bspIo.h> /* XXX remove me later */ |
---|
| 24 | |
---|
[be4a4d2] | 25 | /* _CPU_Initialize |
---|
| 26 | * |
---|
| 27 | * This routine performs processor dependent initialization. |
---|
| 28 | * |
---|
[c03e2bc] | 29 | * INPUT PARAMETERS: NONE |
---|
[be4a4d2] | 30 | * |
---|
| 31 | * NO_CPU Specific Information: |
---|
| 32 | * |
---|
| 33 | * XXX document implementation including references if appropriate |
---|
| 34 | */ |
---|
[c03e2bc] | 35 | void _CPU_Initialize(void) |
---|
[be4a4d2] | 36 | { |
---|
[05c1886] | 37 | |
---|
[be4a4d2] | 38 | /* |
---|
| 39 | * If there is not an easy way to initialize the FP context |
---|
| 40 | * during Context_Initialize, then it is usually easier to |
---|
| 41 | * save an "uninitialized" FP context here and copy it to |
---|
| 42 | * the task's during Context_Initialize. |
---|
| 43 | */ |
---|
| 44 | |
---|
| 45 | /* FP context initialization support goes here */ |
---|
| 46 | } |
---|
| 47 | |
---|
| 48 | /*PAGE |
---|
| 49 | * |
---|
| 50 | * _CPU_ISR_Get_level |
---|
| 51 | * |
---|
| 52 | * NO_CPU Specific Information: |
---|
| 53 | * |
---|
| 54 | * XXX document implementation including references if appropriate |
---|
| 55 | */ |
---|
[05c1886] | 56 | |
---|
[be4a4d2] | 57 | uint32_t _CPU_ISR_Get_level( void ) |
---|
| 58 | { |
---|
| 59 | /* |
---|
| 60 | * This routine returns the current interrupt level. |
---|
| 61 | */ |
---|
[cdfe85a7] | 62 | if((SREG & 0x80))return 1; |
---|
| 63 | else return 0; |
---|
[be4a4d2] | 64 | |
---|
| 65 | } |
---|
| 66 | |
---|
| 67 | /*PAGE |
---|
| 68 | * |
---|
| 69 | * _CPU_ISR_install_raw_handler |
---|
| 70 | * |
---|
| 71 | * NO_CPU Specific Information: |
---|
| 72 | * |
---|
| 73 | * XXX document implementation including references if appropriate |
---|
| 74 | */ |
---|
[05c1886] | 75 | |
---|
[be4a4d2] | 76 | void _CPU_ISR_install_raw_handler( |
---|
| 77 | uint32_t vector, |
---|
| 78 | proc_ptr new_handler, |
---|
| 79 | proc_ptr *old_handler |
---|
| 80 | ) |
---|
| 81 | { |
---|
| 82 | /* |
---|
| 83 | * This is where we install the interrupt handler into the "raw" interrupt |
---|
| 84 | * table used by the CPU to dispatch interrupt handlers. |
---|
| 85 | */ |
---|
| 86 | } |
---|
| 87 | |
---|
| 88 | /*PAGE |
---|
| 89 | * |
---|
| 90 | * _CPU_ISR_install_vector |
---|
| 91 | * |
---|
| 92 | * This kernel routine installs the RTEMS handler for the |
---|
| 93 | * specified vector. |
---|
| 94 | * |
---|
| 95 | * Input parameters: |
---|
| 96 | * vector - interrupt vector number |
---|
| 97 | * old_handler - former ISR for this vector number |
---|
| 98 | * new_handler - replacement ISR for this vector number |
---|
| 99 | * |
---|
| 100 | * Output parameters: NONE |
---|
| 101 | * |
---|
| 102 | * |
---|
| 103 | * NO_CPU Specific Information: |
---|
| 104 | * |
---|
| 105 | * XXX document implementation including references if appropriate |
---|
| 106 | */ |
---|
| 107 | |
---|
| 108 | void _CPU_ISR_install_vector( |
---|
| 109 | uint32_t vector, |
---|
| 110 | proc_ptr new_handler, |
---|
| 111 | proc_ptr *old_handler |
---|
| 112 | ) |
---|
| 113 | { |
---|
| 114 | *old_handler = _ISR_Vector_table[ vector ]; |
---|
| 115 | |
---|
| 116 | /* |
---|
| 117 | * If the interrupt vector table is a table of pointer to isr entry |
---|
| 118 | * points, then we need to install the appropriate RTEMS interrupt |
---|
| 119 | * handler for this vector number. |
---|
| 120 | */ |
---|
| 121 | |
---|
| 122 | _CPU_ISR_install_raw_handler( vector, new_handler, old_handler ); |
---|
| 123 | |
---|
| 124 | /* |
---|
| 125 | * We put the actual user ISR address in '_ISR_vector_table'. This will |
---|
| 126 | * be used by the _ISR_Handler so the user gets control. |
---|
[7c46cf5] | 127 | */ |
---|
[be4a4d2] | 128 | |
---|
| 129 | _ISR_Vector_table[ vector ] = new_handler; |
---|
| 130 | } |
---|
| 131 | |
---|
| 132 | /*PAGE |
---|
| 133 | * |
---|
| 134 | * _CPU_Install_interrupt_stack |
---|
| 135 | * |
---|
| 136 | * NO_CPU Specific Information: |
---|
| 137 | * |
---|
| 138 | * XXX document implementation including references if appropriate |
---|
| 139 | */ |
---|
| 140 | |
---|
| 141 | void _CPU_Install_interrupt_stack( void ) |
---|
| 142 | { |
---|
| 143 | } |
---|
| 144 | |
---|
| 145 | /*PAGE |
---|
| 146 | * |
---|
| 147 | * _CPU_Thread_Idle_body |
---|
| 148 | * |
---|
| 149 | * NOTES: |
---|
| 150 | * |
---|
| 151 | * 1. This is the same as the regular CPU independent algorithm. |
---|
| 152 | * |
---|
| 153 | * 2. If you implement this using a "halt", "idle", or "shutdown" |
---|
| 154 | * instruction, then don't forget to put it in an infinite loop. |
---|
| 155 | * |
---|
| 156 | * 3. Be warned. Some processors with onboard DMA have been known |
---|
| 157 | * to stop the DMA if the CPU were put in IDLE mode. This might |
---|
| 158 | * also be a problem with other on-chip peripherals. So use this |
---|
| 159 | * hook with caution. |
---|
| 160 | * |
---|
| 161 | * NO_CPU Specific Information: |
---|
| 162 | * |
---|
| 163 | * XXX document implementation including references if appropriate |
---|
| 164 | */ |
---|
| 165 | |
---|
[cca8379] | 166 | void *_CPU_Thread_Idle_body( uintptr_t ignored ) |
---|
[be4a4d2] | 167 | { |
---|
| 168 | |
---|
[7c46cf5] | 169 | for( ; ; ) asm volatile ("sleep"::); |
---|
[be4a4d2] | 170 | /* insert your "halt" instruction here */ ; |
---|
[78aa060] | 171 | return (void *) 0; |
---|
[be4a4d2] | 172 | } |
---|