source: rtems/cpukit/score/cpu/avr/avr/power.h @ b10825c

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Last change on this file since b10825c was b10825c, checked in by Joel Sherrill <joel.sherrill@…>, on 01/10/13 at 19:29:41

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1/**
2 * @file avr/iom644PA.h
3 *
4 * @brief Power Reduction Management
5 *
6 * Many AVRs contain a Power Reduction Register (PRR) or Registers (PRRx) that
7 * allow you to reduce power consumption by disabling or enabling various on-board
8 * peripherals as needed.
9 *
10 * There are many macros in this header file that provide an easy interface
11 * to enable or disable on-board peripherals to reduce power. See the table below.
12 *
13 * @note Not all AVR devices have a Power Reduction Register (for example
14 * the ATmega128). On those devices without a Power Reduction Register, these
15 * macros are not available.
16 *
17 * @note Not all AVR devices contain the same peripherals (for example, the LCD
18 * interface), or they will be named differently (for example, USART and
19 * USART0). Please consult your device's datasheet, or the header file, to
20 * find out which macros are applicable to your device.
21 */
22
23/*
24 *  Copyright (c) 2006, 2007, 2008  Eric B. Weddington
25 *  All rights reserved.
26 *
27 *  Redistribution and use in source and binary forms, with or without
28 *  modification, are permitted provided that the following conditions are met:
29 *
30 * * Redistributions of source code must retain the above copyright
31 *   notice, this list of conditions and the following disclaimer.
32 *
33 * * Redistributions in binary form must reproduce the above copyright
34 *   notice, this list of conditions and the following disclaimer in
35 *   the documentation and/or other materials provided with the
36 *   distribution.
37 *
38 * * Neither the name of the copyright holders nor the names of
39 *   contributors may be used to endorse or promote products derived
40 *   from this software without specific prior written permission.
41 *
42 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
43 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
44 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
45 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
46 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
47 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
48 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
49 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
50 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
51 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
52 * POSSIBILITY OF SUCH DAMAGE.
53 */
54
55
56#ifndef _AVR_POWER_H_
57#define _AVR_POWER_H_   1
58
59#include <avr/io.h>
60#include <stdint.h>
61
62/**
63 *  @defgroup avr_power Power Reduction Management
64 *
65 *  @ingroup avr
66 *
67 *  @addtogroup avr_power
68 */
69/**@{*/
70
71
72#if defined(__AVR_ATxmega16A4__) \
73|| defined(__AVR_ATxmega16D4__) \
74|| defined(__AVR_ATxmega32A4__) \
75|| defined(__AVR_ATxmega32D4__) \
76|| defined(__AVR_ATxmega64A1__) \
77|| defined(__AVR_ATxmega64A3__) \
78|| defined(__AVR_ATxmega64D3__) \
79|| defined(__AVR_ATxmega128A1__) \
80|| defined(__AVR_ATxmega128A3__) \
81|| defined(__AVR_ATxmega128D3__) \
82|| defined(__AVR_ATxmega192A3__) \
83|| defined(__AVR_ATxmega192D3__) \
84|| defined(__AVR_ATxmega256D3__) \
85|| defined(__AVR_ATxmega256A3__) \
86|| defined(__AVR_ATxmega256A3B__)
87
88/*
89#define power_aes_enable()  (PR_PR &= (uint8_t)~(PR_AES_bm))
90#define power_aes_disable() (PR_PR |= (uint8_t)PR_AES_bm)
91*/
92
93#define power_ebi_enable()  (PR_PR &= (uint8_t)~(PR_EBI_bm))
94#define power_ebi_disable() (PR_PR |= (uint8_t)PR_EBI_bm)
95
96#define power_rtc_enable()  (PR_PR &= (uint8_t)~(PR_RTC_bm))
97#define power_rtc_disable() (PR_PR |= (uint8_t)PR_RTC_bm)
98
99#define power_evsys_enable()    (PR_PR &= (uint8_t)~(PR_EVSYS_bm))
100#define power_evsys_disable()   (PR_PR |= (uint8_t)PR_EVSYS_bm)
101
102#define power_dma_enable()    (PR_PR &= (uint8_t)~(PR_DMA_bm))
103#define power_dma_disable()   (PR_PR |= (uint8_t)PR_DMA_bm)
104
105#define power_daca_enable()     (PR_PRPA &= (uint8_t)~(PR_DAC_bm))
106#define power_daca_disable()    (PR_PRPA |= (uint8_t)PR_DAC_bm)
107#define power_dacb_enable()     (PR_PRPB &= (uint8_t)~(PR_DAC_bm))
108#define power_dacb_disable()    (PR_PRPB |= (uint8_t)PR_DAC_bm)
109
110#define power_adca_enable()     (PR_PRPA &= (uint8_t)~(PR_ADC_bm))
111#define power_adca_disable()    (PR_PRPA |= (uint8_t)PR_ADC_bm)
112#define power_adcb_enable()     (PR_PRPB &= (uint8_t)~(PR_ADC_bm))
113#define power_adcb_disable()    (PR_PRPB |= (uint8_t)PR_ADC_bm)
114
115#define power_aca_enable()      (PR_PRPA &= (uint8_t)~(PR_AC_bm))
116#define power_aca_disable()     (PR_PRPA |= (uint8_t)PR_AC_bm)
117#define power_acb_enable()      (PR_PRPB &= (uint8_t)~(PR_AC_bm))
118#define power_acb_disable()     (PR_PRPB |= (uint8_t)PR_AC_bm)
119
120#define power_twic_enable()     (PR_PRPC &= (uint8_t)~(PR_TWI_bm))
121#define power_twic_disable()    (PR_PRPC |= (uint8_t)PR_TWI_bm)
122#define power_twid_enable()     (PR_PRPD &= (uint8_t)~(PR_TWI_bm))
123#define power_twid_disable()    (PR_PRPD |= (uint8_t)PR_TWI_bm)
124#define power_twie_enable()     (PR_PRPE &= (uint8_t)~(PR_TWI_bm))
125#define power_twie_disable()    (PR_PRPE |= (uint8_t)PR_TWI_bm)
126#define power_twif_enable()     (PR_PRPF &= (uint8_t)~(PR_TWI_bm))
127#define power_twif_disable()    (PR_PRPF |= (uint8_t)PR_TWI_bm)
128
129#define power_usartc1_enable()  (PR_PRPC &= (uint8_t)~(PR_USART1_bm))
130#define power_usartc1_disable() (PR_PRPC |= (uint8_t)PR_USART1_bm)
131#define power_usartd1_enable()  (PR_PRPD &= (uint8_t)~(PR_USART1_bm))
132#define power_usartd1_disable() (PR_PRPD |= (uint8_t)PR_USART1_bm)
133#define power_usarte1_enable()  (PR_PRPE &= (uint8_t)~(PR_USART1_bm))
134#define power_usarte1_disable() (PR_PRPE |= (uint8_t)PR_USART1_bm)
135#define power_usartf1_enable()  (PR_PRPF &= (uint8_t)~(PR_USART1_bm))
136#define power_usartf1_disable() (PR_PRPF |= (uint8_t)PR_USART1_bm)
137
138#define power_usartc0_enable()  (PR_PRPC &= (uint8_t)~(PR_USART0_bm))
139#define power_usartc0_disable() (PR_PRPC |= (uint8_t)PR_USART0_bm)
140#define power_usartd0_enable()  (PR_PRPD &= (uint8_t)~(PR_USART0_bm))
141#define power_usartd0_disable() (PR_PRPD |= (uint8_t)PR_USART0_bm)
142#define power_usarte0_enable()  (PR_PRPE &= (uint8_t)~(PR_USART0_bm))
143#define power_usarte0_disable() (PR_PRPE |= (uint8_t)PR_USART0_bm)
144#define power_usartf0_enable()  (PR_PRPF &= (uint8_t)~(PR_USART0_bm))
145#define power_usartf0_disable() (PR_PRPF |= (uint8_t)PR_USART0_bm)
146
147#define power_spic_enable()     (PR_PRPC &= (uint8_t)~(PR_SPI_bm))
148#define power_spic_disable()    (PR_PRPC |= (uint8_t)PR_SPI_bm)
149#define power_spid_enable()     (PR_PRPD &= (uint8_t)~(PR_SPI_bm))
150#define power_spid_disable()    (PR_PRPD |= (uint8_t)PR_SPI_bm)
151#define power_spie_enable()     (PR_PRPE &= (uint8_t)~(PR_SPI_bm))
152#define power_spie_disable()    (PR_PRPE |= (uint8_t)PR_SPI_bm)
153#define power_spif_enable()     (PR_PRPF &= (uint8_t)~(PR_SPI_bm))
154#define power_spif_disable()    (PR_PRPF |= (uint8_t)PR_SPI_bm)
155
156#define power_hiresc_enable()   (PR_PRPC &= (uint8_t)~(PR_HIRES_bm))
157#define power_hiresc_disable()  (PR_PRPC |= (uint8_t)PR_HIRES_bm)
158#define power_hiresd_enable()   (PR_PRPD &= (uint8_t)~(PR_HIRES_bm))
159#define power_hiresd_disable()  (PR_PRPD |= (uint8_t)PR_HIRES_bm)
160#define power_hirese_enable()   (PR_PRPE &= (uint8_t)~(PR_HIRES_bm))
161#define power_hirese_disable()  (PR_PRPE |= (uint8_t)PR_HIRES_bm)
162#define power_hiresf_enable()   (PR_PRPF &= (uint8_t)~(PR_HIRES_bm))
163#define power_hiresf_disable()  (PR_PRPF |= (uint8_t)PR_HIRES_bm)
164
165#define power_tc1c_enable()     (PR_PRPC &= (uint8_t)~(PR_TC1_bm))
166#define power_tc1c_disable()    (PR_PRPC |= (uint8_t)PR_TC1_bm)
167#define power_tc1d_enable()     (PR_PRPD &= (uint8_t)~(PR_TC1_bm))
168#define power_tc1d_disable()    (PR_PRPD |= (uint8_t)PR_TC1_bm)
169#define power_tc1e_enable()     (PR_PRPE &= (uint8_t)~(PR_TC1_bm))
170#define power_tc1e_disable()    (PR_PRPE |= (uint8_t)PR_TC1_bm)
171#define power_tc1f_enable()     (PR_PRPF &= (uint8_t)~(PR_TC1_bm))
172#define power_tc1f_disable()    (PR_PRPF |= (uint8_t)PR_TC1_bm)
173
174#define power_tc0c_enable()     (PR_PRPC &= (uint8_t)~(PR_TC0_bm))
175#define power_tc0c_disable()    (PR_PRPC |= (uint8_t)PR_TC0_bm)
176#define power_tc0d_enable()     (PR_PRPD &= (uint8_t)~(PR_TC0_bm))
177#define power_tc0d_disable()    (PR_PRPD |= (uint8_t)PR_TC0_bm)
178#define power_tc0e_enable()     (PR_PRPE &= (uint8_t)~(PR_TC0_bm))
179#define power_tc0e_disable()    (PR_PRPE |= (uint8_t)PR_TC0_bm)
180#define power_tc0f_enable()     (PR_PRPF &= (uint8_t)~(PR_TC0_bm))
181#define power_tc0f_disable()    (PR_PRPF |= (uint8_t)PR_TC0_bm)
182
183#define power_all_enable() \
184do { \
185    /* PR_PR &= (uint8_t)~(PR_AES_bm|PR_EBI_bm|PR_RTC_bm|PR_EVSYS_bm|PR_DMA_bm); */ \
186    PR_PR &= (uint8_t)~(PR_EBI_bm|PR_RTC_bm|PR_EVSYS_bm|PR_DMA_bm); \
187    PR_PRPA &= (uint8_t)~(PR_DAC_bm|PR_ADC_bm|PR_AC_bm); \
188    PR_PRPB &= (uint8_t)~(PR_DAC_bm|PR_ADC_bm|PR_AC_bm); \
189    PR_PRPC &= (uint8_t)~(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
190    PR_PRPD &= (uint8_t)~(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
191    PR_PRPE &= (uint8_t)~(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
192    PR_PRPF &= (uint8_t)~(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
193} while(0)
194
195
196#define power_all_disable() \
197do { \
198    /* PM_PR_PR |= (uint8_t)(PR_AES_bm|PR_EBI_bm|PR_RTC_bm|PR_EVSYS_bm|PR_DMA_bm); */ \
199    PR_PR |= (uint8_t)(PR_EBI_bm|PR_RTC_bm|PR_EVSYS_bm|PR_DMA_bm); \
200    PR_PRPA |= (uint8_t)(PR_DAC_bm|PR_ADC_bm|PR_AC_bm); \
201    PR_PRPB |= (uint8_t)(PR_DAC_bm|PR_ADC_bm|PR_AC_bm); \
202    PR_PRPC |= (uint8_t)(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
203    PR_PRPD |= (uint8_t)(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
204    PR_PRPE |= (uint8_t)(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
205    PR_PRPF |= (uint8_t)(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
206} while(0)
207
208
209#elif defined(__AVR_ATmega640__) \
210|| defined(__AVR_ATmega1280__) \
211|| defined(__AVR_ATmega1281__) \
212|| defined(__AVR_ATmega2560__) \
213|| defined(__AVR_ATmega2561__)
214
215#define power_adc_enable()      (PRR0 &= (uint8_t)~(1 << PRADC))
216#define power_adc_disable()     (PRR0 |= (uint8_t)(1 << PRADC))
217
218#define power_spi_enable()      (PRR0 &= (uint8_t)~(1 << PRSPI))
219#define power_spi_disable()     (PRR0 |= (uint8_t)(1 << PRSPI))
220
221#define power_twi_enable()      (PRR0 &= (uint8_t)~(1 << PRTWI))
222#define power_twi_disable()     (PRR0 |= (uint8_t)(1 << PRTWI))
223
224#define power_timer0_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM0))
225#define power_timer0_disable()  (PRR0 |= (uint8_t)(1 << PRTIM0))
226
227#define power_timer1_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM1))
228#define power_timer1_disable()  (PRR0 |= (uint8_t)(1 << PRTIM1))
229
230#define power_timer2_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM2))
231#define power_timer2_disable()  (PRR0 |= (uint8_t)(1 << PRTIM2))
232
233#define power_timer3_enable()   (PRR1 &= (uint8_t)~(1 << PRTIM3))
234#define power_timer3_disable()  (PRR1 |= (uint8_t)(1 << PRTIM3))
235
236#define power_timer4_enable()   (PRR1 &= (uint8_t)~(1 << PRTIM4))
237#define power_timer4_disable()  (PRR1 |= (uint8_t)(1 << PRTIM4))
238
239#define power_timer5_enable()   (PRR1 &= (uint8_t)~(1 << PRTIM5))
240#define power_timer5_disable()  (PRR1 |= (uint8_t)(1 << PRTIM5))
241
242#define power_usart0_enable()   (PRR0 &= (uint8_t)~(1 << PRUSART0))
243#define power_usart0_disable()  (PRR0 |= (uint8_t)(1 << PRUSART0))
244
245#define power_usart1_enable()   (PRR1 &= (uint8_t)~(1 << PRUSART1))
246#define power_usart1_disable()  (PRR1 |= (uint8_t)(1 << PRUSART1))
247
248#define power_usart2_enable()   (PRR1 &= (uint8_t)~(1 << PRUSART2))
249#define power_usart2_disable()  (PRR1 |= (uint8_t)(1 << PRUSART2))
250
251#define power_usart3_enable()   (PRR1 &= (uint8_t)~(1 << PRUSART3))
252#define power_usart3_disable()  (PRR1 |= (uint8_t)(1 << PRUSART3))
253
254#define power_all_enable() \
255do{ \
256    PRR0 &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRUSART0)); \
257    PRR1 &= (uint8_t)~((1<<PRTIM3)|(1<<PRTIM4)|(1<<PRTIM5)|(1<<PRTIM5)|(1<<PRUSART1)|(1<<PRUSART2)|(1<<PRUSART3)); \
258}while(0)
259
260#define power_all_disable() \
261do{ \
262    PRR0 |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRUSART0)); \
263    PRR1 |= (uint8_t)((1<<PRTIM3)|(1<<PRTIM4)|(1<<PRTIM5)|(1<<PRTIM5)|(1<<PRUSART1)|(1<<PRUSART2)|(1<<PRUSART3)); \
264}while(0)
265
266
267#elif defined(__AVR_ATmega128RFA1__)
268
269#define power_adc_enable()      (PRR0 &= (uint8_t)~(1 << PRADC))
270#define power_adc_disable()     (PRR0 |= (uint8_t)(1 << PRADC))
271
272#define power_spi_enable()      (PRR0 &= (uint8_t)~(1 << PRSPI))
273#define power_spi_disable()     (PRR0 |= (uint8_t)(1 << PRSPI))
274
275#define power_twi_enable()      (PRR0 &= (uint8_t)~(1 << PRTWI))
276#define power_twi_disable()     (PRR0 |= (uint8_t)(1 << PRTWI))
277
278#define power_timer0_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM0))
279#define power_timer0_disable()  (PRR0 |= (uint8_t)(1 << PRTIM0))
280
281#define power_timer1_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM1))
282#define power_timer1_disable()  (PRR0 |= (uint8_t)(1 << PRTIM1))
283
284#define power_timer2_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM2))
285#define power_timer2_disable()  (PRR0 |= (uint8_t)(1 << PRTIM2))
286
287#define power_timer3_enable()   (PRR1 &= (uint8_t)~(1 << PRTIM3))
288#define power_timer3_disable()  (PRR1 |= (uint8_t)(1 << PRTIM3))
289
290#define power_timer4_enable()   (PRR1 &= (uint8_t)~(1 << PRTIM4))
291#define power_timer4_disable()  (PRR1 |= (uint8_t)(1 << PRTIM4))
292
293#define power_timer5_enable()   (PRR1 &= (uint8_t)~(1 << PRTIM5))
294#define power_timer5_disable()  (PRR1 |= (uint8_t)(1 << PRTIM5))
295
296#define power_usart0_enable()   (PRR0 &= (uint8_t)~(1 << PRUSART0))
297#define power_usart0_disable()  (PRR0 |= (uint8_t)(1 << PRUSART0))
298
299#define power_usart1_enable()   (PRR1 &= (uint8_t)~(1 << PRUSART1))
300#define power_usart1_disable()  (PRR1 |= (uint8_t)(1 << PRUSART1))
301
302#define power_all_enable() \
303do{ \
304    PRR0 &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRUSART0)); \
305    PRR1 &= (uint8_t)~((1<<PRTIM3)|(1<<PRTIM4)|(1<<PRTIM5)|(1<<PRTIM5)|(1<<PRUSART1)); \
306}while(0)
307
308#define power_all_disable() \
309do{ \
310    PRR0 |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRUSART0)); \
311    PRR1 |= (uint8_t)((1<<PRTIM3)|(1<<PRTIM4)|(1<<PRTIM5)|(1<<PRTIM5)|(1<<PRUSART1)); \
312}while(0)
313
314
315#elif defined(__AVR_AT90USB646__) \
316|| defined(__AVR_AT90USB647__) \
317|| defined(__AVR_AT90USB1286__) \
318|| defined(__AVR_AT90USB1287__)
319
320#define power_adc_enable()      (PRR0 &= (uint8_t)~(1 << PRADC))
321#define power_adc_disable()     (PRR0 |= (uint8_t)(1 << PRADC))
322
323#define power_spi_enable()      (PRR0 &= (uint8_t)~(1 << PRSPI))
324#define power_spi_disable()     (PRR0 |= (uint8_t)(1 << PRSPI))
325
326#define power_twi_enable()      (PRR0 &= (uint8_t)~(1 << PRTWI))
327#define power_twi_disable()     (PRR0 |= (uint8_t)(1 << PRTWI))
328
329#define power_timer0_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM0))
330#define power_timer0_disable()  (PRR0 |= (uint8_t)(1 << PRTIM0))
331
332#define power_timer1_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM1))
333#define power_timer1_disable()  (PRR0 |= (uint8_t)(1 << PRTIM1))
334
335#define power_timer2_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM2))
336#define power_timer2_disable()  (PRR0 |= (uint8_t)(1 << PRTIM2))
337
338#define power_timer3_enable()   (PRR1 &= (uint8_t)~(1 << PRTIM3))
339#define power_timer3_disable()  (PRR1 |= (uint8_t)(1 << PRTIM3))
340
341#define power_usart1_enable()   (PRR1 &= (uint8_t)~(1 << PRUSART1))
342#define power_usart1_disable()  (PRR1 |= (uint8_t)(1 << PRUSART1))
343
344#define power_usb_enable()      (PRR1 &= (uint8_t)~(1 << PRUSB))
345#define power_usb_disable()     (PRR1 |= (uint8_t)(1 << PRUSB))
346
347#define power_all_enable() \
348do{ \
349    PRR0 &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)); \
350    PRR1 &= (uint8_t)~((1<<PRTIM3)|(1<<PRUSART1)|(1<<PRUSB)); \
351}while(0)
352
353#define power_all_disable() \
354do{ \
355    PRR0 |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)); \
356    PRR1 |= (uint8_t)((1<<PRTIM3)|(1<<PRUSART1)|(1<<PRUSB)); \
357}while(0)
358
359
360#elif defined(__AVR_ATmega32U4__) \
361|| defined(__AVR_ATmega16U4__)
362
363
364#define power_adc_enable()      (PRR0 &= (uint8_t)~(1 << PRADC))
365#define power_adc_disable()     (PRR0 |= (uint8_t)(1 << PRADC))
366
367#define power_usart0_enable()   (PRR0 &= (uint8_t)~(1 << PRUSART0))
368#define power_usart0_disable()  (PRR0 |= (uint8_t)(1 << PRUSART0))
369
370#define power_spi_enable()      (PRR0 &= (uint8_t)~(1 << PRSPI))
371#define power_spi_disable()     (PRR0 |= (uint8_t)(1 << PRSPI))
372
373#define power_twi_enable()      (PRR0 &= (uint8_t)~(1 << PRTWI))
374#define power_twi_disable()     (PRR0 |= (uint8_t)(1 << PRTWI))
375
376#define power_timer0_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM0))
377#define power_timer0_disable()  (PRR0 |= (uint8_t)(1 << PRTIM0))
378
379#define power_timer1_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM1))
380#define power_timer1_disable()  (PRR0 |= (uint8_t)(1 << PRTIM1))
381
382#define power_timer2_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM2))
383#define power_timer2_disable()  (PRR0 |= (uint8_t)(1 << PRTIM2))
384
385#define power_timer3_enable()   (PRR1 &= (uint8_t)~(1 << PRTIM3))
386#define power_timer3_disable()  (PRR1 |= (uint8_t)(1 << PRTIM3))
387
388#define power_usart1_enable()   (PRR1 &= (uint8_t)~(1 << PRUSART1))
389#define power_usart1_disable()  (PRR1 |= (uint8_t)(1 << PRUSART1))
390
391#define power_usb_enable()      (PRR1 &= (uint8_t)~(1 << PRUSB))
392#define power_usb_disable()     (PRR1 |= (uint8_t)(1 << PRUSB))
393
394#define power_all_enable() \
395do{ \
396    PRR0 &= (uint8_t)~((1<<PRADC)|(1<<PRUSART0)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)); \
397    PRR1 &= (uint8_t)~((1<<PRTIM3)|(1<<PRUSART1)|(1<<PRUSB)); \
398}while(0)
399
400#define power_all_disable() \
401do{ \
402    PRR0 |= (uint8_t)((1<<PRADC)|(1<<PRUSART0)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)); \
403    PRR1 |= (uint8_t)((1<<PRTIM3)|(1<<PRUSART1)|(1<<PRUSB)); \
404}while(0)
405
406
407#elif defined(__AVR_ATmega32U6__)
408
409
410#define power_adc_enable()      (PRR0 &= (uint8_t)~(1 << PRADC))
411#define power_adc_disable()     (PRR0 |= (uint8_t)(1 << PRADC))
412
413#define power_spi_enable()      (PRR0 &= (uint8_t)~(1 << PRSPI))
414#define power_spi_disable()     (PRR0 |= (uint8_t)(1 << PRSPI))
415
416#define power_twi_enable()      (PRR0 &= (uint8_t)~(1 << PRTWI))
417#define power_twi_disable()     (PRR0 |= (uint8_t)(1 << PRTWI))
418
419#define power_timer0_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM0))
420#define power_timer0_disable()  (PRR0 |= (uint8_t)(1 << PRTIM0))
421
422#define power_timer1_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM1))
423#define power_timer1_disable()  (PRR0 |= (uint8_t)(1 << PRTIM1))
424
425#define power_timer2_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM2))
426#define power_timer2_disable()  (PRR0 |= (uint8_t)(1 << PRTIM2))
427
428#define power_timer3_enable()   (PRR1 &= (uint8_t)~(1 << PRTIM3))
429#define power_timer3_disable()  (PRR1 |= (uint8_t)(1 << PRTIM3))
430
431#define power_usart1_enable()   (PRR1 &= (uint8_t)~(1 << PRUSART1))
432#define power_usart1_disable()  (PRR1 |= (uint8_t)(1 << PRUSART1))
433
434#define power_usb_enable()      (PRR1 &= (uint8_t)~(1 << PRUSB))
435#define power_usb_disable()     (PRR1 |= (uint8_t)(1 << PRUSB))
436
437#define power_all_enable() \
438do{ \
439    PRR0 &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)); \
440    PRR1 &= (uint8_t)~((1<<PRTIM3)|(1<<PRUSART1)|(1<<PRUSB)); \
441}while(0)
442
443#define power_all_disable() \
444do{ \
445    PRR0 |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)); \
446    PRR1 |= (uint8_t)((1<<PRTIM3)|(1<<PRUSART1)|(1<<PRUSB)); \
447}while(0)
448
449
450#elif defined(__AVR_AT90PWM1__)
451
452#define power_adc_enable()      (PRR &= (uint8_t)~(1 << PRADC))
453#define power_adc_disable()     (PRR |= (uint8_t)(1 << PRADC))
454
455#define power_spi_enable()      (PRR &= (uint8_t)~(1 << PRSPI))
456#define power_spi_disable()     (PRR |= (uint8_t)(1 << PRSPI))
457
458#define power_timer0_enable()   (PRR &= (uint8_t)~(1 << PRTIM0))
459#define power_timer0_disable()  (PRR |= (uint8_t)(1 << PRTIM0))
460
461#define power_timer1_enable()   (PRR &= (uint8_t)~(1 << PRTIM1))
462#define power_timer1_disable()  (PRR |= (uint8_t)(1 << PRTIM1))
463
464/* Power Stage Controller 0 */
465#define power_psc0_enable()     (PRR &= (uint8_t)~(1 << PRPSC0))
466#define power_psc0_disable()    (PRR |= (uint8_t)(1 << PRPSC0))
467
468/* Power Stage Controller 1 */
469#define power_psc1_enable()     (PRR &= (uint8_t)~(1 << PRPSC1))
470#define power_psc1_disable()    (PRR |= (uint8_t)(1 << PRPSC1))
471
472/* Power Stage Controller 2 */
473#define power_psc2_enable()     (PRR &= (uint8_t)~(1 << PRPSC2))
474#define power_psc2_disable()    (PRR |= (uint8_t)(1 << PRPSC2))
475
476#define power_all_enable()      (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRPSC0)|(1<<PRPSC1)|(1<<PRPSC2)))
477#define power_all_disable()     (PRR |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRPSC0)|(1<<PRPSC1)|(1<<PRPSC2)))
478
479
480#elif defined(__AVR_AT90PWM2__) \
481|| defined(__AVR_AT90PWM2B__) \
482|| defined(__AVR_AT90PWM3__) \
483|| defined(__AVR_AT90PWM3B__) \
484|| defined(__AVR_AT90PWM216__) \
485|| defined(__AVR_AT90PWM316__)
486
487#define power_adc_enable()      (PRR &= (uint8_t)~(1 << PRADC))
488#define power_adc_disable()     (PRR |= (uint8_t)(1 << PRADC))
489
490#define power_spi_enable()      (PRR &= (uint8_t)~(1 << PRSPI))
491#define power_spi_disable()     (PRR |= (uint8_t)(1 << PRSPI))
492
493#define power_usart_enable()    (PRR &= (uint8_t)~(1 << PRUSART))
494#define power_usart_disable()   (PRR |= (uint8_t)(1 << PRUSART))
495
496#define power_timer0_enable()   (PRR &= (uint8_t)~(1 << PRTIM0))
497#define power_timer0_disable()  (PRR |= (uint8_t)(1 << PRTIM0))
498
499#define power_timer1_enable()   (PRR &= (uint8_t)~(1 << PRTIM1))
500#define power_timer1_disable()  (PRR |= (uint8_t)(1 << PRTIM1))
501
502/* Power Stage Controller 0 */
503#define power_psc0_enable()     (PRR &= (uint8_t)~(1 << PRPSC0))
504#define power_psc0_disable()    (PRR |= (uint8_t)(1 << PRPSC0))
505
506/* Power Stage Controller 1 */
507#define power_psc1_enable()     (PRR &= (uint8_t)~(1 << PRPSC1))
508#define power_psc1_disable()    (PRR |= (uint8_t)(1 << PRPSC1))
509
510/* Power Stage Controller 2 */
511#define power_psc2_enable()     (PRR &= (uint8_t)~(1 << PRPSC2))
512#define power_psc2_disable()    (PRR |= (uint8_t)(1 << PRPSC2))
513
514#define power_all_enable()      (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRPSC0)|(1<<PRPSC1)|(1<<PRPSC2)))
515#define power_all_disable()     (PRR |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRPSC0)|(1<<PRPSC1)|(1<<PRPSC2)))
516
517
518#elif defined(__AVR_AT90PWM81__)
519
520#define power_adc_enable()      (PRR &= (uint8_t)~(1 << PRADC))
521#define power_adc_disable()     (PRR |= (uint8_t)(1 << PRADC))
522
523#define power_spi_enable()      (PRR &= (uint8_t)~(1 << PRSPI))
524#define power_spi_disable()     (PRR |= (uint8_t)(1 << PRSPI))
525
526#define power_timer1_enable()   (PRR &= (uint8_t)~(1 << PRTIM1))
527#define power_timer1_disable()  (PRR |= (uint8_t)(1 << PRTIM1))
528
529/* Power Stage Controller 0 */
530#define power_psc0_enable()     (PRR &= (uint8_t)~(1 << PRPSC0))
531#define power_psc0_disable()    (PRR |= (uint8_t)(1 << PRPSC0))
532
533/* Power Stage Controller 2 */
534#define power_psc2_enable()     (PRR &= (uint8_t)~(1 << PRPSC2))
535#define power_psc2_disable()    (PRR |= (uint8_t)(1 << PRPSC2))
536
537#define power_all_enable()      (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRTIM1)|(1<<PRPSC0)|(1<<PRPSC2)))
538#define power_all_disable()     (PRR |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRTIM1)|(1<<PRPSC0)|(1<<PRPSC2)))
539
540
541#elif defined(__AVR_ATmega165__) \
542|| defined(__AVR_ATmega165A__) \
543|| defined(__AVR_ATmega165P__) \
544|| defined(__AVR_ATmega325__) \
545|| defined(__AVR_ATmega3250__) \
546|| defined(__AVR_ATmega645__) \
547|| defined(__AVR_ATmega645A__) \
548|| defined(__AVR_ATmega645P__) \
549|| defined(__AVR_ATmega6450__) \
550|| defined(__AVR_ATmega6450A__) \
551|| defined(__AVR_ATmega6450P__)
552
553#define power_adc_enable()      (PRR &= (uint8_t)~(1 << PRADC))
554#define power_adc_disable()     (PRR |= (uint8_t)(1 << PRADC))
555
556#define power_spi_enable()      (PRR &= (uint8_t)~(1 << PRSPI))
557#define power_spi_disable()     (PRR |= (uint8_t)(1 << PRSPI))
558
559#define power_usart0_enable()   (PRR &= (uint8_t)~(1 << PRUSART0))
560#define power_usart0_disable()  (PRR |= (uint8_t)(1 << PRUSART0))
561
562#define power_timer1_enable()   (PRR &= (uint8_t)~(1 << PRTIM1))
563#define power_timer1_disable()  (PRR |= (uint8_t)(1 << PRTIM1))
564
565#define power_all_enable()      (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM1)))
566#define power_all_disable()     (PRR |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM1)))
567
568
569#elif defined(__AVR_ATmega169__) \
570|| defined(__AVR_ATmega169A__) \
571|| defined(__AVR_ATmega169P__) \
572|| defined(__AVR_ATmega169PA__) \
573|| defined(__AVR_ATmega329__) \
574|| defined(__AVR_ATmega329P__) \
575|| defined(__AVR_ATmega329PA__) \
576|| defined(__AVR_ATmega3290__) \
577|| defined(__AVR_ATmega3290P__) \
578|| defined(__AVR_ATmega649__) \
579|| defined(__AVR_ATmega649A__) \
580|| defined(__AVR_ATmega649P__) \
581|| defined(__AVR_ATmega6490__) \
582|| defined(__AVR_ATmega6490A__) \
583|| defined(__AVR_ATmega6490P__)
584
585#define power_adc_enable()      (PRR &= (uint8_t)~(1 << PRADC))
586#define power_adc_disable()     (PRR |= (uint8_t)(1 << PRADC))
587
588#define power_spi_enable()      (PRR &= (uint8_t)~(1 << PRSPI))
589#define power_spi_disable()     (PRR |= (uint8_t)(1 << PRSPI))
590
591#define power_usart0_enable()   (PRR &= (uint8_t)~(1 << PRUSART0))
592#define power_usart0_disable()  (PRR |= (uint8_t)(1 << PRUSART0))
593
594#define power_timer1_enable()   (PRR &= (uint8_t)~(1 << PRTIM1))
595#define power_timer1_disable()  (PRR |= (uint8_t)(1 << PRTIM1))
596
597#define power_lcd_enable()      (PRR &= (uint8_t)~(1 << PRLCD))
598#define power_lcd_disable()     (PRR |= (uint8_t)(1 << PRLCD))
599
600#define power_all_enable()      (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM1)|(1<<PRLCD)))
601#define power_all_disable()     (PRR |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM1)|(1<<PRLCD)))
602
603
604#elif defined(__AVR_ATmega164A__) \
605|| defined(__AVR_ATmega164P__) \
606|| defined(__AVR_ATmega324A__) \
607|| defined(__AVR_ATmega324P__) \
608|| defined(__AVR_ATmega324PA__)
609
610#define power_adc_enable()      (PRR0 &= (uint8_t)~(1 << PRADC))
611#define power_adc_disable()     (PRR0 |= (uint8_t)(1 << PRADC))
612
613#define power_spi_enable()      (PRR0 &= (uint8_t)~(1 << PRSPI))
614#define power_spi_disable()     (PRR0 |= (uint8_t)(1 << PRSPI))
615
616#define power_usart0_enable()   (PRR0 &= (uint8_t)~(1 << PRUSART0))
617#define power_usart0_disable()  (PRR0 |= (uint8_t)(1 << PRUSART0))
618
619#define power_usart1_enable()   (PRR0 &= (uint8_t)~(1 << PRUSART1))
620#define power_usart1_disable()  (PRR0 |= (uint8_t)(1 << PRUSART1))
621
622#define power_timer0_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM0))
623#define power_timer0_disable()  (PRR0 |= (uint8_t)(1 << PRTIM0))
624
625#define power_timer1_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM1))
626#define power_timer1_disable()  (PRR0 |= (uint8_t)(1 << PRTIM1))
627
628#define power_timer2_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM2))
629#define power_timer2_disable()  (PRR0 |= (uint8_t)(1 << PRTIM2))
630
631#define power_twi_enable()      (PRR0 &= (uint8_t)~(1 << PRTWI))
632#define power_twi_disable()     (PRR0 |= (uint8_t)(1 << PRTWI))
633
634#define power_all_enable()      (PRR0 &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRUSART1)|(1<<PRTIM0)|(1<<PRTIM2)|(1<<PRTWI)))
635#define power_all_disable()     (PRR0 |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRUSART1)|(1<<PRTIM0)|(1<<PRTIM2)|(1<<PRTWI)))
636
637
638#elif defined(__AVR_ATmega644__) \
639|| defined(__AVR_ATmega644A__) \
640|| defined(__AVR_ATmega644P__)
641
642#define power_adc_enable()      (PRR0 &= (uint8_t)~(1 << PRADC))
643#define power_adc_disable()     (PRR0 |= (uint8_t)(1 << PRADC))
644
645#define power_spi_enable()      (PRR0 &= (uint8_t)~(1 << PRSPI))
646#define power_spi_disable()     (PRR0 |= (uint8_t)(1 << PRSPI))
647
648#define power_usart0_enable()   (PRR0 &= (uint8_t)~(1 << PRUSART0))
649#define power_usart0_disable()  (PRR0 |= (uint8_t)(1 << PRUSART0))
650
651#define power_timer0_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM0))
652#define power_timer0_disable()  (PRR0 |= (uint8_t)(1 << PRTIM0))
653
654#define power_timer1_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM1))
655#define power_timer1_disable()  (PRR0 |= (uint8_t)(1 << PRTIM1))
656
657#define power_timer2_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM2))
658#define power_timer2_disable()  (PRR0 |= (uint8_t)(1 << PRTIM2))
659
660#define power_twi_enable()      (PRR0 &= (uint8_t)~(1 << PRTWI))
661#define power_twi_disable()     (PRR0 |= (uint8_t)(1 << PRTWI))
662
663#define power_all_enable()      (PRR0 &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRTWI)))
664#define power_all_disable()     (PRR0 |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRTWI)))
665
666
667#elif defined(__AVR_ATmega406__)
668
669#define power_twi_enable()      (PRR0 &= (uint8_t)~(1 << PRTWI))
670#define power_twi_disable()     (PRR0 |= (uint8_t)(1 << PRTWI))
671
672#define power_timer0_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM0))
673#define power_timer0_disable()  (PRR0 |= (uint8_t)(1 << PRTIM0))
674
675#define power_timer1_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM1))
676#define power_timer1_disable()  (PRR0 |= (uint8_t)(1 << PRTIM1))
677
678/* Voltage ADC */
679#define power_vadc_enable()     (PRR0 &= (uint8_t)~(1 << PRVADC))
680#define power_vadc_disable()    (PRR0 |= (uint8_t)(1 << PRVADC))
681
682#define power_all_enable()      (PRR0 &= (uint8_t)~((1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRVADC)))
683#define power_all_disable()     (PRR0 |= (uint8_t)((1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRVADC)))
684
685
686#elif defined(__AVR_ATmega48__) \
687|| defined(__AVR_ATmega48A__) \
688|| defined(__AVR_ATmega48P__) \
689|| defined(__AVR_ATmega88__) \
690|| defined(__AVR_ATmega88A__) \
691|| defined(__AVR_ATmega88P__) \
692|| defined(__AVR_ATmega88PA__) \
693|| defined(__AVR_ATmega168__) \
694|| defined(__AVR_ATmega168A__) \
695|| defined(__AVR_ATmega168P__) \
696|| defined(__AVR_ATmega328__) \
697|| defined(__AVR_ATmega328P__) \
698|| defined(__AVR_ATtiny48__) \
699|| defined(__AVR_ATtiny88__)
700
701#define power_adc_enable()      (PRR &= (uint8_t)~(1 << PRADC))
702#define power_adc_disable()     (PRR |= (uint8_t)(1 << PRADC))
703
704#define power_spi_enable()      (PRR &= (uint8_t)~(1 << PRSPI))
705#define power_spi_disable()     (PRR |= (uint8_t)(1 << PRSPI))
706
707#define power_usart0_enable()   (PRR &= (uint8_t)~(1 << PRUSART0))
708#define power_usart0_disable()  (PRR |= (uint8_t)(1 << PRUSART0))
709
710#define power_timer0_enable()   (PRR &= (uint8_t)~(1 << PRTIM0))
711#define power_timer0_disable()  (PRR |= (uint8_t)(1 << PRTIM0))
712
713#define power_timer1_enable()   (PRR &= (uint8_t)~(1 << PRTIM1))
714#define power_timer1_disable()  (PRR |= (uint8_t)(1 << PRTIM1))
715
716#define power_timer2_enable()   (PRR &= (uint8_t)~(1 << PRTIM2))
717#define power_timer2_disable()  (PRR |= (uint8_t)(1 << PRTIM2))
718
719#define power_twi_enable()      (PRR &= (uint8_t)~(1 << PRTWI))
720#define power_twi_disable()     (PRR |= (uint8_t)(1 << PRTWI))
721
722#define power_all_enable()      (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRTWI)))
723#define power_all_disable()     (PRR |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRTWI)))
724
725
726#elif defined(__AVR_ATtiny24__) \
727|| defined(__AVR_ATtiny24A__) \
728|| defined(__AVR_ATtiny44__) \
729|| defined(__AVR_ATtiny44A__) \
730|| defined(__AVR_ATtiny84__) \
731|| defined(__AVR_ATtiny25__) \
732|| defined(__AVR_ATtiny45__) \
733|| defined(__AVR_ATtiny85__) \
734|| defined(__AVR_ATtiny261__) \
735|| defined(__AVR_ATtiny261A__) \
736|| defined(__AVR_ATtiny461__) \
737|| defined(__AVR_ATtiny461A__) \
738|| defined(__AVR_ATtiny861__) \
739|| defined(__AVR_ATtiny861A__) \
740|| defined(__AVR_ATtiny43U__)
741
742#define power_adc_enable()      (PRR &= (uint8_t)~(1 << PRADC))
743#define power_adc_disable()     (PRR |= (uint8_t)(1 << PRADC))
744
745#define power_timer0_enable()   (PRR &= (uint8_t)~(1 << PRTIM0))
746#define power_timer0_disable()  (PRR |= (uint8_t)(1 << PRTIM0))
747
748#define power_timer1_enable()   (PRR &= (uint8_t)~(1 << PRTIM1))
749#define power_timer1_disable()  (PRR |= (uint8_t)(1 << PRTIM1))
750
751/* Universal Serial Interface */
752#define power_usi_enable()      (PRR &= (uint8_t)~(1 << PRUSI))
753#define power_usi_disable()     (PRR |= (uint8_t)(1 << PRUSI))
754
755#define power_all_enable()      (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRUSI)))
756#define power_all_disable()     (PRR |= (uint8_t)((1<<PRADC)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRUSI)))
757
758
759#elif defined(__AVR_ATmega1284P__)
760
761
762#define power_adc_enable()      (PRR0 &= (uint8_t)~(1 << PRADC))
763#define power_adc_disable()     (PRR0 |= (uint8_t)(1 << PRADC))
764
765#define power_spi_enable()      (PRR0 &= (uint8_t)~(1 << PRSPI))
766#define power_spi_disable()     (PRR0 |= (uint8_t)(1 << PRSPI))
767
768#define power_twi_enable()      (PRR0 &= (uint8_t)~(1 << PRTWI))
769#define power_twi_disable()     (PRR0 |= (uint8_t)(1 << PRTWI))
770
771#define power_timer0_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM0))
772#define power_timer0_disable()  (PRR0 |= (uint8_t)(1 << PRTIM0))
773
774#define power_timer1_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM1))
775#define power_timer1_disable()  (PRR0 |= (uint8_t)(1 << PRTIM1))
776
777#define power_timer2_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM2))
778#define power_timer2_disable()  (PRR0 |= (uint8_t)(1 << PRTIM2))
779
780#define power_timer3_enable()   (PRR1 &= (uint8_t)~(1 << PRTIM3))
781#define power_timer3_disable()  (PRR1 |= (uint8_t)(1 << PRTIM3))
782
783#define power_usart0_enable()   (PRR0 &= (uint8_t)~(1 << PRUSART0))
784#define power_usart0_disable()  (PRR0 |= (uint8_t)(1 << PRUSART0))
785
786#define power_usart1_enable()   (PRR0 &= (uint8_t)~(1 << PRUSART1))
787#define power_usart1_disable()  (PRR0 |= (uint8_t)(1 << PRUSART1))
788
789#define power_all_enable() \
790do{ \
791    PRR0 &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRUSART0)|(1<<PRUSART1)); \
792    PRR1 &= (uint8_t)~(1<<PRTIM3); \
793}while(0)
794
795#define power_all_disable() \
796do{ \
797    PRR0 |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRUSART0)|(1<<PRUSART1)); \
798    PRR1 |= (uint8_t)(1<<PRTIM3); \
799}while(0)
800
801
802#elif defined(__AVR_ATmega32HVB__)
803
804
805#define power_twi_enable()      (PRR0 &= (uint8_t)~(1 << PRTWI))
806#define power_twi_disable()     (PRR0 |= (uint8_t)(1 << PRTWI))
807
808#define power_timer0_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM0))
809#define power_timer0_disable()  (PRR0 |= (uint8_t)(1 << PRTIM0))
810
811#define power_timer1_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM1))
812#define power_timer1_disable()  (PRR0 |= (uint8_t)(1 << PRTIM1))
813
814/* Voltage ADC */
815#define power_vadc_enable()     (PRR0 &= (uint8_t)~(1 << PRVADC))
816#define power_vadc_disable()    (PRR0 |= (uint8_t)(1 << PRVADC))
817
818#define power_spi_enable()      (PRR0 &= (uint8_t)~(1 << PRSPI))
819#define power_spi_disable()     (PRR0 |= (uint8_t)(1 << PRSPI))
820
821#define power_vrm_enable()      (PRR0 &= (uint8_t)~(1 << PRVRM))
822#define power_vrm_disable()     (PRR0 |= (uint8_t)(1 << PRVRM))
823
824#define power_all_enable()      (PRR0 &= (uint8_t)~((1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRVADC)|(1<<PRSPI)|(1<<PRVRM)))
825#define power_all_disable()     (PRR0 |= (uint8_t)((1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRVADC)|(1<<PRSPI)|(1<<PRVRM)))
826
827
828#elif defined(__AVR_ATmega16M1__) \
829|| defined(__AVR_ATmega32C1__) \
830|| defined(__AVR_ATmega32M1__) \
831|| defined(__AVR_ATmega64C1__) \
832|| defined(__AVR_ATmega64M1__)
833
834#define power_adc_enable()      (PRR &= (uint8_t)~(1 << PRADC))
835#define power_adc_disable()     (PRR |= (uint8_t)(1 << PRADC))
836
837#define power_lin_enable()      (PRR &= (uint8_t)~(1 << PRLIN))
838#define power_lin_disable()     (PRR |= (uint8_t)(1 << PRLIN))
839
840#define power_spi_enable()      (PRR &= (uint8_t)~(1 << PRSPI))
841#define power_spi_disable()     (PRR |= (uint8_t)(1 << PRSPI))
842
843#define power_timer0_enable()   (PRR &= (uint8_t)~(1 << PRTIM0))
844#define power_timer0_disable()  (PRR |= (uint8_t)(1 << PRTIM0))
845
846#define power_timer1_enable()   (PRR &= (uint8_t)~(1 << PRTIM1))
847#define power_timer1_disable()  (PRR |= (uint8_t)(1 << PRTIM1))
848
849#define power_psc_enable()      (PRR &= (uint8_t)~(1 << PRPSC))
850#define power_psc_disable()     (PRR |= (uint8_t)(1 << PRPSC))
851
852#define power_can_enable()      (PRR &= (uint8_t)~(1 << PRCAN))
853#define power_can_disable()     (PRR |= (uint8_t)(1 << PRCAN))
854
855#define power_all_enable()      (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRLIN)|(1<<PRSPI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRPSC)|(1<<PRCAN)))
856#define power_all_disable()     (PRR |= (uint8_t)((1<<PRADC)|(1<<PRLIN)|(1<<PRSPI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRPSC)|(1<<PRCAN)))
857
858
859#elif defined(__AVR_ATtiny167__) \
860|| defined(__AVR_ATtiny87__)
861
862
863#define power_adc_enable()      (PRR &= (uint8_t)~(1 << PRADC))
864#define power_adc_disable()     (PRR |= (uint8_t)(1 << PRADC))
865
866#define power_usi_enable()      (PRR &= (uint8_t)~(1 << PRUSI))
867#define power_usi_disable()     (PRR |= (uint8_t)(1 << PRUSI))
868
869#define power_timer0_enable()   (PRR &= (uint8_t)~(1 << PRTIM0))
870#define power_timer0_disable()  (PRR |= (uint8_t)(1 << PRTIM0))
871
872#define power_timer1_enable()   (PRR &= (uint8_t)~(1 << PRTIM1))
873#define power_timer1_disable()  (PRR |= (uint8_t)(1 << PRTIM1))
874
875#define power_spi_enable()      (PRR &= (uint8_t)~(1 << PRSPI))
876#define power_spi_disable()     (PRR |= (uint8_t)(1 << PRSPI))
877
878#define power_lin_enable()      (PRR &= (uint8_t)~(1 << PRLIN))
879#define power_lin_disable()     (PRR |= (uint8_t)(1 << PRLIN))
880
881#define power_all_enable()      (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRUSI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRSPI)|(1<<PRLIN)))
882#define power_all_disable()     (PRR |= (uint8_t)((1<<PRADC)|(1<<PRUSI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRSPI)|(1<<PRLIN)))
883
884
885#elif defined(__AVR_AT90USB82__) \
886|| defined(__AVR_AT90USB162__) \
887|| defined(__AVR_ATmega8U2__) \
888|| defined(__AVR_ATmega16U2__) \
889|| defined(__AVR_ATmega32U2__)
890
891#define power_spi_enable()      (PRR0 &= (uint8_t)~(1 << PRSPI))
892#define power_spi_disable()     (PRR0 |= (uint8_t)(1 << PRSPI))
893
894#define power_timer0_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM0))
895#define power_timer0_disable()  (PRR0 |= (uint8_t)(1 << PRTIM0))
896
897#define power_timer1_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM1))
898#define power_timer1_disable()  (PRR0 |= (uint8_t)(1 << PRTIM1))
899
900#define power_usb_enable()      (PRR1 &= (uint8_t)~(1 << PRUSB))
901#define power_usb_disable()     (PRR1 |= (uint8_t)(1 << PRUSB))
902
903#define power_usart1_enable()   (PRR1 &= (uint8_t)~(1 << PRUSART1))
904#define power_usart1_disable()  (PRR1 |= (uint8_t)(1 << PRUSART1))
905
906#define power_all_enable() \
907do{ \
908    PRR0 &= (uint8_t)~((1<<PRSPI)|(1<<PRTIM0)|(1<<PRTIM1)); \
909    PRR1 &= (uint8_t)~((1<<PRUSB)|(1<<PRUSART1)); \
910}while(0)
911
912#define power_all_disable() \
913do{ \
914    PRR0 |= (uint8_t)((1<<PRSPI)|(1<<PRTIM0)|(1<<PRTIM1)); \
915    PRR1 |= (uint8_t)((1<<PRUSB)|(1<<PRUSART1)); \
916}while(0)
917
918
919#elif defined(__AVR_AT90SCR100__)
920
921#define power_usart0_enable()   (PRR0 &= (uint8_t)~(1 << PRUSART0))
922#define power_usart0_disable()  (PRR0 |= (uint8_t)(1 << PRUSART0))
923
924#define power_spi_enable()      (PRR0 &= (uint8_t)~(1 << PRSPI))
925#define power_spi_disable()     (PRR0 |= (uint8_t)(1 << PRSPI))
926
927#define power_timer1_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM1))
928#define power_timer1_disable()  (PRR0 |= (uint8_t)(1 << PRTIM1))
929
930#define power_timer0_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM0))
931#define power_timer0_disable()  (PRR0 |= (uint8_t)(1 << PRTIM0))
932
933#define power_timer2_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM2))
934#define power_timer2_disable()  (PRR0 |= (uint8_t)(1 << PRTIM2))
935
936#define power_twi_enable()      (PRR0 &= (uint8_t)~(1 << PRTWI))
937#define power_twi_disable()     (PRR0 |= (uint8_t)(1 << PRTWI))
938
939#define power_usbh_enable()     (PRR1 &= (uint8_t)~(1 << PRUSBH))
940#define power_usbh_disable()    (PRR1 |= (uint8_t)(1 << PRUSBH))
941
942#define power_usb_enable()      (PRR1 &= (uint8_t)~(1 << PRUSB))
943#define power_usb_disable()     (PRR1 |= (uint8_t)(1 << PRUSB))
944
945#define power_hsspi_enable()    (PRR1 &= (uint8_t)~(1 << PRHSSPI))
946#define power_hsspi_disable()   (PRR1 |= (uint8_t)(1 << PRHSSPI))
947
948#define power_sci_enable()      (PRR1 &= (uint8_t)~(1 << PRSCI))
949#define power_sci_disable()     (PRR1 |= (uint8_t)(1 << PRSCI))
950
951#define power_aes_enable()      (PRR1 &= (uint8_t)~(1 << PRAES))
952#define power_aes_disable()     (PRR1 |= (uint8_t)(1 << PRAES))
953
954#define power_kb_enable()       (PRR1 &= (uint8_t)~(1 << PRKB))
955#define power_kb_disable()      (PRR1 |= (uint8_t)(1 << PRKB))
956
957#define power_all_enable() \
958do{ \
959    PRR0 &= (uint8_t)~((1<<PRUSART0)|(1<<PRSPI)|(1<<PRTIM1)|(1<<PRTIM0)|(1<<PRTIM2)|(1<<PRTWI)); \
960    PRR1 &= (uint8_t)~((1<<PRUSBH)|(1<<PRUSB)|(1<<PRHSSPI)|(1<<PRSCI)|(1<<PRAES)|(1<<PRKB)); \
961}while(0)
962
963#define power_all_disable() \
964do{ \
965    PRR0 |= (uint8_t)((1<<PRUSART0)|(1<<PRSPI)|(1<<PRTIM1)|(1<<PRTIM0)|(1<<PRTIM2)|(1<<PRTWI)); \
966    PRR1 |= (uint8_t)((1<<PRUSBH)|(1<<PRUSB)|(1<<PRHSSPI)|(1<<PRSCI)|(1<<PRAES)|(1<<PRKB)); \
967}while(0)
968
969
970#elif defined(__AVR_ATtiny13A__)
971
972#define power_adc_enable()   (PRR &= (uint8_t)~(1 << PRADC))
973#define power_adc_disable()  (PRR |= (uint8_t)(1 << PRADC))
974
975#define power_timer0_enable()   (PRR &= (uint8_t)~(1 << PRTIM0))
976#define power_timer0_disable()  (PRR |= (uint8_t)(1 << PRTIM0))
977
978#define power_all_enable()      (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRTIM0)))
979#define power_all_disable()     (PRR |= (uint8_t)((1<<PRADC)|(1<<PRTIM0)))
980
981#endif
982
983
984#if defined(__AVR_AT90CAN32__) \
985|| defined(__AVR_AT90CAN64__) \
986|| defined(__AVR_AT90CAN128__) \
987|| defined(__AVR_AT90PWM1__) \
988|| defined(__AVR_AT90PWM2__) \
989|| defined(__AVR_AT90PWM2B__) \
990|| defined(__AVR_AT90PWM3__) \
991|| defined(__AVR_AT90PWM3B__) \
992|| defined(__AVR_AT90PWM216__) \
993|| defined(__AVR_AT90PWM316__) \
994|| defined(__AVR_AT90SCR100__) \
995|| defined(__AVR_AT90USB646__) \
996|| defined(__AVR_AT90USB647__) \
997|| defined(__AVR_AT90USB82__) \
998|| defined(__AVR_AT90USB1286__) \
999|| defined(__AVR_AT90USB1287__) \
1000|| defined(__AVR_AT90USB162__) \
1001|| defined(__AVR_ATmega1280__) \
1002|| defined(__AVR_ATmega1281__) \
1003|| defined(__AVR_ATmega128RFA1__) \
1004|| defined(__AVR_ATmega1284P__) \
1005|| defined(__AVR_ATmega162__) \
1006|| defined(__AVR_ATmega164A__) \
1007|| defined(__AVR_ATmega164P__) \
1008|| defined(__AVR_ATmega165__) \
1009|| defined(__AVR_ATmega165A__) \
1010|| defined(__AVR_ATmega165P__) \
1011|| defined(__AVR_ATmega168__) \
1012|| defined(__AVR_ATmega168P__) \
1013|| defined(__AVR_ATmega169__) \
1014|| defined(__AVR_ATmega169A__) \
1015|| defined(__AVR_ATmega169P__) \
1016|| defined(__AVR_ATmega169PA__) \
1017|| defined(__AVR_ATmega16U4__) \
1018|| defined(__AVR_ATmega2560__) \
1019|| defined(__AVR_ATmega2561__) \
1020|| defined(__AVR_ATmega324A__) \
1021|| defined(__AVR_ATmega324P__) \
1022|| defined(__AVR_ATmega325__) \
1023|| defined(__AVR_ATmega3250__) \
1024|| defined(__AVR_ATmega328P__) \
1025|| defined(__AVR_ATmega329__) \
1026|| defined(__AVR_ATmega329P__) \
1027|| defined(__AVR_ATmega329PA__) \
1028|| defined(__AVR_ATmega3290__) \
1029|| defined(__AVR_ATmega32C1__) \
1030|| defined(__AVR_ATmega32HVB__) \
1031|| defined(__AVR_ATmega32M1__) \
1032|| defined(__AVR_ATmega32U4__) \
1033|| defined(__AVR_ATmega32U6__) \
1034|| defined(__AVR_ATmega48__) \
1035|| defined(__AVR_ATmega48P__) \
1036|| defined(__AVR_ATmega640__) \
1037|| defined(__AVR_ATmega649P__) \
1038|| defined(__AVR_ATmega644__) \
1039|| defined(__AVR_ATmega644A__) \
1040|| defined(__AVR_ATmega644P__) \
1041|| defined(__AVR_ATmega644PA__) \
1042|| defined(__AVR_ATmega645__) \
1043|| defined(__AVR_ATmega645A__) \
1044|| defined(__AVR_ATmega645P__) \
1045|| defined(__AVR_ATmega6450__) \
1046|| defined(__AVR_ATmega6450A__) \
1047|| defined(__AVR_ATmega6450P__) \
1048|| defined(__AVR_ATmega649__) \
1049|| defined(__AVR_ATmega649A__) \
1050|| defined(__AVR_ATmega6490__) \
1051|| defined(__AVR_ATmega6490A__) \
1052|| defined(__AVR_ATmega6490P__) \
1053|| defined(__AVR_ATmega88__) \
1054|| defined(__AVR_ATmega88P__) \
1055|| defined(__AVR_ATtiny48__) \
1056|| defined(__AVR_ATtiny167__) \
1057|| defined(__DOXYGEN__)
1058
1059
1060/** \addtogroup avr_power
1061
1062Some of the newer AVRs contain a System Clock Prescale Register (CLKPR) that
1063allows you to decrease the system clock frequency and the power consumption
1064when the need for processing power is low. Below are two macros and an
1065enumerated type that can be used to interface to the Clock Prescale Register.
1066
1067\note Not all AVR devices have a Clock Prescale Register. On those devices
1068without a Clock Prescale Register, these macros are not available.
1069*/
1070
1071
1072/** \addtogroup avr_power
1073\code
1074typedef enum
1075{
1076    clock_div_1 = 0,
1077    clock_div_2 = 1,
1078    clock_div_4 = 2,
1079    clock_div_8 = 3,
1080    clock_div_16 = 4,
1081    clock_div_32 = 5,
1082    clock_div_64 = 6,
1083    clock_div_128 = 7,
1084    clock_div_256 = 8,
1085    clock_div_1_rc = 15, // ATmega128RFA1 only
1086} clock_div_t;
1087\endcode
1088Clock prescaler setting enumerations.
1089
1090*/
1091typedef enum
1092{
1093    clock_div_1 = 0,
1094    clock_div_2 = 1,
1095    clock_div_4 = 2,
1096    clock_div_8 = 3,
1097    clock_div_16 = 4,
1098    clock_div_32 = 5,
1099    clock_div_64 = 6,
1100    clock_div_128 = 7,
1101    clock_div_256 = 8,
1102#if defined(__AVR_ATmega128RFA1__)
1103    clock_div_1_rc = 15,
1104#endif
1105} clock_div_t;
1106
1107
1108static __inline__ void clock_prescale_set(clock_div_t) __attribute__((__always_inline__));
1109
1110/** \addtogroup avr_power
1111\code clock_prescale_set(x) \endcode
1112
1113Set the clock prescaler register select bits, selecting a system clock
1114division setting. This function is inlined, even if compiler
1115optimizations are disabled.
1116
1117The type of x is clock_div_t.
1118*/
1119void clock_prescale_set(clock_div_t __x)
1120{
1121    uint8_t __tmp = _BV(CLKPCE);
1122    __asm__ __volatile__ (
1123        "in __tmp_reg__,__SREG__" "\n\t"
1124        "cli" "\n\t"
1125        "sts %1, %0" "\n\t"
1126        "sts %1, %2" "\n\t"
1127        "out __SREG__, __tmp_reg__"
1128        : /* no outputs */
1129        : "d" (__tmp),
1130          "M" (_SFR_MEM_ADDR(CLKPR)),
1131          "d" (__x)
1132        : "r0");
1133}
1134
1135/** \addtogroup avr_power
1136\code clock_prescale_get() \endcode
1137Gets and returns the clock prescaler register setting. The return type is clock_div_t.
1138
1139*/
1140#define clock_prescale_get()  (clock_div_t)(CLKPR & (uint8_t)((1<<CLKPS0)|(1<<CLKPS1)|(1<<CLKPS2)|(1<<CLKPS3)))
1141
1142
1143#elif defined(__AVR_ATtiny24__) \
1144|| defined(__AVR_ATtiny24A__) \
1145|| defined(__AVR_ATtiny44__) \
1146|| defined(__AVR_ATtiny44A__) \
1147|| defined(__AVR_ATtiny84__) \
1148|| defined(__AVR_ATtiny25__) \
1149|| defined(__AVR_ATtiny45__) \
1150|| defined(__AVR_ATtiny85__) \
1151|| defined(__AVR_ATtiny261A__) \
1152|| defined(__AVR_ATtiny261__) \
1153|| defined(__AVR_ATtiny461__) \
1154|| defined(__AVR_ATtiny461A__) \
1155|| defined(__AVR_ATtiny861__) \
1156|| defined(__AVR_ATtiny861A__) \
1157|| defined(__AVR_ATtiny2313__) \
1158|| defined(__AVR_ATtiny2313A__) \
1159|| defined(__AVR_ATtiny4313__) \
1160|| defined(__AVR_ATtiny13__) \
1161|| defined(__AVR_ATtiny13A__) \
1162|| defined(__AVR_ATtiny43U__) \
1163
1164typedef enum
1165{
1166    clock_div_1 = 0,
1167    clock_div_2 = 1,
1168    clock_div_4 = 2,
1169    clock_div_8 = 3,
1170    clock_div_16 = 4,
1171    clock_div_32 = 5,
1172    clock_div_64 = 6,
1173    clock_div_128 = 7,
1174    clock_div_256 = 8
1175} clock_div_t;
1176
1177
1178void clock_prescale_set(clock_div_t __x)
1179{
1180    uint8_t __tmp = _BV(CLKPCE);
1181    __asm__ __volatile__ (
1182        "in __tmp_reg__,__SREG__" "\n\t"
1183        "cli" "\n\t"
1184        "out %1, %0" "\n\t"
1185        "out %1, %2" "\n\t"
1186        "out __SREG__, __tmp_reg__"
1187        : /* no outputs */
1188        : "d" (__tmp),
1189          "I" (_SFR_IO_ADDR(CLKPR)),
1190          "d" (__x)
1191        : "r0");
1192}
1193
1194
1195#define clock_prescale_get()  (clock_div_t)(CLKPR & (uint8_t)((1<<CLKPS0)|(1<<CLKPS1)|(1<<CLKPS2)|(1<<CLKPS3)))
1196
1197
1198#endif
1199
1200/**@}*/
1201#endif /* _AVR_POWER_H_ */
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