source: rtems/cpukit/score/cpu/avr/avr/power.h @ 04a62dce

4.104.11
Last change on this file since 04a62dce was 04a62dce, checked in by Joel Sherrill <joel.sherrill@…>, on Aug 6, 2009 at 2:52:07 PM

2009-08-05 Josh Switnicki <josh.switnicki@…>

  • Makefile.am: added AVR specific Header files to score/cpu/avr/avr. These are from avr-libc 1.6 and assumed to exist by AVR applications.
  • preinstall.am: Regenerated.
  • Property mode set to 100644
File size: 56.1 KB
Line 
1/* Copyright (c) 2006, 2007, 2008  Eric B. Weddington
2   All rights reserved.
3
4   Redistribution and use in source and binary forms, with or without
5   modification, are permitted provided that the following conditions are met:
6
7   * Redistributions of source code must retain the above copyright
8     notice, this list of conditions and the following disclaimer.
9   * Redistributions in binary form must reproduce the above copyright
10     notice, this list of conditions and the following disclaimer in
11     the documentation and/or other materials provided with the
12     distribution.
13   * Neither the name of the copyright holders nor the names of
14     contributors may be used to endorse or promote products derived
15     from this software without specific prior written permission.
16
17  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
18  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
21  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
25  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
27  POSSIBILITY OF SUCH DAMAGE. */
28
29/* $Id$ */
30
31#ifndef _AVR_POWER_H_
32#define _AVR_POWER_H_   1
33
34#include <avr/io.h>
35#include <stdint.h>
36
37
38/** \file */
39/** \defgroup avr_power <avr/power.h>: Power Reduction Management
40
41\code #include <avr/power.h>\endcode
42
43Many AVRs contain a Power Reduction Register (PRR) or Registers (PRRx) that
44allow you to reduce power consumption by disabling or enabling various on-board
45peripherals as needed.
46
47There are many macros in this header file that provide an easy interface
48to enable or disable on-board peripherals to reduce power. See the table below.
49
50\note Not all AVR devices have a Power Reduction Register (for example
51the ATmega128). On those devices without a Power Reduction Register, these
52macros are not available.
53
54\note Not all AVR devices contain the same peripherals (for example, the LCD
55interface), or they will be named differently (for example, USART and
56USART0). Please consult your device's datasheet, or the header file, to
57find out which macros are applicable to your device.
58
59*/
60
61
62/** \addtogroup avr_power
63
64\anchor avr_powermacros
65<small>
66<center>
67<table border="3">
68  <tr>
69    <td width="10%"><strong>Power Macro</strong></td>
70    <td width="15%"><strong>Description</strong></td>
71    <td width="75%"><strong>Applicable for device</strong></td>
72  </tr>
73
74  <tr>
75    <td>power_adc_enable()</td>
76    <td>Enable the Analog to Digital Converter module.</td>
77    <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, ATmega165, ATmega165P, ATmega325, ATmega3250, ATmega645, ATmega6450, ATmega169, ATmega169P, ATmega329, ATmega3290, ATmega649, ATmega6490, ATmega164P, ATmega324P, ATmega644, ATmega48, ATmega88, ATmega168, ATtiny24, ATtiny44, ATtiny84, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny461, ATtiny861</td>
78  </tr>
79
80  <tr>
81    <td>power_adc_disable()</td>
82    <td>Disable the Analog to Digital Converter module.</td>
83    <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, ATmega165, ATmega165P, ATmega325, ATmega3250, ATmega645, ATmega6450, ATmega169, ATmega169P, ATmega329, ATmega3290, ATmega649, ATmega6490, ATmega164P, ATmega324P, ATmega644, ATmega48, ATmega88, ATmega168, ATtiny24, ATtiny44, ATtiny84, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny461, ATtiny861</td>
84  </tr>
85
86  <tr>
87    <td>power_lcd_enable()</td>
88    <td>Enable the LCD module.</td>
89    <td>ATmega169, ATmega169P, ATmega329, ATmega3290, ATmega649, ATmega6490</td>
90  </tr>
91
92  <tr>
93    <td>power_lcd_disable().</td>
94    <td>Disable the LCD module.</td>
95    <td>ATmega169, ATmega169P, ATmega329, ATmega3290, ATmega649, ATmega6490</td>
96  </tr>
97
98  <tr>
99    <td>power_psc0_enable()</td>
100    <td>Enable the Power Stage Controller 0 module.</td>
101    <td>AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B</td>
102  </tr>
103
104  <tr>
105    <td>power_psc0_disable()</td>
106    <td>Disable the Power Stage Controller 0 module.</td>
107    <td>AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B</td>
108  </tr>
109
110  <tr>
111    <td>power_psc1_enable()</td>
112    <td>Enable the Power Stage Controller 1 module.</td>
113    <td>AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B</td>
114  </tr>
115
116  <tr>
117    <td>power_psc1_disable()</td>
118    <td>Disable the Power Stage Controller 1 module.</td>
119    <td>AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B</td>
120  </tr>
121
122  <tr>
123    <td>power_psc2_enable()</td>
124    <td>Enable the Power Stage Controller 2 module.</td>
125    <td>AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B</td>
126  </tr>
127
128  <tr>
129    <td>power_psc2_disable()</td>
130    <td>Disable the Power Stage Controller 2 module.</td>
131    <td>AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B</td>
132  </tr>
133
134  <tr>
135    <td>power_spi_enable()</td>
136    <td>Enable the Serial Peripheral Interface module.</td>
137    <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, ATmega165, ATmega165P, ATmega325, ATmega3250, ATmega645, ATmega6450, ATmega169, ATmega169P, ATmega329, ATmega3290, ATmega649, ATmega6490, ATmega164P, ATmega324P, ATmega644, ATmega48, ATmega88, ATmega168</td>
138  </tr>
139
140  <tr>
141    <td>power_spi_disable()</td>
142    <td>Disable the Serial Peripheral Interface module.</td>
143    <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, ATmega165, ATmega165P, ATmega325, ATmega3250, ATmega645, ATmega6450, ATmega169, ATmega169P, ATmega329, ATmega3290, ATmega649, ATmega6490, ATmega164P, ATmega324P, ATmega644, ATmega48, ATmega88, ATmega168</td>
144  </tr>
145
146  <tr>
147    <td>power_timer0_enable()</td>
148    <td>Enable the Timer 0 module.</td>
149    <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, AT90PWM1, AT90PWM216, AT90PWM316, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, ATmega165, ATmega165P, ATmega325, ATmega3250, ATmega645, ATmega6450, ATmega164P, ATmega324P, ATmega644, ATmega406, ATmega48, ATmega88, ATmega168, ATtiny24, ATtiny44, ATtiny84, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny461, ATtiny861</td>
150  </tr>
151
152  <tr>
153    <td>power_timer0_disable()</td>
154    <td>Disable the Timer 0 module.</td>
155    <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, ATmega165, ATmega165P, ATmega325, ATmega3250, ATmega645, ATmega6450, ATmega164P, ATmega324P, ATmega644, ATmega406, ATmega48, ATmega88, ATmega168, ATtiny24, ATtiny44, ATtiny84, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny461, ATtiny861</td>
156  </tr>
157
158  <tr>
159    <td>power_timer1_enable()</td>
160    <td>Enable the Timer 1 module.</td>
161    <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, ATmega165, ATmega165P, ATmega325, ATmega3250, ATmega645, ATmega6450, ATmega169, ATmega169P, ATmega329, ATmega3290, ATmega649, ATmega6490, ATmega164P, ATmega324P, ATmega644, ATmega406, ATmega48, ATmega88, ATmega168, ATtiny24, ATtiny44, ATtiny84, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny461, ATtiny861</td>
162  </tr>
163
164  <tr>
165    <td>power_timer1_disable()</td>
166    <td>Disable the Timer 1 module.</td>
167    <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, ATmega165, ATmega165P, ATmega325, ATmega3250, ATmega645, ATmega6450, ATmega169, ATmega169P, ATmega329, ATmega3290, ATmega649, ATmega6490, ATmega164P, ATmega324P, ATmega644, ATmega406, ATmega48, ATmega88, ATmega168, ATtiny24, ATtiny44, ATtiny84, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny461, ATtiny861</td>
168  </tr>
169
170  <tr>
171    <td>power_timer2_enable()</td>
172    <td>Enable the Timer 2 module.</td>
173    <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega164P, ATmega324P, ATmega644, ATmega48, ATmega88, ATmega168</td>
174  </tr>
175
176  <tr>
177    <td>power_timer2_disable()</td>
178    <td>Disable the Timer 2 module.</td>
179    <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega164P, ATmega324P, ATmega644, ATmega48, ATmega88, ATmega168</td>
180  </tr>
181
182  <tr>
183    <td>power_timer3_enable()</td>
184    <td>Enable the Timer 3 module.</td>
185    <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287</td>
186  </tr>
187
188  <tr>
189    <td>power_timer3_disable()</td>
190    <td>Disable the Timer 3 module.</td>
191    <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287</td>
192  </tr>
193
194  <tr>
195    <td>power_timer4_enable()</td>
196    <td>Enable the Timer 4 module.</td>
197    <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561</td>
198  </tr>
199
200  <tr>
201    <td>power_timer4_disable()</td>
202    <td>Disable the Timer 4 module.</td>
203    <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561</td>
204  </tr>
205
206  <tr>
207    <td>power_timer5_enable()</td>
208    <td>Enable the Timer 5 module.</td>
209    <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561</td>
210  </tr>
211
212  <tr>
213    <td>power_timer5_disable()</td>
214    <td>Disable the Timer 5 module.</td>
215    <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561</td>
216  </tr>
217
218  <tr>
219    <td>power_twi_enable()</td>
220    <td>Enable the Two Wire Interface module.</td>
221    <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega164P, ATmega324P, ATmega644, ATmega406, ATmega48, ATmega88, ATmega168</td>
222  </tr>
223
224  <tr>
225    <td>power_twi_disable()</td>
226    <td>Disable the Two Wire Interface module.</td>
227    <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega164P, ATmega324P, ATmega644, ATmega406, ATmega48, ATmega88, ATmega168</td>
228  </tr>
229
230  <tr>
231    <td>power_usart_enable()</td>
232    <td>Enable the USART module.</td>
233    <td>AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B</td>
234  </tr>
235
236  <tr>
237    <td>power_usart_disable()</td>
238    <td>Disable the USART module.</td>
239    <td>AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B</td>
240  </tr>
241
242  <tr>
243    <td>power_usart0_enable()</td>
244    <td>Enable the USART 0 module.</td>
245    <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561, ATmega165, ATmega165P, ATmega325, ATmega3250, ATmega645, ATmega6450, ATmega169, ATmega169P, ATmega329, ATmega3290, ATmega649, ATmega6490, ATmega164P, ATmega324P, ATmega644, ATmega48, ATmega88, ATmega168</td>
246  </tr>
247
248  <tr>
249    <td>power_usart0_disable()</td>
250    <td>Disable the USART 0 module.</td>
251    <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561, ATmega165, ATmega165P, ATmega325, ATmega3250, ATmega645, ATmega6450, ATmega169, ATmega169P, ATmega329, ATmega3290, ATmega649, ATmega6490, ATmega164P, ATmega324P, ATmega644, ATmega48, ATmega88, ATmega168</td>
252  </tr>
253
254  <tr>
255    <td>power_usart1_enable()</td>
256    <td>Enable the USART 1 module.</td>
257    <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega164P, ATmega324P</td>
258  </tr>
259
260  <tr>
261    <td>power_usart1_disable()</td>
262    <td>Disable the USART 1 module.</td>
263    <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega164P, ATmega324P</td>
264  </tr>
265
266  <tr>
267    <td>power_usart2_enable()</td>
268    <td>Enable the USART 2 module.</td>
269    <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561</td>
270  </tr>
271
272  <tr>
273    <td>power_usart2_disable()</td>
274    <td>Disable the USART 2 module.</td>
275    <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561</td>
276  </tr>
277
278  <tr>
279    <td>power_usart3_enable()</td>
280    <td>Enable the USART 3 module.</td>
281    <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561</td>
282  </tr>
283
284  <tr>
285    <td>power_usart3_disable()</td>
286    <td>Disable the USART 3 module.</td>
287    <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561</td>
288  </tr>
289
290  <tr>
291    <td>power_usb_enable()</td>
292    <td>Enable the USB module.</td>
293    <td>AT90USB646, AT90USB647, AT90USB1286, AT90USB1287</td>
294  </tr>
295
296  <tr>
297    <td>power_usb_disable()</td>
298    <td>Disable the USB module.</td>
299    <td>AT90USB646, AT90USB647, AT90USB1286, AT90USB1287</td>
300  </tr>
301
302  <tr>
303    <td>power_usi_enable()</td>
304    <td>Enable the Universal Serial Interface module.</td>
305    <td>ATtiny24, ATtiny44, ATtiny84, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny461, ATtiny861</td>
306  </tr>
307
308  <tr>
309    <td>power_usi_disable()</td>
310    <td>Disable the Universal Serial Interface module.</td>
311    <td>ATtiny24, ATtiny44, ATtiny84, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny461, ATtiny861</td>
312  </tr>
313
314  <tr>
315    <td>power_vadc_enable()</td>
316    <td>Enable the Voltage ADC module.</td>
317    <td>ATmega406</td>
318  </tr>
319
320  <tr>
321    <td>power_vadc_disable()</td>
322    <td>Disable the Voltage ADC module.</td>
323    <td>ATmega406</td>
324  </tr>
325
326  <tr>
327    <td>power_all_enable()</td>
328    <td>Enable all modules.</td>
329    <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, ATmega165, ATmega165P, ATmega325, ATmega3250, ATmega645, ATmega6450, ATmega169, ATmega169P, ATmega329, ATmega3290, ATmega649, ATmega6490, ATmega164P, ATmega324P, ATmega644, ATmega406, ATmega48, ATmega88, ATmega168, ATtiny24, ATtiny44, ATtiny84, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny461, ATtiny861</td>
330  </tr>
331
332  <tr>
333    <td>power_all_disable()</td>
334    <td>Disable all modules.</td>
335    <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, ATmega165, ATmega165P, ATmega325, ATmega3250, ATmega645, ATmega6450, ATmega169, ATmega169P, ATmega329, ATmega3290, ATmega649, ATmega6490, ATmega164P, ATmega324P, ATmega644, ATmega406, ATmega48, ATmega88, ATmega168, ATtiny24, ATtiny44, ATtiny84, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny461, ATtiny861</td>
336  </tr>
337</table>
338</center>
339</small>
340
341@} */
342
343
344#if defined(__AVR_ATxmega16A4__) \
345|| defined(__AVR_ATxmega16D4__) \
346|| defined(__AVR_ATxmega32A4__) \
347|| defined(__AVR_ATxmega32D4__) \
348|| defined(__AVR_ATxmega64A1__) \
349|| defined(__AVR_ATxmega64A3__) \
350|| defined(__AVR_ATxmega128A1__) \
351|| defined(__AVR_ATxmega128A3__) \
352|| defined(__AVR_ATxmega256A3__) \
353|| defined(__AVR_ATxmega256A3b__)
354
355/*
356#define power_aes_enable()  (PR_PR &= (uint8_t)~(PR_AES_bm))
357#define power_aes_disable() (PR_PR |= (uint8_t)PR_AES_bm)
358*/
359
360#define power_ebi_enable()  (PR_PR &= (uint8_t)~(PR_EBI_bm))
361#define power_ebi_disable() (PR_PR |= (uint8_t)PR_EBI_bm)
362
363#define power_rtc_enable()  (PR_PR &= (uint8_t)~(PR_RTC_bm))
364#define power_rtc_disable() (PR_PR |= (uint8_t)PR_RTC_bm)
365
366#define power_evsys_enable()    (PR_PR &= (uint8_t)~(PR_EVSYS_bm))
367#define power_evsys_disable()   (PR_PR |= (uint8_t)PR_EVSYS_bm)
368
369#define power_dma_enable()    (PR_PR &= (uint8_t)~(PR_DMA_bm))
370#define power_dma_disable()   (PR_PR |= (uint8_t)PR_DMA_bm)
371
372#define power_daca_enable()     (PR_PRPA &= (uint8_t)~(PR_DAC_bm))
373#define power_daca_disable()    (PR_PRPA |= (uint8_t)PR_DAC_bm)
374#define power_dacb_enable()     (PR_PRPB &= (uint8_t)~(PR_DAC_bm))
375#define power_dacb_disable()    (PR_PRPB |= (uint8_t)PR_DAC_bm)
376
377#define power_adca_enable()     (PR_PRPA &= (uint8_t)~(PR_ADC_bm))
378#define power_adca_disable()    (PR_PRPA |= (uint8_t)PR_ADC_bm)
379#define power_adcb_enable()     (PR_PRPB &= (uint8_t)~(PR_ADC_bm))
380#define power_adcb_disable()    (PR_PRPB |= (uint8_t)PR_ADC_bm)
381
382#define power_aca_enable()      (PR_PRPA &= (uint8_t)~(PR_AC_bm))
383#define power_aca_disable()     (PR_PRPA |= (uint8_t)PR_AC_bm)
384#define power_acb_enable()      (PR_PRPB &= (uint8_t)~(PR_AC_bm))
385#define power_acb_disable()     (PR_PRPB |= (uint8_t)PR_AC_bm)
386
387#define power_twic_enable()     (PR_PRPC &= (uint8_t)~(PR_TWI_bm))
388#define power_twic_disable()    (PR_PRPC |= (uint8_t)PR_TWI_bm)
389#define power_twid_enable()     (PR_PRPD &= (uint8_t)~(PR_TWI_bm))
390#define power_twid_disable()    (PR_PRPD |= (uint8_t)PR_TWI_bm)
391#define power_twie_enable()     (PR_PRPE &= (uint8_t)~(PR_TWI_bm))
392#define power_twie_disable()    (PR_PRPE |= (uint8_t)PR_TWI_bm)
393#define power_twif_enable()     (PR_PRPF &= (uint8_t)~(PR_TWI_bm))
394#define power_twif_disable()    (PR_PRPF |= (uint8_t)PR_TWI_bm)
395
396#define power_usartc1_enable()  (PR_PRPC &= (uint8_t)~(PR_USART1_bm))
397#define power_usartc1_disable() (PR_PRPC |= (uint8_t)PR_USART1_bm)
398#define power_usartd1_enable()  (PR_PRPD &= (uint8_t)~(PR_USART1_bm))
399#define power_usartd1_disable() (PR_PRPD |= (uint8_t)PR_USART1_bm)
400#define power_usarte1_enable()  (PR_PRPE &= (uint8_t)~(PR_USART1_bm))
401#define power_usarte1_disable() (PR_PRPE |= (uint8_t)PR_USART1_bm)
402#define power_usartf1_enable()  (PR_PRPF &= (uint8_t)~(PR_USART1_bm))
403#define power_usartf1_disable() (PR_PRPF |= (uint8_t)PR_USART1_bm)
404
405#define power_usartc0_enable()  (PR_PRPC &= (uint8_t)~(PR_USART0_bm))
406#define power_usartc0_disable() (PR_PRPC |= (uint8_t)PR_USART0_bm)
407#define power_usartd0_enable()  (PR_PRPD &= (uint8_t)~(PR_USART0_bm))
408#define power_usartd0_disable() (PR_PRPD |= (uint8_t)PR_USART0_bm)
409#define power_usarte0_enable()  (PR_PRPE &= (uint8_t)~(PR_USART0_bm))
410#define power_usarte0_disable() (PR_PRPE |= (uint8_t)PR_USART0_bm)
411#define power_usartf0_enable()  (PR_PRPF &= (uint8_t)~(PR_USART0_bm))
412#define power_usartf0_disable() (PR_PRPF |= (uint8_t)PR_USART0_bm)
413
414#define power_spic_enable()     (PR_PRPC &= (uint8_t)~(PR_SPI_bm))
415#define power_spic_disable()    (PR_PRPC |= (uint8_t)PR_SPI_bm)
416#define power_spid_enable()     (PR_PRPD &= (uint8_t)~(PR_SPI_bm))
417#define power_spid_disable()    (PR_PRPD |= (uint8_t)PR_SPI_bm)
418#define power_spie_enable()     (PR_PRPE &= (uint8_t)~(PR_SPI_bm))
419#define power_spie_disable()    (PR_PRPE |= (uint8_t)PR_SPI_bm)
420#define power_spif_enable()     (PR_PRPF &= (uint8_t)~(PR_SPI_bm))
421#define power_spif_disable()    (PR_PRPF |= (uint8_t)PR_SPI_bm)
422
423#define power_hiresc_enable()   (PR_PRPC &= (uint8_t)~(PR_HIRES_bm))
424#define power_hiresc_disable()  (PR_PRPC |= (uint8_t)PR_HIRES_bm)
425#define power_hiresd_enable()   (PR_PRPD &= (uint8_t)~(PR_HIRES_bm))
426#define power_hiresd_disable()  (PR_PRPD |= (uint8_t)PR_HIRES_bm)
427#define power_hirese_enable()   (PR_PRPE &= (uint8_t)~(PR_HIRES_bm))
428#define power_hirese_disable()  (PR_PRPE |= (uint8_t)PR_HIRES_bm)
429#define power_hiresf_enable()   (PR_PRPF &= (uint8_t)~(PR_HIRES_bm))
430#define power_hiresf_disable()  (PR_PRPF |= (uint8_t)PR_HIRES_bm)
431
432#define power_tc1c_enable()     (PR_PRPC &= (uint8_t)~(PR_TC1_bm))
433#define power_tc1c_disable()    (PR_PRPC |= (uint8_t)PR_TC1_bm)
434#define power_tc1d_enable()     (PR_PRPD &= (uint8_t)~(PR_TC1_bm))
435#define power_tc1d_disable()    (PR_PRPD |= (uint8_t)PR_TC1_bm)
436#define power_tc1e_enable()     (PR_PRPE &= (uint8_t)~(PR_TC1_bm))
437#define power_tc1e_disable()    (PR_PRPE |= (uint8_t)PR_TC1_bm)
438#define power_tc1f_enable()     (PR_PRPF &= (uint8_t)~(PR_TC1_bm))
439#define power_tc1f_disable()    (PR_PRPF |= (uint8_t)PR_TC1_bm)
440
441#define power_tc0c_enable()     (PR_PRPC &= (uint8_t)~(PR_TC0_bm))
442#define power_tc0c_disable()    (PR_PRPC |= (uint8_t)PR_TC0_bm)
443#define power_tc0d_enable()     (PR_PRPD &= (uint8_t)~(PR_TC0_bm))
444#define power_tc0d_disable()    (PR_PRPD |= (uint8_t)PR_TC0_bm)
445#define power_tc0e_enable()     (PR_PRPE &= (uint8_t)~(PR_TC0_bm))
446#define power_tc0e_disable()    (PR_PRPE |= (uint8_t)PR_TC0_bm)
447#define power_tc0f_enable()     (PR_PRPF &= (uint8_t)~(PR_TC0_bm))
448#define power_tc0f_disable()    (PR_PRPF |= (uint8_t)PR_TC0_bm)
449
450#define power_all_enable() \
451do { \
452    /* PR_PR &= (uint8_t)~(PR_AES_bm|PR_EBI_bm|PR_RTC_bm|PR_EVSYS_bm|PR_DMA_bm); */ \
453    PR_PR &= (uint8_t)~(PR_EBI_bm|PR_RTC_bm|PR_EVSYS_bm|PR_DMA_bm); \
454    PR_PRPA &= (uint8_t)~(PR_DAC_bm|PR_ADC_bm|PR_AC_bm); \
455    PR_PRPB &= (uint8_t)~(PR_DAC_bm|PR_ADC_bm|PR_AC_bm); \
456    PR_PRPC &= (uint8_t)~(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
457    PR_PRPD &= (uint8_t)~(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
458    PR_PRPE &= (uint8_t)~(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
459    PR_PRPF &= (uint8_t)~(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
460} while(0)
461
462
463#define power_all_disable() \
464do { \
465    /* PM_PR_PR |= (uint8_t)(PR_AES_bm|PR_EBI_bm|PR_RTC_bm|PR_EVSYS_bm|PR_DMA_bm); */ \
466    PR_PR |= (uint8_t)(PR_EBI_bm|PR_RTC_bm|PR_EVSYS_bm|PR_DMA_bm); \
467    PR_PRPA |= (uint8_t)(PR_DAC_bm|PR_ADC_bm|PR_AC_bm); \
468    PR_PRPB |= (uint8_t)(PR_DAC_bm|PR_ADC_bm|PR_AC_bm); \
469    PR_PRPC |= (uint8_t)(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
470    PR_PRPD |= (uint8_t)(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
471    PR_PRPE |= (uint8_t)(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
472    PR_PRPF |= (uint8_t)(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
473} while(0)
474
475
476#elif defined(__AVR_ATmega640__) \
477|| defined(__AVR_ATmega1280__) \
478|| defined(__AVR_ATmega1281__) \
479|| defined(__AVR_ATmega2560__) \
480|| defined(__AVR_ATmega2561__)
481
482#define power_adc_enable()      (PRR0 &= (uint8_t)~(1 << PRADC))
483#define power_adc_disable()     (PRR0 |= (uint8_t)(1 << PRADC))
484
485#define power_spi_enable()      (PRR0 &= (uint8_t)~(1 << PRSPI))
486#define power_spi_disable()     (PRR0 |= (uint8_t)(1 << PRSPI))
487
488#define power_twi_enable()      (PRR0 &= (uint8_t)~(1 << PRTWI))
489#define power_twi_disable()     (PRR0 |= (uint8_t)(1 << PRTWI))
490
491#define power_timer0_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM0))
492#define power_timer0_disable()  (PRR0 |= (uint8_t)(1 << PRTIM0))
493
494#define power_timer1_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM1))
495#define power_timer1_disable()  (PRR0 |= (uint8_t)(1 << PRTIM1))
496
497#define power_timer2_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM2))
498#define power_timer2_disable()  (PRR0 |= (uint8_t)(1 << PRTIM2))
499
500#define power_timer3_enable()   (PRR1 &= (uint8_t)~(1 << PRTIM3))
501#define power_timer3_disable()  (PRR1 |= (uint8_t)(1 << PRTIM3))
502
503#define power_timer4_enable()   (PRR1 &= (uint8_t)~(1 << PRTIM4))
504#define power_timer4_disable()  (PRR1 |= (uint8_t)(1 << PRTIM4))
505
506#define power_timer5_enable()   (PRR1 &= (uint8_t)~(1 << PRTIM5))
507#define power_timer5_disable()  (PRR1 |= (uint8_t)(1 << PRTIM5))
508
509#define power_usart0_enable()   (PRR0 &= (uint8_t)~(1 << PRUSART0))
510#define power_usart0_disable()  (PRR0 |= (uint8_t)(1 << PRUSART0))
511
512#define power_usart1_enable()   (PRR1 &= (uint8_t)~(1 << PRUSART1))
513#define power_usart1_disable()  (PRR1 |= (uint8_t)(1 << PRUSART1))
514
515#define power_usart2_enable()   (PRR1 &= (uint8_t)~(1 << PRUSART2))
516#define power_usart2_disable()  (PRR1 |= (uint8_t)(1 << PRUSART2))
517
518#define power_usart3_enable()   (PRR1 &= (uint8_t)~(1 << PRUSART3))
519#define power_usart3_disable()  (PRR1 |= (uint8_t)(1 << PRUSART3))
520
521#define power_all_enable() \
522do{ \
523    PRR0 &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRUSART0)); \
524    PRR1 &= (uint8_t)~((1<<PRTIM3)|(1<<PRTIM4)|(1<<PRTIM5)|(1<<PRTIM5)|(1<<PRUSART1)|(1<<PRUSART2)|(1<<PRUSART3)); \
525}while(0)
526
527#define power_all_disable() \
528do{ \
529    PRR0 |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRUSART0)); \
530    PRR1 |= (uint8_t)((1<<PRTIM3)|(1<<PRTIM4)|(1<<PRTIM5)|(1<<PRTIM5)|(1<<PRUSART1)|(1<<PRUSART2)|(1<<PRUSART3)); \
531}while(0)
532
533
534#elif defined(__AVR_ATmega128RFA1__)
535
536#define power_adc_enable()      (PRR0 &= (uint8_t)~(1 << PRADC))
537#define power_adc_disable()     (PRR0 |= (uint8_t)(1 << PRADC))
538
539#define power_spi_enable()      (PRR0 &= (uint8_t)~(1 << PRSPI))
540#define power_spi_disable()     (PRR0 |= (uint8_t)(1 << PRSPI))
541
542#define power_twi_enable()      (PRR0 &= (uint8_t)~(1 << PRTWI))
543#define power_twi_disable()     (PRR0 |= (uint8_t)(1 << PRTWI))
544
545#define power_timer0_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM0))
546#define power_timer0_disable()  (PRR0 |= (uint8_t)(1 << PRTIM0))
547
548#define power_timer1_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM1))
549#define power_timer1_disable()  (PRR0 |= (uint8_t)(1 << PRTIM1))
550
551#define power_timer2_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM2))
552#define power_timer2_disable()  (PRR0 |= (uint8_t)(1 << PRTIM2))
553
554#define power_timer3_enable()   (PRR1 &= (uint8_t)~(1 << PRTIM3))
555#define power_timer3_disable()  (PRR1 |= (uint8_t)(1 << PRTIM3))
556
557#define power_timer4_enable()   (PRR1 &= (uint8_t)~(1 << PRTIM4))
558#define power_timer4_disable()  (PRR1 |= (uint8_t)(1 << PRTIM4))
559
560#define power_timer5_enable()   (PRR1 &= (uint8_t)~(1 << PRTIM5))
561#define power_timer5_disable()  (PRR1 |= (uint8_t)(1 << PRTIM5))
562
563#define power_usart0_enable()   (PRR0 &= (uint8_t)~(1 << PRUSART0))
564#define power_usart0_disable()  (PRR0 |= (uint8_t)(1 << PRUSART0))
565
566#define power_usart1_enable()   (PRR1 &= (uint8_t)~(1 << PRUSART1))
567#define power_usart1_disable()  (PRR1 |= (uint8_t)(1 << PRUSART1))
568
569#define power_all_enable() \
570do{ \
571    PRR0 &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRUSART0)); \
572    PRR1 &= (uint8_t)~((1<<PRTIM3)|(1<<PRTIM4)|(1<<PRTIM5)|(1<<PRTIM5)|(1<<PRUSART1)); \
573}while(0)
574
575#define power_all_disable() \
576do{ \
577    PRR0 |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRUSART0)); \
578    PRR1 |= (uint8_t)((1<<PRTIM3)|(1<<PRTIM4)|(1<<PRTIM5)|(1<<PRTIM5)|(1<<PRUSART1)); \
579}while(0)
580
581
582#elif defined(__AVR_AT90USB646__) \
583|| defined(__AVR_AT90USB647__) \
584|| defined(__AVR_AT90USB1286__) \
585|| defined(__AVR_AT90USB1287__)
586
587#define power_adc_enable()      (PRR0 &= (uint8_t)~(1 << PRADC))
588#define power_adc_disable()     (PRR0 |= (uint8_t)(1 << PRADC))
589
590#define power_spi_enable()      (PRR0 &= (uint8_t)~(1 << PRSPI))
591#define power_spi_disable()     (PRR0 |= (uint8_t)(1 << PRSPI))
592
593#define power_twi_enable()      (PRR0 &= (uint8_t)~(1 << PRTWI))
594#define power_twi_disable()     (PRR0 |= (uint8_t)(1 << PRTWI))
595
596#define power_timer0_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM0))
597#define power_timer0_disable()  (PRR0 |= (uint8_t)(1 << PRTIM0))
598
599#define power_timer1_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM1))
600#define power_timer1_disable()  (PRR0 |= (uint8_t)(1 << PRTIM1))
601
602#define power_timer2_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM2))
603#define power_timer2_disable()  (PRR0 |= (uint8_t)(1 << PRTIM2))
604
605#define power_timer3_enable()   (PRR1 &= (uint8_t)~(1 << PRTIM3))
606#define power_timer3_disable()  (PRR1 |= (uint8_t)(1 << PRTIM3))
607
608#define power_usart1_enable()   (PRR1 &= (uint8_t)~(1 << PRUSART1))
609#define power_usart1_disable()  (PRR1 |= (uint8_t)(1 << PRUSART1))
610
611#define power_usb_enable()      (PRR1 &= (uint8_t)~(1 << PRUSB))
612#define power_usb_disable()     (PRR1 |= (uint8_t)(1 << PRUSB))
613
614#define power_all_enable() \
615do{ \
616    PRR0 &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)); \
617    PRR1 &= (uint8_t)~((1<<PRTIM3)|(1<<PRUSART1)|(1<<PRUSB)); \
618}while(0)
619
620#define power_all_disable() \
621do{ \
622    PRR0 |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)); \
623    PRR1 |= (uint8_t)((1<<PRTIM3)|(1<<PRUSART1)|(1<<PRUSB)); \
624}while(0)
625
626
627#elif defined(__AVR_ATmega32U4__) \
628defined(__AVR_ATmega16U4__)
629
630
631#define power_adc_enable()      (PRR0 &= (uint8_t)~(1 << PRADC))
632#define power_adc_disable()     (PRR0 |= (uint8_t)(1 << PRADC))
633
634#define power_usart0_enable()   (PRR0 &= (uint8_t)~(1 << PRUSART0))
635#define power_usart0_disable()  (PRR0 |= (uint8_t)(1 << PRUSART0))
636
637#define power_spi_enable()      (PRR0 &= (uint8_t)~(1 << PRSPI))
638#define power_spi_disable()     (PRR0 |= (uint8_t)(1 << PRSPI))
639
640#define power_twi_enable()      (PRR0 &= (uint8_t)~(1 << PRTWI))
641#define power_twi_disable()     (PRR0 |= (uint8_t)(1 << PRTWI))
642
643#define power_timer0_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM0))
644#define power_timer0_disable()  (PRR0 |= (uint8_t)(1 << PRTIM0))
645
646#define power_timer1_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM1))
647#define power_timer1_disable()  (PRR0 |= (uint8_t)(1 << PRTIM1))
648
649#define power_timer2_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM2))
650#define power_timer2_disable()  (PRR0 |= (uint8_t)(1 << PRTIM2))
651
652#define power_timer3_enable()   (PRR1 &= (uint8_t)~(1 << PRTIM3))
653#define power_timer3_disable()  (PRR1 |= (uint8_t)(1 << PRTIM3))
654
655#define power_usart1_enable()   (PRR1 &= (uint8_t)~(1 << PRUSART1))
656#define power_usart1_disable()  (PRR1 |= (uint8_t)(1 << PRUSART1))
657
658#define power_usb_enable()      (PRR1 &= (uint8_t)~(1 << PRUSB))
659#define power_usb_disable()     (PRR1 |= (uint8_t)(1 << PRUSB))
660
661#define power_all_enable() \
662do{ \
663    PRR0 &= (uint8_t)~((1<<PRADC)|(1<<PRUSART0)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)); \
664    PRR1 &= (uint8_t)~((1<<PRTIM3)|(1<<PRUSART1)|(1<<PRUSB)); \
665}while(0)
666
667#define power_all_disable() \
668do{ \
669    PRR0 |= (uint8_t)((1<<PRADC)|(1<<PRUSART0)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)); \
670    PRR1 |= (uint8_t)((1<<PRTIM3)|(1<<PRUSART1)|(1<<PRUSB)); \
671}while(0)
672
673
674#elif defined(__AVR_ATmega32U6__)
675
676
677#define power_adc_enable()      (PRR0 &= (uint8_t)~(1 << PRADC))
678#define power_adc_disable()     (PRR0 |= (uint8_t)(1 << PRADC))
679
680#define power_spi_enable()      (PRR0 &= (uint8_t)~(1 << PRSPI))
681#define power_spi_disable()     (PRR0 |= (uint8_t)(1 << PRSPI))
682
683#define power_twi_enable()      (PRR0 &= (uint8_t)~(1 << PRTWI))
684#define power_twi_disable()     (PRR0 |= (uint8_t)(1 << PRTWI))
685
686#define power_timer0_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM0))
687#define power_timer0_disable()  (PRR0 |= (uint8_t)(1 << PRTIM0))
688
689#define power_timer1_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM1))
690#define power_timer1_disable()  (PRR0 |= (uint8_t)(1 << PRTIM1))
691
692#define power_timer2_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM2))
693#define power_timer2_disable()  (PRR0 |= (uint8_t)(1 << PRTIM2))
694
695#define power_timer3_enable()   (PRR1 &= (uint8_t)~(1 << PRTIM3))
696#define power_timer3_disable()  (PRR1 |= (uint8_t)(1 << PRTIM3))
697
698#define power_usart1_enable()   (PRR1 &= (uint8_t)~(1 << PRUSART1))
699#define power_usart1_disable()  (PRR1 |= (uint8_t)(1 << PRUSART1))
700
701#define power_usb_enable()      (PRR1 &= (uint8_t)~(1 << PRUSB))
702#define power_usb_disable()     (PRR1 |= (uint8_t)(1 << PRUSB))
703
704#define power_all_enable() \
705do{ \
706    PRR0 &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)); \
707    PRR1 &= (uint8_t)~((1<<PRTIM3)|(1<<PRUSART1)|(1<<PRUSB)); \
708}while(0)
709
710#define power_all_disable() \
711do{ \
712    PRR0 |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)); \
713    PRR1 |= (uint8_t)((1<<PRTIM3)|(1<<PRUSART1)|(1<<PRUSB)); \
714}while(0)
715
716
717#elif defined(__AVR_AT90PWM1__)
718
719#define power_adc_enable()      (PRR &= (uint8_t)~(1 << PRADC))
720#define power_adc_disable()     (PRR |= (uint8_t)(1 << PRADC))
721
722#define power_spi_enable()      (PRR &= (uint8_t)~(1 << PRSPI))
723#define power_spi_disable()     (PRR |= (uint8_t)(1 << PRSPI))
724
725#define power_timer0_enable()   (PRR &= (uint8_t)~(1 << PRTIM0))
726#define power_timer0_disable()  (PRR |= (uint8_t)(1 << PRTIM0))
727
728#define power_timer1_enable()   (PRR &= (uint8_t)~(1 << PRTIM1))
729#define power_timer1_disable()  (PRR |= (uint8_t)(1 << PRTIM1))
730
731/* Power Stage Controller 0 */
732#define power_psc0_enable()     (PRR &= (uint8_t)~(1 << PRPSC0))
733#define power_psc0_disable()    (PRR |= (uint8_t)(1 << PRPSC0))
734
735/* Power Stage Controller 1 */
736#define power_psc1_enable()     (PRR &= (uint8_t)~(1 << PRPSC1))
737#define power_psc1_disable()    (PRR |= (uint8_t)(1 << PRPSC1))
738
739/* Power Stage Controller 2 */
740#define power_psc2_enable()     (PRR &= (uint8_t)~(1 << PRPSC2))
741#define power_psc2_disable()    (PRR |= (uint8_t)(1 << PRPSC2))
742
743#define power_all_enable()      (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRPSC0)|(1<<PRPSC1)|(1<<PRPSC2)))
744#define power_all_disable()     (PRR |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRPSC0)|(1<<PRPSC1)|(1<<PRPSC2)))
745
746
747#elif defined(__AVR_AT90PWM2__) \
748|| defined(__AVR_AT90PWM2B__) \
749|| defined(__AVR_AT90PWM3__) \
750|| defined(__AVR_AT90PWM3B__) \
751|| defined(__AVR_AT90PWM216__) \
752|| defined(__AVR_AT90PWM316__)
753
754#define power_adc_enable()      (PRR &= (uint8_t)~(1 << PRADC))
755#define power_adc_disable()     (PRR |= (uint8_t)(1 << PRADC))
756
757#define power_spi_enable()      (PRR &= (uint8_t)~(1 << PRSPI))
758#define power_spi_disable()     (PRR |= (uint8_t)(1 << PRSPI))
759
760#define power_usart_enable()    (PRR &= (uint8_t)~(1 << PRUSART))
761#define power_usart_disable()   (PRR |= (uint8_t)(1 << PRUSART))
762
763#define power_timer0_enable()   (PRR &= (uint8_t)~(1 << PRTIM0))
764#define power_timer0_disable()  (PRR |= (uint8_t)(1 << PRTIM0))
765
766#define power_timer1_enable()   (PRR &= (uint8_t)~(1 << PRTIM1))
767#define power_timer1_disable()  (PRR |= (uint8_t)(1 << PRTIM1))
768
769/* Power Stage Controller 0 */
770#define power_psc0_enable()     (PRR &= (uint8_t)~(1 << PRPSC0))
771#define power_psc0_disable()    (PRR |= (uint8_t)(1 << PRPSC0))
772
773/* Power Stage Controller 1 */
774#define power_psc1_enable()     (PRR &= (uint8_t)~(1 << PRPSC1))
775#define power_psc1_disable()    (PRR |= (uint8_t)(1 << PRPSC1))
776
777/* Power Stage Controller 2 */
778#define power_psc2_enable()     (PRR &= (uint8_t)~(1 << PRPSC2))
779#define power_psc2_disable()    (PRR |= (uint8_t)(1 << PRPSC2))
780
781#define power_all_enable()      (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRPSC0)|(1<<PRPSC1)|(1<<PRPSC2)))
782#define power_all_disable()     (PRR |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRPSC0)|(1<<PRPSC1)|(1<<PRPSC2)))
783
784
785#elif defined(__AVR_AT90PWM81__)
786
787#define power_adc_enable()      (PRR &= (uint8_t)~(1 << PRADC))
788#define power_adc_disable()     (PRR |= (uint8_t)(1 << PRADC))
789
790#define power_spi_enable()      (PRR &= (uint8_t)~(1 << PRSPI))
791#define power_spi_disable()     (PRR |= (uint8_t)(1 << PRSPI))
792
793#define power_timer1_enable()   (PRR &= (uint8_t)~(1 << PRTIM1))
794#define power_timer1_disable()  (PRR |= (uint8_t)(1 << PRTIM1))
795
796/* Power Stage Controller 0 */
797#define power_psc0_enable()     (PRR &= (uint8_t)~(1 << PRPSC0))
798#define power_psc0_disable()    (PRR |= (uint8_t)(1 << PRPSC0))
799
800/* Power Stage Controller 2 */
801#define power_psc2_enable()     (PRR &= (uint8_t)~(1 << PRPSC2))
802#define power_psc2_disable()    (PRR |= (uint8_t)(1 << PRPSC2))
803
804#define power_all_enable()      (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRTIM1)|(1<<PRPSC0)|(1<<PRPSC2)))
805#define power_all_disable()     (PRR |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRTIM1)|(1<<PRPSC0)|(1<<PRPSC2)))
806
807
808#elif defined(__AVR_ATmega165__) \
809|| defined(__AVR_ATmega165P__) \
810|| defined(__AVR_ATmega325__) \
811|| defined(__AVR_ATmega3250__) \
812|| defined(__AVR_ATmega645__) \
813|| defined(__AVR_ATmega6450__)
814
815#define power_adc_enable()      (PRR &= (uint8_t)~(1 << PRADC))
816#define power_adc_disable()     (PRR |= (uint8_t)(1 << PRADC))
817
818#define power_spi_enable()      (PRR &= (uint8_t)~(1 << PRSPI))
819#define power_spi_disable()     (PRR |= (uint8_t)(1 << PRSPI))
820
821#define power_usart0_enable()   (PRR &= (uint8_t)~(1 << PRUSART0))
822#define power_usart0_disable()  (PRR |= (uint8_t)(1 << PRUSART0))
823
824#define power_timer1_enable()   (PRR &= (uint8_t)~(1 << PRTIM1))
825#define power_timer1_disable()  (PRR |= (uint8_t)(1 << PRTIM1))
826
827#define power_all_enable()      (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM1)))
828#define power_all_disable()     (PRR |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM1)))
829
830
831#elif defined(__AVR_ATmega169__) \
832|| defined(__AVR_ATmega169P__) \
833|| defined(__AVR_ATmega329__) \
834|| defined(__AVR_ATmega329P__) \
835|| defined(__AVR_ATmega3290__) \
836|| defined(__AVR_ATmega3290P__) \
837|| defined(__AVR_ATmega649__) \
838|| defined(__AVR_ATmega6490__)
839
840#define power_adc_enable()      (PRR &= (uint8_t)~(1 << PRADC))
841#define power_adc_disable()     (PRR |= (uint8_t)(1 << PRADC))
842
843#define power_spi_enable()      (PRR &= (uint8_t)~(1 << PRSPI))
844#define power_spi_disable()     (PRR |= (uint8_t)(1 << PRSPI))
845
846#define power_usart0_enable()   (PRR &= (uint8_t)~(1 << PRUSART0))
847#define power_usart0_disable()  (PRR |= (uint8_t)(1 << PRUSART0))
848
849#define power_timer1_enable()   (PRR &= (uint8_t)~(1 << PRTIM1))
850#define power_timer1_disable()  (PRR |= (uint8_t)(1 << PRTIM1))
851
852#define power_lcd_enable()      (PRR &= (uint8_t)~(1 << PRLCD))
853#define power_lcd_disable()     (PRR |= (uint8_t)(1 << PRLCD))
854
855#define power_all_enable()      (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM1)|(1<<PRLCD)))
856#define power_all_disable()     (PRR |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM1)|(1<<PRLCD)))
857
858
859#elif defined(__AVR_ATmega164P__) \
860|| defined(__AVR_ATmega324P__)
861
862#define power_adc_enable()      (PRR0 &= (uint8_t)~(1 << PRADC))
863#define power_adc_disable()     (PRR0 |= (uint8_t)(1 << PRADC))
864
865#define power_spi_enable()      (PRR0 &= (uint8_t)~(1 << PRSPI))
866#define power_spi_disable()     (PRR0 |= (uint8_t)(1 << PRSPI))
867
868#define power_usart0_enable()   (PRR0 &= (uint8_t)~(1 << PRUSART0))
869#define power_usart0_disable()  (PRR0 |= (uint8_t)(1 << PRUSART0))
870
871#define power_usart1_enable()   (PRR0 &= (uint8_t)~(1 << PRUSART1))
872#define power_usart1_disable()  (PRR0 |= (uint8_t)(1 << PRUSART1))
873
874#define power_timer0_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM0))
875#define power_timer0_disable()  (PRR0 |= (uint8_t)(1 << PRTIM0))
876
877#define power_timer1_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM1))
878#define power_timer1_disable()  (PRR0 |= (uint8_t)(1 << PRTIM1))
879
880#define power_timer2_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM2))
881#define power_timer2_disable()  (PRR0 |= (uint8_t)(1 << PRTIM2))
882
883#define power_twi_enable()      (PRR0 &= (uint8_t)~(1 << PRTWI))
884#define power_twi_disable()     (PRR0 |= (uint8_t)(1 << PRTWI))
885
886#define power_all_enable()      (PRR0 &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRUSART1)|(1<<PRTIM0)|(1<<PRTIM2)|(1<<PRTWI)))
887#define power_all_disable()     (PRR0 |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRUSART1)|(1<<PRTIM0)|(1<<PRTIM2)|(1<<PRTWI)))
888
889
890#elif defined(__AVR_ATmega644__) \
891|| defined(__AVR_ATmega644P__)
892
893#define power_adc_enable()      (PRR0 &= (uint8_t)~(1 << PRADC))
894#define power_adc_disable()     (PRR0 |= (uint8_t)(1 << PRADC))
895
896#define power_spi_enable()      (PRR0 &= (uint8_t)~(1 << PRSPI))
897#define power_spi_disable()     (PRR0 |= (uint8_t)(1 << PRSPI))
898
899#define power_usart0_enable()   (PRR0 &= (uint8_t)~(1 << PRUSART0))
900#define power_usart0_disable()  (PRR0 |= (uint8_t)(1 << PRUSART0))
901
902#define power_timer0_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM0))
903#define power_timer0_disable()  (PRR0 |= (uint8_t)(1 << PRTIM0))
904
905#define power_timer1_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM1))
906#define power_timer1_disable()  (PRR0 |= (uint8_t)(1 << PRTIM1))
907
908#define power_timer2_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM2))
909#define power_timer2_disable()  (PRR0 |= (uint8_t)(1 << PRTIM2))
910
911#define power_twi_enable()      (PRR0 &= (uint8_t)~(1 << PRTWI))
912#define power_twi_disable()     (PRR0 |= (uint8_t)(1 << PRTWI))
913
914#define power_all_enable()      (PRR0 &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRTWI)))
915#define power_all_disable()     (PRR0 |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRTWI)))
916
917
918#elif defined(__AVR_ATmega406__)
919
920#define power_twi_enable()      (PRR0 &= (uint8_t)~(1 << PRTWI))
921#define power_twi_disable()     (PRR0 |= (uint8_t)(1 << PRTWI))
922
923#define power_timer0_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM0))
924#define power_timer0_disable()  (PRR0 |= (uint8_t)(1 << PRTIM0))
925
926#define power_timer1_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM1))
927#define power_timer1_disable()  (PRR0 |= (uint8_t)(1 << PRTIM1))
928
929/* Voltage ADC */
930#define power_vadc_enable()     (PRR0 &= (uint8_t)~(1 << PRVADC))
931#define power_vadc_disable()    (PRR0 |= (uint8_t)(1 << PRVADC))
932
933#define power_all_enable()      (PRR0 &= (uint8_t)~((1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRVADC)))
934#define power_all_disable()     (PRR0 |= (uint8_t)((1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRVADC)))
935
936
937#elif defined(__AVR_ATmega48__) \
938|| defined(__AVR_ATmega48P__) \
939|| defined(__AVR_ATmega88__) \
940|| defined(__AVR_ATmega88P__) \
941|| defined(__AVR_ATmega168__) \
942|| defined(__AVR_ATmega168P__) \
943|| defined(__AVR_ATmega328P__) \
944|| defined(__AVR_ATtiny48__) \
945|| defined(__AVR_ATtiny88__)
946
947#define power_adc_enable()      (PRR &= (uint8_t)~(1 << PRADC))
948#define power_adc_disable()     (PRR |= (uint8_t)(1 << PRADC))
949
950#define power_spi_enable()      (PRR &= (uint8_t)~(1 << PRSPI))
951#define power_spi_disable()     (PRR |= (uint8_t)(1 << PRSPI))
952
953#define power_usart0_enable()   (PRR &= (uint8_t)~(1 << PRUSART0))
954#define power_usart0_disable()  (PRR |= (uint8_t)(1 << PRUSART0))
955
956#define power_timer0_enable()   (PRR &= (uint8_t)~(1 << PRTIM0))
957#define power_timer0_disable()  (PRR |= (uint8_t)(1 << PRTIM0))
958
959#define power_timer1_enable()   (PRR &= (uint8_t)~(1 << PRTIM1))
960#define power_timer1_disable()  (PRR |= (uint8_t)(1 << PRTIM1))
961
962#define power_timer2_enable()   (PRR &= (uint8_t)~(1 << PRTIM2))
963#define power_timer2_disable()  (PRR |= (uint8_t)(1 << PRTIM2))
964
965#define power_twi_enable()      (PRR &= (uint8_t)~(1 << PRTWI))
966#define power_twi_disable()     (PRR |= (uint8_t)(1 << PRTWI))
967
968#define power_all_enable()      (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRTWI)))
969#define power_all_disable()     (PRR |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRTWI)))
970
971
972#elif defined(__AVR_ATtiny24__) \
973|| defined(__AVR_ATtiny44__) \
974|| defined(__AVR_ATtiny84__) \
975|| defined(__AVR_ATtiny25__) \
976|| defined(__AVR_ATtiny45__) \
977|| defined(__AVR_ATtiny85__) \
978|| defined(__AVR_ATtiny261__) \
979|| defined(__AVR_ATtiny461__) \
980|| defined(__AVR_ATtiny861__) \
981|| defined(__AVR_ATtiny43U__)
982
983#define power_adc_enable()      (PRR &= (uint8_t)~(1 << PRADC))
984#define power_adc_disable()     (PRR |= (uint8_t)(1 << PRADC))
985
986#define power_timer0_enable()   (PRR &= (uint8_t)~(1 << PRTIM0))
987#define power_timer0_disable()  (PRR |= (uint8_t)(1 << PRTIM0))
988
989#define power_timer1_enable()   (PRR &= (uint8_t)~(1 << PRTIM1))
990#define power_timer1_disable()  (PRR |= (uint8_t)(1 << PRTIM1))
991
992/* Universal Serial Interface */
993#define power_usi_enable()      (PRR &= (uint8_t)~(1 << PRUSI))
994#define power_usi_disable()     (PRR |= (uint8_t)(1 << PRUSI))
995
996#define power_all_enable()      (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRUSI)))
997#define power_all_disable()     (PRR |= (uint8_t)((1<<PRADC)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRUSI)))
998
999
1000#elif defined(__AVR_ATmega1284P__)
1001
1002
1003#define power_adc_enable()      (PRR0 &= (uint8_t)~(1 << PRADC))
1004#define power_adc_disable()     (PRR0 |= (uint8_t)(1 << PRADC))
1005
1006#define power_spi_enable()      (PRR0 &= (uint8_t)~(1 << PRSPI))
1007#define power_spi_disable()     (PRR0 |= (uint8_t)(1 << PRSPI))
1008
1009#define power_twi_enable()      (PRR0 &= (uint8_t)~(1 << PRTWI))
1010#define power_twi_disable()     (PRR0 |= (uint8_t)(1 << PRTWI))
1011
1012#define power_timer0_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM0))
1013#define power_timer0_disable()  (PRR0 |= (uint8_t)(1 << PRTIM0))
1014
1015#define power_timer1_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM1))
1016#define power_timer1_disable()  (PRR0 |= (uint8_t)(1 << PRTIM1))
1017
1018#define power_timer2_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM2))
1019#define power_timer2_disable()  (PRR0 |= (uint8_t)(1 << PRTIM2))
1020
1021#define power_timer3_enable()   (PRR1 &= (uint8_t)~(1 << PRTIM3))
1022#define power_timer3_disable()  (PRR1 |= (uint8_t)(1 << PRTIM3))
1023
1024#define power_usart0_enable()   (PRR0 &= (uint8_t)~(1 << PRUSART0))
1025#define power_usart0_disable()  (PRR0 |= (uint8_t)(1 << PRUSART0))
1026
1027#define power_usart1_enable()   (PRR0 &= (uint8_t)~(1 << PRUSART1))
1028#define power_usart1_disable()  (PRR0 |= (uint8_t)(1 << PRUSART1))
1029
1030#define power_all_enable() \
1031do{ \
1032    PRR0 &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRUSART0)|(1<<PRUSART1)); \
1033    PRR1 &= (uint8_t)~(1<<PRTIM3); \
1034}while(0)
1035
1036#define power_all_disable() \
1037do{ \
1038    PRR0 |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRUSART0)|(1<<PRUSART1)); \
1039    PRR1 |= (uint8_t)(1<<PRTIM3); \
1040}while(0)
1041
1042
1043#elif defined(__AVR_ATmega32HVB__)
1044
1045
1046#define power_twi_enable()      (PRR0 &= (uint8_t)~(1 << PRTWI))
1047#define power_twi_disable()     (PRR0 |= (uint8_t)(1 << PRTWI))
1048
1049#define power_timer0_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM0))
1050#define power_timer0_disable()  (PRR0 |= (uint8_t)(1 << PRTIM0))
1051
1052#define power_timer1_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM1))
1053#define power_timer1_disable()  (PRR0 |= (uint8_t)(1 << PRTIM1))
1054
1055/* Voltage ADC */
1056#define power_vadc_enable()     (PRR0 &= (uint8_t)~(1 << PRVADC))
1057#define power_vadc_disable()    (PRR0 |= (uint8_t)(1 << PRVADC))
1058
1059#define power_spi_enable()      (PRR0 &= (uint8_t)~(1 << PRSPI))
1060#define power_spi_disable()     (PRR0 |= (uint8_t)(1 << PRSPI))
1061
1062#define power_vrm_enable()      (PRR0 &= (uint8_t)~(1 << PRVRM))
1063#define power_vrm_disable()     (PRR0 |= (uint8_t)(1 << PRVRM))
1064
1065#define power_all_enable()      (PRR0 &= (uint8_t)~((1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRVADC)|(1<<PRSPI)|(1<<PRVRM)))
1066#define power_all_disable()     (PRR0 |= (uint8_t)((1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRVADC)|(1<<PRSPI)|(1<<PRVRM)))
1067
1068
1069#elif defined(__AVR_ATmega16M1__) \
1070|| defined(__AVR_ATmega32C1__) \
1071|| defined(__AVR_ATmega32M1__) \
1072|| defined(__AVR_ATmega64C1__) \
1073|| defined(__AVR_ATmega64M1__)
1074
1075#define power_adc_enable()      (PRR &= (uint8_t)~(1 << PRADC))
1076#define power_adc_disable()     (PRR |= (uint8_t)(1 << PRADC))
1077
1078#define power_lin_enable()      (PRR &= (uint8_t)~(1 << PRLIN))
1079#define power_lin_disable()     (PRR |= (uint8_t)(1 << PRLIN))
1080
1081#define power_spi_enable()      (PRR &= (uint8_t)~(1 << PRSPI))
1082#define power_spi_disable()     (PRR |= (uint8_t)(1 << PRSPI))
1083
1084#define power_timer0_enable()   (PRR &= (uint8_t)~(1 << PRTIM0))
1085#define power_timer0_disable()  (PRR |= (uint8_t)(1 << PRTIM0))
1086
1087#define power_timer1_enable()   (PRR &= (uint8_t)~(1 << PRTIM1))
1088#define power_timer1_disable()  (PRR |= (uint8_t)(1 << PRTIM1))
1089
1090#define power_psc_enable()      (PRR &= (uint8_t)~(1 << PRPSC))
1091#define power_psc_disable()     (PRR |= (uint8_t)(1 << PRPSC))
1092
1093#define power_can_enable()      (PRR &= (uint8_t)~(1 << PRCAN))
1094#define power_can_disable()     (PRR |= (uint8_t)(1 << PRCAN))
1095
1096#define power_all_enable()      (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRLIN)|(1<<PRSPI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRPSC)|(1<<PRCAN)))
1097#define power_all_disable()     (PRR |= (uint8_t)((1<<PRADC)|(1<<PRLIN)|(1<<PRSPI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRPSC)|(1<<PRCAN)))
1098
1099
1100#elif defined(__AVR_ATtiny167__) \
1101|| defined(__AVR_ATtiny87__)
1102
1103
1104#define power_adc_enable()      (PRR &= (uint8_t)~(1 << PRADC))
1105#define power_adc_disable()     (PRR |= (uint8_t)(1 << PRADC))
1106
1107#define power_usi_enable()      (PRR &= (uint8_t)~(1 << PRUSI))
1108#define power_usi_disable()     (PRR |= (uint8_t)(1 << PRUSI))
1109
1110#define power_timer0_enable()   (PRR &= (uint8_t)~(1 << PRTIM0))
1111#define power_timer0_disable()  (PRR |= (uint8_t)(1 << PRTIM0))
1112
1113#define power_timer1_enable()   (PRR &= (uint8_t)~(1 << PRTIM1))
1114#define power_timer1_disable()  (PRR |= (uint8_t)(1 << PRTIM1))
1115
1116#define power_spi_enable()      (PRR &= (uint8_t)~(1 << PRSPI))
1117#define power_spi_disable()     (PRR |= (uint8_t)(1 << PRSPI))
1118
1119#define power_lin_enable()      (PRR &= (uint8_t)~(1 << PRLIN))
1120#define power_lin_disable()     (PRR |= (uint8_t)(1 << PRLIN))
1121
1122#define power_all_enable()      (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRUSI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRSPI)|(1<<PRLIN)))
1123#define power_all_disable()     (PRR |= (uint8_t)((1<<PRADC)|(1<<PRUSI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRSPI)|(1<<PRLIN)))
1124
1125
1126#elif defined(__AVR_AT90USB82__) \
1127|| defined(__AVR_AT90USB162__)
1128
1129
1130#define power_spi_enable()      (PRR0 &= (uint8_t)~(1 << PRSPI))
1131#define power_spi_disable()     (PRR0 |= (uint8_t)(1 << PRSPI))
1132
1133#define power_timer0_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM0))
1134#define power_timer0_disable()  (PRR0 |= (uint8_t)(1 << PRTIM0))
1135
1136#define power_timer1_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM1))
1137#define power_timer2_disable()  (PRR0 |= (uint8_t)(1 << PRTIM1))
1138
1139#define power_usb_enable()      (PRR1 &= (uint8_t)~(1 << PRUSB))
1140#define power_usb_disable()     (PRR1 |= (uint8_t)(1 << PRUSB))
1141
1142#define power_usart1_enable()   (PRR1 &= (uint8_t)~(1 << PRUSART1))
1143#define power_usart1_disable()  (PRR1 |= (uint8_t)(1 << PRUSART1))
1144
1145#define power_all_enable() \
1146do{ \
1147    PRR0 &= (uint8_t)~((1<<PRSPI)|(1<<PRTIM0)|(1<<PRTIM1)); \
1148    PRR1 &= (uint8_t)~((1<<PRUSB)|(1<<PRUSART1)); \
1149}while(0)
1150
1151#define power_all_disable() \
1152do{ \
1153    PRR0 |= (uint8_t)((1<<PRSPI)|(1<<PRTIM0)|(1<<PRTIM1)); \
1154    PRR1 |= (uint8_t)((1<<PRUSB)|(1<<PRUSART1)); \
1155}while(0)
1156
1157
1158#elif defined(__AVR_AT90SCR100__)
1159
1160#define power_usart0_enable()   (PRR0 &= (uint8_t)~(1 << PRUSART0))
1161#define power_usart0_disable()  (PRR0 |= (uint8_t)(1 << PRUSART0))
1162
1163#define power_spi_enable()      (PRR0 &= (uint8_t)~(1 << PRSPI))
1164#define power_spi_disable()     (PRR0 |= (uint8_t)(1 << PRSPI))
1165
1166#define power_timer1_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM1))
1167#define power_timer1_disable()  (PRR0 |= (uint8_t)(1 << PRTIM1))
1168
1169#define power_timer0_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM0))
1170#define power_timer0_disable()  (PRR0 |= (uint8_t)(1 << PRTIM0))
1171
1172#define power_timer2_enable()   (PRR0 &= (uint8_t)~(1 << PRTIM2))
1173#define power_timer2_disable()  (PRR0 |= (uint8_t)(1 << PRTIM2))
1174
1175#define power_twi_enable()      (PRR0 &= (uint8_t)~(1 << PRTWI))
1176#define power_twi_disable()     (PRR0 |= (uint8_t)(1 << PRTWI))
1177
1178#define power_usbh_enable()     (PRR1 &= (uint8_t)~(1 << PRUSBH))
1179#define power_usbh_disable()    (PRR1 |= (uint8_t)(1 << PRUSBH))
1180
1181#define power_usb_enable()      (PRR1 &= (uint8_t)~(1 << PRUSB))
1182#define power_usb_disable()     (PRR1 |= (uint8_t)(1 << PRUSB))
1183
1184#define power_hsspi_enable()    (PRR1 &= (uint8_t)~(1 << PRHSSPI))
1185#define power_hsspi_disable()   (PRR1 |= (uint8_t)(1 << PRHSSPI))
1186
1187#define power_sci_enable()      (PRR1 &= (uint8_t)~(1 << PRSCI))
1188#define power_sci_disable()     (PRR1 |= (uint8_t)(1 << PRSCI))
1189
1190#define power_aes_enable()      (PRR1 &= (uint8_t)~(1 << PRAES))
1191#define power_aes_disable()     (PRR1 |= (uint8_t)(1 << PRAES))
1192
1193#define power_kb_enable()       (PRR1 &= (uint8_t)~(1 << PRKB))
1194#define power_kb_disable()      (PRR1 |= (uint8_t)(1 << PRKB))
1195
1196#define power_all_enable() \
1197do{ \
1198    PRR0 &= (uint8_t)~((1<<PRUSART0)|(1<<PRSPI)|(1<<PRTIM1)|(1<<PRTIM0)|(1<<PRTIM2)|(1<<PRTWI)); \
1199    PRR1 &= (uint8_t)~((1<<PRUSBH)|(1<<PRUSB)|(1<<PRHSSPI)|(1<<PRSCI)|(1<<PRAES)|(1<<PRKB)); \
1200}while(0)
1201
1202#define power_all_disable() \
1203do{ \
1204    PRR0 |= (uint8_t)((1<<PRUSART0)|(1<<PRSPI)|(1<<PRTIM1)|(1<<PRTIM0)|(1<<PRTIM2)|(1<<PRTWI)); \
1205    PRR1 |= (uint8_t)((1<<PRUSBH)|(1<<PRUSB)|(1<<PRHSSPI)|(1<<PRSCI)|(1<<PRAES)|(1<<PRKB)); \
1206}while(0)
1207
1208#endif
1209
1210
1211#if defined(__AVR_ATmega640__) \
1212|| defined(__AVR_ATmega1280__) \
1213|| defined(__AVR_ATmega1281__) \
1214|| defined(__AVR_ATmega2560__) \
1215|| defined(__AVR_ATmega2561__) \
1216|| defined(__AVR_AT90USB646__) \
1217|| defined(__AVR_AT90USB647__) \
1218|| defined(__AVR_AT90USB82__) \
1219|| defined(__AVR_AT90USB1286__) \
1220|| defined(__AVR_AT90USB1287__) \
1221|| defined(__AVR_AT90USB162__) \
1222|| defined(__AVR_AT90CAN32__) \
1223|| defined(__AVR_AT90CAN64__) \
1224|| defined(__AVR_AT90CAN128__) \
1225|| defined(__AVR_AT90PWM1__) \
1226|| defined(__AVR_AT90PWM2__) \
1227|| defined(__AVR_AT90PWM2B__) \
1228|| defined(__AVR_AT90PWM3__) \
1229|| defined(__AVR_AT90PWM3B__) \
1230|| defined(__AVR_AT90PWM216__) \
1231|| defined(__AVR_AT90PWM316__) \
1232|| defined(__AVR_ATmega32M1__) \
1233|| defined(__AVR_ATmega1284P__) \
1234|| defined(__AVR_ATmega162__) \
1235|| defined(__AVR_ATmega165__) \
1236|| defined(__AVR_ATmega165P__) \
1237|| defined(__AVR_ATmega325__) \
1238|| defined(__AVR_ATmega3250__) \
1239|| defined(__AVR_ATmega32HVB__) \
1240|| defined(__AVR_ATmega645__) \
1241|| defined(__AVR_ATmega6450__) \
1242|| defined(__AVR_ATmega169__) \
1243|| defined(__AVR_ATmega169P__) \
1244|| defined(__AVR_ATmega329__) \
1245|| defined(__AVR_ATmega3290__) \
1246|| defined(__AVR_ATmega649__) \
1247|| defined(__AVR_ATmega6490__) \
1248|| defined(__AVR_ATmega48__) \
1249|| defined(__AVR_ATmega48P__) \
1250|| defined(__AVR_ATmega88__) \
1251|| defined(__AVR_ATmega88P__) \
1252|| defined(__AVR_ATmega168__) \
1253|| defined(__AVR_ATmega168P__) \
1254|| defined(__AVR_ATmega328P__) \
1255|| defined(__AVR_ATmega164P__) \
1256|| defined(__AVR_ATmega324P__) \
1257|| defined(__AVR_ATmega644__) \
1258|| defined(__AVR_ATmega644P__) \
1259|| defined(__AVR_ATtiny48__) \
1260|| defined(__AVR_ATtiny167__) \
1261|| defined(__AVR_ATmega32U4__) \
1262|| defined(__AVR_ATmega32C1__) \
1263|| defined(__AVR_AT90SCR100__) \
1264|| defined(__DOXYGEN__)
1265
1266
1267/** \addtogroup avr_power
1268
1269Some of the newer AVRs contain a System Clock Prescale Register (CLKPR) that
1270allows you to decrease the system clock frequency and the power consumption
1271when the need for processing power is low. Below are two macros and an
1272enumerated type that can be used to interface to the Clock Prescale Register.
1273
1274\note Not all AVR devices have a Clock Prescale Register. On those devices
1275without a Clock Prescale Register, these macros are not available.
1276*/
1277
1278
1279/** \addtogroup avr_power
1280\code
1281typedef enum
1282{
1283    clock_div_1 = 0,
1284    clock_div_2 = 1,
1285    clock_div_4 = 2,
1286    clock_div_8 = 3,
1287    clock_div_16 = 4,
1288    clock_div_32 = 5,
1289    clock_div_64 = 6,
1290    clock_div_128 = 7,
1291    clock_div_256 = 8
1292} clock_div_t;
1293\endcode
1294Clock prescaler setting enumerations.
1295
1296*/
1297typedef enum
1298{
1299    clock_div_1 = 0,
1300    clock_div_2 = 1,
1301    clock_div_4 = 2,
1302    clock_div_8 = 3,
1303    clock_div_16 = 4,
1304    clock_div_32 = 5,
1305    clock_div_64 = 6,
1306    clock_div_128 = 7,
1307    clock_div_256 = 8
1308} clock_div_t;
1309
1310
1311/** \addtogroup avr_power
1312\code clock_prescale_set(x) \endcode
1313Set the clock prescaler register select bits, selecting a system clock division setting. They type of x is clock_div_t.
1314
1315*/
1316#define clock_prescale_set(x) \
1317{ \
1318        uint8_t tmp = _BV(CLKPCE); \
1319        __asm__ __volatile__ ( \
1320                "in __tmp_reg__,__SREG__" "\n\t" \
1321                "cli" "\n\t" \
1322                "sts %1, %0" "\n\t" \
1323                "sts %1, %2" "\n\t" \
1324                "out __SREG__, __tmp_reg__" \
1325                : /* no outputs */ \
1326                : "d" (tmp), \
1327                  "M" (_SFR_MEM_ADDR(CLKPR)), \
1328                  "d" (x) \
1329                : "r0"); \
1330}
1331
1332/** \addtogroup avr_power
1333\code clock_prescale_get() \endcode
1334Gets and returns the clock prescaler register setting. The return type is clock_div_t.
1335
1336*/
1337#define clock_prescale_get()  (clock_div_t)(CLKPR & (uint8_t)((1<<CLKPS0)|(1<<CLKPS1)|(1<<CLKPS2)|(1<<CLKPS3)))
1338
1339
1340#elif defined(__AVR_ATtiny24__) \
1341|| defined(__AVR_ATtiny44__) \
1342|| defined(__AVR_ATtiny84__) \
1343|| defined(__AVR_ATtiny25__) \
1344|| defined(__AVR_ATtiny45__) \
1345|| defined(__AVR_ATtiny85__) \
1346|| defined(__AVR_ATtiny261__) \
1347|| defined(__AVR_ATtiny461__) \
1348|| defined(__AVR_ATtiny861__) \
1349|| defined(__AVR_ATtiny2313__) \
1350|| defined(__AVR_ATtiny13__) \
1351|| defined(__AVR_ATtiny13A__) \
1352|| defined(__AVR_ATtiny43U__) \
1353
1354typedef enum
1355{
1356    clock_div_1 = 0,
1357    clock_div_2 = 1,
1358    clock_div_4 = 2,
1359    clock_div_8 = 3,
1360    clock_div_16 = 4,
1361    clock_div_32 = 5,
1362    clock_div_64 = 6,
1363    clock_div_128 = 7,
1364    clock_div_256 = 8
1365} clock_div_t;
1366
1367
1368#define clock_prescale_set(x) \
1369{ \
1370        uint8_t tmp = _BV(CLKPCE); \
1371        __asm__ __volatile__ ( \
1372                "in __tmp_reg__,__SREG__" "\n\t" \
1373                "cli" "\n\t" \
1374                "out %1, %0" "\n\t" \
1375                "out %1, %2" "\n\t" \
1376                "out __SREG__, __tmp_reg__" \
1377                : /* no outputs */ \
1378                : "d" (tmp), \
1379                  "I" (_SFR_IO_ADDR(CLKPR)), \
1380                  "d" (x) \
1381                : "r0"); \
1382}
1383
1384
1385#define clock_prescale_get()  (clock_div_t)(CLKPR & (uint8_t)((1<<CLKPS0)|(1<<CLKPS1)|(1<<CLKPS2)|(1<<CLKPS3)))
1386
1387
1388#endif
1389
1390
1391
1392
1393#endif /* _AVR_POWER_H_ */
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