source: rtems/cpukit/score/cpu/avr/avr/iotn28.h @ b697bc6

4.115
Last change on this file since b697bc6 was b697bc6, checked in by Joel Sherrill <joel.sherrill@…>, on 01/10/13 at 21:06:42

cpukit: Use Consistent Beginning of Doxygen Group Notation

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of @{ into a consistent form.

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1/**
2 * @file
3 *
4 * @brief Definitions for ATtiny28
5 *
6 * This file should only be included from <avr/io.h>, never directly.
7 */
8
9/* Copyright (c) 2002, Marek Michalkiewicz
10   All rights reserved.
11
12   Redistribution and use in source and binary forms, with or without
13   modification, are permitted provided that the following conditions are met:
14
15   * Redistributions of source code must retain the above copyright
16     notice, this list of conditions and the following disclaimer.
17
18   * Redistributions in binary form must reproduce the above copyright
19     notice, this list of conditions and the following disclaimer in
20     the documentation and/or other materials provided with the
21     distribution.
22
23   * Neither the name of the copyright holders nor the names of
24     contributors may be used to endorse or promote products derived
25     from this software without specific prior written permission.
26
27  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
28  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
29  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
30  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
31  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37  POSSIBILITY OF SUCH DAMAGE. */
38
39
40/* avr/iotn28.h - definitions for ATtiny28 */
41
42#ifndef _AVR_IOTN28_H_
43#define _AVR_IOTN28_H_ 1
44
45/* This file should only be included from <avr/io.h>, never directly. */
46
47#ifndef _AVR_IO_H_
48#  error "Include <avr/io.h> instead of this file."
49#endif
50
51#ifndef _AVR_IOXXX_H_
52#  define _AVR_IOXXX_H_ "iotn28.h"
53#else
54#  error "Attempt to include more than one <avr/ioXXX.h> file."
55#endif
56
57#ifndef __ASSEMBLER__
58#  warning "MCU not supported by the C compiler"
59#endif
60
61/**
62 * @defgroup AvrDef_iotn28 ATtiny28 Definitions
63 *
64 * @ingroup avr
65 *
66 */
67/**@{**/
68
69/* I/O registers */
70
71#define OSCCAL  _SFR_IO8(0x00)
72
73#define WDTCR   _SFR_IO8(0x01)
74
75#define MODCR   _SFR_IO8(0x02)
76
77#define TCNT0   _SFR_IO8(0x03)
78#define TCCR0   _SFR_IO8(0x04)
79
80#define IFR     _SFR_IO8(0x05)
81#define ICR     _SFR_IO8(0x06)
82
83#define MCUCS   _SFR_IO8(0x07)
84
85#define ACSR    _SFR_IO8(0x08)
86
87/* 0x09..0x0F reserved */
88
89#define PIND    _SFR_IO8(0x10)
90#define DDRD    _SFR_IO8(0x11)
91#define PORTD   _SFR_IO8(0x12)
92
93/* 0x13..0x15 reserved */
94
95#define PINB    _SFR_IO8(0x16)
96
97/* 0x17..0x18 reserved */
98
99#define PINA    _SFR_IO8(0x19)
100#define PACR    _SFR_IO8(0x1A)
101#define PORTA   _SFR_IO8(0x1B)
102
103/* 0x1C..0x3E reserved */
104
105/* 0x3F SREG */
106
107/* Interrupt vectors */
108
109/* External Interrupt 0 */
110#define INT0_vect                       _VECTOR(1)
111#define SIG_INTERRUPT0                  _VECTOR(1)
112
113/* External Interrupt 1 */
114#define INT1_vect                       _VECTOR(2)
115#define SIG_INTERRUPT1                  _VECTOR(2)
116
117/* Low-level Input on Port B */
118#define LOWLEVEL_IO_PINS_vect           _VECTOR(3)
119#define SIG_PIN                         _VECTOR(3)
120
121/* Timer/Counter0 Overflow */
122#define TIMER0_OVF_vect                 _VECTOR(4)
123#define SIG_OVERFLOW0                   _VECTOR(4)
124
125/* Analog Comparator */
126#define ANA_COMP_vect                   _VECTOR(5)
127#define SIG_COMPARATOR                  _VECTOR(5)
128
129#define _VECTORS_SIZE 12
130
131
132/* Bit numbers */
133
134/* ICR */
135#define INT1    7
136#define INT0    6
137#define LLIE    5
138#define TOIE0   4
139#define ISC11   3
140#define ISC10   2
141#define ISC01   1
142#define ISC00
143
144/* IFR */
145#define INTF1   7
146#define INTF0   6
147#define TOV0    4
148
149/* MCUCS */
150#define PLUPB   7
151#define SE      5
152#define SM      4
153#define WDRF    3
154#define EXTRF   1
155#define PORF    0
156
157/* TCCR0 */
158#define FOV0    7
159#define OOM01   4
160#define OOM00   3
161#define CS02    2
162#define CS01    1
163#define CS00    0
164
165/* MODCR */
166#define ONTIM4  7
167#define ONTIM3  6
168#define ONTIM2  5
169#define ONTIM1  4
170#define ONTIM0  3
171#define MCONF2  2
172#define MCONF1  1
173#define MCONF0  0
174
175/* WDTCR */
176#define WDTOE   4
177#define WDE     3
178#define WDP2    2
179#define WDP1    1
180#define WDP0    0
181
182/*
183   PA2 = IR
184 */
185
186/* PORTA */
187#define PA3     3
188#define PA2     2
189#define PA1     1
190#define PA0     0
191
192/* PACR */
193#define DDA3    3
194#define PA2HC   2
195#define DDA1    1
196#define DDA0    0
197
198/* PINA */
199#define PINA3   3
200#define PINA1   1
201#define PINA0   0
202
203/*
204   PB4 = INT1
205   PB3 = INT0
206   PB2 = T0
207   PB1 = AIN1
208   PB0 = AIN0
209 */
210
211/* PINB */
212#define PINB7   7
213#define PINB6   6
214#define PINB5   5
215#define PINB4   4
216#define PINB3   3
217#define PINB2   2
218#define PINB1   1
219#define PINB0   0
220
221/* PORTD */
222#define PD7     7
223#define PD6     6
224#define PD5     5
225#define PD4     4
226#define PD3     3
227#define PD2     2
228#define PD1     1
229#define PD0     0
230
231/* DDRD */
232#define DDD7    7
233#define DDD6    6
234#define DDD5    5
235#define DDD4    4
236#define DDD3    3
237#define DDD2    2
238#define DDD1    1
239#define DDD0    0
240
241/* PIND */
242#define PIND7   7
243#define PIND6   6
244#define PIND5   5
245#define PIND4   4
246#define PIND3   3
247#define PIND2   2
248#define PIND1   1
249#define PIND0   0
250
251/* ACSR */
252#define ACD     7
253#define ACO     5
254#define ACI     4
255#define ACIE    3
256#define ACIS1   1
257#define ACIS0   0
258
259/* Last memory addresses */
260#define RAMEND          0x1F
261#define XRAMEND         0x0
262#define E2END           0x0
263#define E2PAGESIZE  0
264#define FLASHEND        0x7FF
265
266
267/* Fuses */
268
269#define FUSE_MEMORY_SIZE 1
270
271/* Fuse Byte */
272#define FUSE_CKSEL0      (unsigned char)~_BV(0)
273#define FUSE_CKSEL1      (unsigned char)~_BV(1)
274#define FUSE_CKSEL2      (unsigned char)~_BV(2)
275#define FUSE_CKSEL3      (unsigned char)~_BV(3)
276#define FUSE_INTCAP      (unsigned char)~_BV(4)
277#define FUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3)
278
279
280/* Lock Bits */
281#define __LOCK_BITS_EXIST
282
283
284/* Signature */
285#define SIGNATURE_0 0x1E
286#define SIGNATURE_1 0x91
287#define SIGNATURE_2 0x07
288
289/** @} */
290
291#endif /* _AVR_IOTN28_H_ */
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