source: rtems/cpukit/score/cpu/avr/avr/iotn28.h @ 04a62dce

4.104.11
Last change on this file since 04a62dce was 04a62dce, checked in by Joel Sherrill <joel.sherrill@…>, on Aug 6, 2009 at 2:52:07 PM

2009-08-05 Josh Switnicki <josh.switnicki@…>

  • Makefile.am: added AVR specific Header files to score/cpu/avr/avr. These are from avr-libc 1.6 and assumed to exist by AVR applications.
  • preinstall.am: Regenerated.
  • Property mode set to 100644
File size: 5.3 KB
Line 
1/* Copyright (c) 2002, Marek Michalkiewicz
2   All rights reserved.
3
4   Redistribution and use in source and binary forms, with or without
5   modification, are permitted provided that the following conditions are met:
6
7   * Redistributions of source code must retain the above copyright
8     notice, this list of conditions and the following disclaimer.
9
10   * Redistributions in binary form must reproduce the above copyright
11     notice, this list of conditions and the following disclaimer in
12     the documentation and/or other materials provided with the
13     distribution.
14
15   * Neither the name of the copyright holders nor the names of
16     contributors may be used to endorse or promote products derived
17     from this software without specific prior written permission.
18
19  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
23  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  POSSIBILITY OF SUCH DAMAGE. */
30
31/* $Id$ */
32
33/* avr/iotn28.h - definitions for ATtiny28 */
34
35#ifndef _AVR_IOTN28_H_
36#define _AVR_IOTN28_H_ 1
37
38/* This file should only be included from <avr/io.h>, never directly. */
39
40#ifndef _AVR_IO_H_
41#  error "Include <avr/io.h> instead of this file."
42#endif
43
44#ifndef _AVR_IOXXX_H_
45#  define _AVR_IOXXX_H_ "iotn28.h"
46#else
47#  error "Attempt to include more than one <avr/ioXXX.h> file."
48#endif
49
50#ifndef __ASSEMBLER__
51#  warning "MCU not supported by the C compiler"
52#endif
53
54/* I/O registers */
55
56#define OSCCAL  _SFR_IO8(0x00)
57
58#define WDTCR   _SFR_IO8(0x01)
59
60#define MODCR   _SFR_IO8(0x02)
61
62#define TCNT0   _SFR_IO8(0x03)
63#define TCCR0   _SFR_IO8(0x04)
64
65#define IFR     _SFR_IO8(0x05)
66#define ICR     _SFR_IO8(0x06)
67
68#define MCUCS   _SFR_IO8(0x07)
69
70#define ACSR    _SFR_IO8(0x08)
71
72/* 0x09..0x0F reserved */
73
74#define PIND    _SFR_IO8(0x10)
75#define DDRD    _SFR_IO8(0x11)
76#define PORTD   _SFR_IO8(0x12)
77
78/* 0x13..0x15 reserved */
79
80#define PINB    _SFR_IO8(0x16)
81
82/* 0x17..0x18 reserved */
83
84#define PINA    _SFR_IO8(0x19)
85#define PACR    _SFR_IO8(0x1A)
86#define PORTA   _SFR_IO8(0x1B)
87
88/* 0x1C..0x3E reserved */
89
90/* 0x3F SREG */
91
92/* Interrupt vectors */
93
94/* External Interrupt 0 */
95#define INT0_vect                       _VECTOR(1)
96#define SIG_INTERRUPT0                  _VECTOR(1)
97
98/* External Interrupt 1 */
99#define INT1_vect                       _VECTOR(2)
100#define SIG_INTERRUPT1                  _VECTOR(2)
101
102/* Low-level Input on Port B */
103#define LOWLEVEL_IO_PINS_vect           _VECTOR(3)
104#define SIG_PIN                         _VECTOR(3)
105
106/* Timer/Counter0 Overflow */
107#define TIMER0_OVF_vect                 _VECTOR(4)
108#define SIG_OVERFLOW0                   _VECTOR(4)
109
110/* Analog Comparator */
111#define ANA_COMP_vect                   _VECTOR(5)
112#define SIG_COMPARATOR                  _VECTOR(5)
113
114#define _VECTORS_SIZE 12
115
116
117/* Bit numbers */
118
119/* ICR */
120#define INT1    7
121#define INT0    6
122#define LLIE    5
123#define TOIE0   4
124#define ISC11   3
125#define ISC10   2
126#define ISC01   1
127#define ISC00
128
129/* IFR */
130#define INTF1   7
131#define INTF0   6
132#define TOV0    4
133
134/* MCUCS */
135#define PLUPB   7
136#define SE      5
137#define SM      4
138#define WDRF    3
139#define EXTRF   1
140#define PORF    0
141
142/* TCCR0 */
143#define FOV0    7
144#define OOM01   4
145#define OOM00   3
146#define CS02    2
147#define CS01    1
148#define CS00    0
149
150/* MODCR */
151#define ONTIM4  7
152#define ONTIM3  6
153#define ONTIM2  5
154#define ONTIM1  4
155#define ONTIM0  3
156#define MCONF2  2
157#define MCONF1  1
158#define MCONF0  0
159
160/* WDTCR */
161#define WDTOE   4
162#define WDE     3
163#define WDP2    2
164#define WDP1    1
165#define WDP0    0
166
167/*
168   PA2 = IR
169 */
170
171/* PORTA */
172#define PA3     3
173#define PA2     2
174#define PA1     1
175#define PA0     0
176
177/* PACR */
178#define DDA3    3
179#define PA2HC   2
180#define DDA1    1
181#define DDA0    0
182
183/* PINA */
184#define PINA3   3
185#define PINA1   1
186#define PINA0   0
187
188/*
189   PB4 = INT1
190   PB3 = INT0
191   PB2 = T0
192   PB1 = AIN1
193   PB0 = AIN0
194 */
195
196/* PINB */
197#define PINB7   7
198#define PINB6   6
199#define PINB5   5
200#define PINB4   4
201#define PINB3   3
202#define PINB2   2
203#define PINB1   1
204#define PINB0   0
205
206/* PORTD */
207#define PD7     7
208#define PD6     6
209#define PD5     5
210#define PD4     4
211#define PD3     3
212#define PD2     2
213#define PD1     1
214#define PD0     0
215
216/* DDRD */
217#define DDD7    7
218#define DDD6    6
219#define DDD5    5
220#define DDD4    4
221#define DDD3    3
222#define DDD2    2
223#define DDD1    1
224#define DDD0    0
225
226/* PIND */
227#define PIND7   7
228#define PIND6   6
229#define PIND5   5
230#define PIND4   4
231#define PIND3   3
232#define PIND2   2
233#define PIND1   1
234#define PIND0   0
235
236/* ACSR */
237#define ACD     7
238#define ACO     5
239#define ACI     4
240#define ACIE    3
241#define ACIS1   1
242#define ACIS0   0
243
244/* Last memory addresses */
245#define RAMEND          0x1F
246#define XRAMEND         0x0
247#define E2END           0x0
248#define E2PAGESIZE  0
249#define FLASHEND        0x7FF
250
251
252/* Fuses */
253
254#define FUSE_MEMORY_SIZE 1
255
256/* Fuse Byte */
257#define FUSE_CKSEL0      (unsigned char)~_BV(0)
258#define FUSE_CKSEL1      (unsigned char)~_BV(1)
259#define FUSE_CKSEL2      (unsigned char)~_BV(2)
260#define FUSE_CKSEL3      (unsigned char)~_BV(3)
261#define FUSE_INTCAP      (unsigned char)~_BV(4)
262#define FUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3)
263
264
265/* Lock Bits */
266#define __LOCK_BITS_EXIST
267
268
269/* Signature */
270#define SIGNATURE_0 0x1E
271#define SIGNATURE_1 0x91
272#define SIGNATURE_2 0x07
273
274
275#endif /* _AVR_IOTN28_H_ */
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