1 | /* Copyright (c) 2009 Atmel Corporation |
---|
2 | All rights reserved. |
---|
3 | |
---|
4 | Redistribution and use in source and binary forms, with or without |
---|
5 | modification, are permitted provided that the following conditions are met: |
---|
6 | |
---|
7 | * Redistributions of source code must retain the above copyright |
---|
8 | notice, this list of conditions and the following disclaimer. |
---|
9 | |
---|
10 | * Redistributions in binary form must reproduce the above copyright |
---|
11 | notice, this list of conditions and the following disclaimer in |
---|
12 | the documentation and/or other materials provided with the |
---|
13 | distribution. |
---|
14 | |
---|
15 | * Neither the name of the copyright holders nor the names of |
---|
16 | contributors may be used to endorse or promote products derived |
---|
17 | from this software without specific prior written permission. |
---|
18 | |
---|
19 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
---|
20 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
---|
21 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
---|
22 | ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE |
---|
23 | LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
---|
24 | CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
---|
25 | SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
---|
26 | INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
---|
27 | CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
---|
28 | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
---|
29 | POSSIBILITY OF SUCH DAMAGE. */ |
---|
30 | |
---|
31 | |
---|
32 | /* avr/iom88pa.h - definitions for ATmega88PA */ |
---|
33 | |
---|
34 | /* This file should only be included from <avr/io.h>, never directly. */ |
---|
35 | |
---|
36 | #ifndef _AVR_IO_H_ |
---|
37 | # error "Include <avr/io.h> instead of this file." |
---|
38 | #endif |
---|
39 | |
---|
40 | #ifndef _AVR_IOXXX_H_ |
---|
41 | # define _AVR_IOXXX_H_ "iom88pa.h" |
---|
42 | #else |
---|
43 | # error "Attempt to include more than one <avr/ioXXX.h> file." |
---|
44 | #endif |
---|
45 | |
---|
46 | |
---|
47 | #ifndef _AVR_ATmega88PA_H_ |
---|
48 | #define _AVR_ATmega88PA_H_ 1 |
---|
49 | |
---|
50 | |
---|
51 | /* Registers and associated bit numbers. */ |
---|
52 | |
---|
53 | #define PINB _SFR_IO8(0x03) |
---|
54 | #define PINB0 0 |
---|
55 | #define PINB1 1 |
---|
56 | #define PINB2 2 |
---|
57 | #define PINB3 3 |
---|
58 | #define PINB4 4 |
---|
59 | #define PINB5 5 |
---|
60 | #define PINB6 6 |
---|
61 | #define PINB7 7 |
---|
62 | |
---|
63 | #define DDRB _SFR_IO8(0x04) |
---|
64 | #define DDB0 0 |
---|
65 | #define DDB1 1 |
---|
66 | #define DDB2 2 |
---|
67 | #define DDB3 3 |
---|
68 | #define DDB4 4 |
---|
69 | #define DDB5 5 |
---|
70 | #define DDB6 6 |
---|
71 | #define DDB7 7 |
---|
72 | |
---|
73 | #define PORTB _SFR_IO8(0x05) |
---|
74 | #define PORTB0 0 |
---|
75 | #define PORTB1 1 |
---|
76 | #define PORTB2 2 |
---|
77 | #define PORTB3 3 |
---|
78 | #define PORTB4 4 |
---|
79 | #define PORTB5 5 |
---|
80 | #define PORTB6 6 |
---|
81 | #define PORTB7 7 |
---|
82 | |
---|
83 | #define PINC _SFR_IO8(0x06) |
---|
84 | #define PINC0 0 |
---|
85 | #define PINC1 1 |
---|
86 | #define PINC2 2 |
---|
87 | #define PINC3 3 |
---|
88 | #define PINC4 4 |
---|
89 | #define PINC5 5 |
---|
90 | #define PINC6 6 |
---|
91 | |
---|
92 | #define DDRC _SFR_IO8(0x07) |
---|
93 | #define DDC0 0 |
---|
94 | #define DDC1 1 |
---|
95 | #define DDC2 2 |
---|
96 | #define DDC3 3 |
---|
97 | #define DDC4 4 |
---|
98 | #define DDC5 5 |
---|
99 | #define DDC6 6 |
---|
100 | |
---|
101 | #define PORTC _SFR_IO8(0x08) |
---|
102 | #define PORTC0 0 |
---|
103 | #define PORTC1 1 |
---|
104 | #define PORTC2 2 |
---|
105 | #define PORTC3 3 |
---|
106 | #define PORTC4 4 |
---|
107 | #define PORTC5 5 |
---|
108 | #define PORTC6 6 |
---|
109 | |
---|
110 | #define PIND _SFR_IO8(0x09) |
---|
111 | #define PIND0 0 |
---|
112 | #define PIND1 1 |
---|
113 | #define PIND2 2 |
---|
114 | #define PIND3 3 |
---|
115 | #define PIND4 4 |
---|
116 | #define PIND5 5 |
---|
117 | #define PIND6 6 |
---|
118 | #define PIND7 7 |
---|
119 | |
---|
120 | #define DDRD _SFR_IO8(0x0A) |
---|
121 | #define DDD0 0 |
---|
122 | #define DDD1 1 |
---|
123 | #define DDD2 2 |
---|
124 | #define DDD3 3 |
---|
125 | #define DDD4 4 |
---|
126 | #define DDD5 5 |
---|
127 | #define DDD6 6 |
---|
128 | #define DDD7 7 |
---|
129 | |
---|
130 | #define PORTD _SFR_IO8(0x0B) |
---|
131 | #define PORTD0 0 |
---|
132 | #define PORTD1 1 |
---|
133 | #define PORTD2 2 |
---|
134 | #define PORTD3 3 |
---|
135 | #define PORTD4 4 |
---|
136 | #define PORTD5 5 |
---|
137 | #define PORTD6 6 |
---|
138 | #define PORTD7 7 |
---|
139 | |
---|
140 | #define TIFR0 _SFR_IO8(0x15) |
---|
141 | #define TOV0 0 |
---|
142 | #define OCF0A 1 |
---|
143 | #define OCF0B 2 |
---|
144 | |
---|
145 | #define TIFR1 _SFR_IO8(0x16) |
---|
146 | #define TOV1 0 |
---|
147 | #define OCF1A 1 |
---|
148 | #define OCF1B 2 |
---|
149 | #define ICF1 5 |
---|
150 | |
---|
151 | #define TIFR2 _SFR_IO8(0x17) |
---|
152 | #define TOV2 0 |
---|
153 | #define OCF2A 1 |
---|
154 | #define OCF2B 2 |
---|
155 | |
---|
156 | #define PCIFR _SFR_IO8(0x1B) |
---|
157 | #define PCIF0 0 |
---|
158 | #define PCIF1 1 |
---|
159 | #define PCIF2 2 |
---|
160 | |
---|
161 | #define EIFR _SFR_IO8(0x1C) |
---|
162 | #define INTF0 0 |
---|
163 | #define INTF1 1 |
---|
164 | |
---|
165 | #define EIMSK _SFR_IO8(0x1D) |
---|
166 | #define INT0 0 |
---|
167 | #define INT1 1 |
---|
168 | |
---|
169 | #define GPIOR0 _SFR_IO8(0x1E) |
---|
170 | #define GPIOR00 0 |
---|
171 | #define GPIOR01 1 |
---|
172 | #define GPIOR02 2 |
---|
173 | #define GPIOR03 3 |
---|
174 | #define GPIOR04 4 |
---|
175 | #define GPIOR05 5 |
---|
176 | #define GPIOR06 6 |
---|
177 | #define GPIOR07 7 |
---|
178 | |
---|
179 | #define EECR _SFR_IO8(0x1F) |
---|
180 | #define EERE 0 |
---|
181 | #define EEPE 1 |
---|
182 | #define EEMPE 2 |
---|
183 | #define EERIE 3 |
---|
184 | #define EEPM0 4 |
---|
185 | #define EEPM1 5 |
---|
186 | |
---|
187 | #define EEDR _SFR_IO8(0x20) |
---|
188 | #define EEDR0 0 |
---|
189 | #define EEDR1 1 |
---|
190 | #define EEDR2 2 |
---|
191 | #define EEDR3 3 |
---|
192 | #define EEDR4 4 |
---|
193 | #define EEDR5 5 |
---|
194 | #define EEDR6 6 |
---|
195 | #define EEDR7 7 |
---|
196 | |
---|
197 | #define EEAR _SFR_IO16(0x21) |
---|
198 | |
---|
199 | #define EEARL _SFR_IO8(0x21) |
---|
200 | #define EEAR0 0 |
---|
201 | #define EEAR1 1 |
---|
202 | #define EEAR2 2 |
---|
203 | #define EEAR3 3 |
---|
204 | #define EEAR4 4 |
---|
205 | #define EEAR5 5 |
---|
206 | #define EEAR6 6 |
---|
207 | #define EEAR7 7 |
---|
208 | |
---|
209 | #define EEARH _SFR_IO8(0x22) |
---|
210 | #define EEAR8 0 |
---|
211 | |
---|
212 | #define GTCCR _SFR_IO8(0x23) |
---|
213 | #define PSRSYNC 0 |
---|
214 | #define PSRASY 1 |
---|
215 | #define TSM 7 |
---|
216 | |
---|
217 | #define TCCR0A _SFR_IO8(0x24) |
---|
218 | #define WGM00 0 |
---|
219 | #define WGM01 1 |
---|
220 | #define COM0B0 4 |
---|
221 | #define COM0B1 5 |
---|
222 | #define COM0A0 6 |
---|
223 | #define COM0A1 7 |
---|
224 | |
---|
225 | #define TCCR0B _SFR_IO8(0x25) |
---|
226 | #define CS00 0 |
---|
227 | #define CS01 1 |
---|
228 | #define CS02 2 |
---|
229 | #define WGM02 3 |
---|
230 | #define FOC0B 6 |
---|
231 | #define FOC0A 7 |
---|
232 | |
---|
233 | #define TCNT0 _SFR_IO8(0x26) |
---|
234 | #define TCNT0_0 0 |
---|
235 | #define TCNT0_1 1 |
---|
236 | #define TCNT0_2 2 |
---|
237 | #define TCNT0_3 3 |
---|
238 | #define TCNT0_4 4 |
---|
239 | #define TCNT0_5 5 |
---|
240 | #define TCNT0_6 6 |
---|
241 | #define TCNT0_7 7 |
---|
242 | |
---|
243 | #define OCR0A _SFR_IO8(0x27) |
---|
244 | #define OCR0A_0 0 |
---|
245 | #define OCR0A_1 1 |
---|
246 | #define OCR0A_2 2 |
---|
247 | #define OCR0A_3 3 |
---|
248 | #define OCR0A_4 4 |
---|
249 | #define OCR0A_5 5 |
---|
250 | #define OCR0A_6 6 |
---|
251 | #define OCR0A_7 7 |
---|
252 | |
---|
253 | #define OCR0B _SFR_IO8(0x28) |
---|
254 | #define OCR0B_0 0 |
---|
255 | #define OCR0B_1 1 |
---|
256 | #define OCR0B_2 2 |
---|
257 | #define OCR0B_3 3 |
---|
258 | #define OCR0B_4 4 |
---|
259 | #define OCR0B_5 5 |
---|
260 | #define OCR0B_6 6 |
---|
261 | #define OCR0B_7 7 |
---|
262 | |
---|
263 | #define GPIOR1 _SFR_IO8(0x2A) |
---|
264 | #define GPIOR10 0 |
---|
265 | #define GPIOR11 1 |
---|
266 | #define GPIOR12 2 |
---|
267 | #define GPIOR13 3 |
---|
268 | #define GPIOR14 4 |
---|
269 | #define GPIOR15 5 |
---|
270 | #define GPIOR16 6 |
---|
271 | #define GPIOR17 7 |
---|
272 | |
---|
273 | #define GPIOR2 _SFR_IO8(0x2B) |
---|
274 | #define GPIOR20 0 |
---|
275 | #define GPIOR21 1 |
---|
276 | #define GPIOR22 2 |
---|
277 | #define GPIOR23 3 |
---|
278 | #define GPIOR24 4 |
---|
279 | #define GPIOR25 5 |
---|
280 | #define GPIOR26 6 |
---|
281 | #define GPIOR27 7 |
---|
282 | |
---|
283 | #define SPCR _SFR_IO8(0x2C) |
---|
284 | #define SPR0 0 |
---|
285 | #define SPR1 1 |
---|
286 | #define CPHA 2 |
---|
287 | #define CPOL 3 |
---|
288 | #define MSTR 4 |
---|
289 | #define DORD 5 |
---|
290 | #define SPE 6 |
---|
291 | #define SPIE 7 |
---|
292 | |
---|
293 | #define SPSR _SFR_IO8(0x2D) |
---|
294 | #define SPI2X 0 |
---|
295 | #define WCOL 6 |
---|
296 | #define SPIF 7 |
---|
297 | |
---|
298 | #define SPDR _SFR_IO8(0x2E) |
---|
299 | #define SPDR0 0 |
---|
300 | #define SPDR1 1 |
---|
301 | #define SPDR2 2 |
---|
302 | #define SPDR3 3 |
---|
303 | #define SPDR4 4 |
---|
304 | #define SPDR5 5 |
---|
305 | #define SPDR6 6 |
---|
306 | #define SPDR7 7 |
---|
307 | |
---|
308 | #define ACSR _SFR_IO8(0x30) |
---|
309 | #define ACIS0 0 |
---|
310 | #define ACIS1 1 |
---|
311 | #define ACIC 2 |
---|
312 | #define ACIE 3 |
---|
313 | #define ACI 4 |
---|
314 | #define ACO 5 |
---|
315 | #define ACBG 6 |
---|
316 | #define ACD 7 |
---|
317 | |
---|
318 | #define SMCR _SFR_IO8(0x33) |
---|
319 | #define SE 0 |
---|
320 | #define SM0 1 |
---|
321 | #define SM1 2 |
---|
322 | #define SM2 3 |
---|
323 | |
---|
324 | #define MCUSR _SFR_IO8(0x34) |
---|
325 | #define PORF 0 |
---|
326 | #define EXTRF 1 |
---|
327 | #define BORF 2 |
---|
328 | #define WDRF 3 |
---|
329 | |
---|
330 | #define MCUCR _SFR_IO8(0x35) |
---|
331 | #define IVCE 0 |
---|
332 | #define IVSEL 1 |
---|
333 | #define PUD 4 |
---|
334 | #define BODSE 5 |
---|
335 | #define BODS 6 |
---|
336 | |
---|
337 | #define SPMCSR _SFR_IO8(0x37) |
---|
338 | #define SELFPRGEN 0 |
---|
339 | #define PGERS 1 |
---|
340 | #define PGWRT 2 |
---|
341 | #define BLBSET 3 |
---|
342 | #define RWWSRE 4 |
---|
343 | #define RWWSB 6 |
---|
344 | #define SPMIE 7 |
---|
345 | |
---|
346 | #define WDTCSR _SFR_MEM8(0x60) |
---|
347 | #define WDP0 0 |
---|
348 | #define WDP1 1 |
---|
349 | #define WDP2 2 |
---|
350 | #define WDE 3 |
---|
351 | #define WDCE 4 |
---|
352 | #define WDP3 5 |
---|
353 | #define WDIE 6 |
---|
354 | #define WDIF 7 |
---|
355 | |
---|
356 | #define CLKPR _SFR_MEM8(0x61) |
---|
357 | #define CLKPS0 0 |
---|
358 | #define CLKPS1 1 |
---|
359 | #define CLKPS2 2 |
---|
360 | #define CLKPS3 3 |
---|
361 | #define CLKPCE 7 |
---|
362 | |
---|
363 | #define PRR _SFR_MEM8(0x64) |
---|
364 | #define PRADC 0 |
---|
365 | #define PRUSART0 1 |
---|
366 | #define PRSPI 2 |
---|
367 | #define PRTIM1 3 |
---|
368 | #define PRTIM0 5 |
---|
369 | #define PRTIM2 6 |
---|
370 | #define PRTWI 7 |
---|
371 | |
---|
372 | #define OSCCAL _SFR_MEM8(0x66) |
---|
373 | #define CAL0 0 |
---|
374 | #define CAL1 1 |
---|
375 | #define CAL2 2 |
---|
376 | #define CAL3 3 |
---|
377 | #define CAL4 4 |
---|
378 | #define CAL5 5 |
---|
379 | #define CAL6 6 |
---|
380 | #define CAL7 7 |
---|
381 | |
---|
382 | #define PCICR _SFR_MEM8(0x68) |
---|
383 | #define PCIE0 0 |
---|
384 | #define PCIE1 1 |
---|
385 | #define PCIE2 2 |
---|
386 | |
---|
387 | #define EICRA _SFR_MEM8(0x69) |
---|
388 | #define ISC00 0 |
---|
389 | #define ISC01 1 |
---|
390 | #define ISC10 2 |
---|
391 | #define ISC11 3 |
---|
392 | |
---|
393 | #define PCMSK0 _SFR_MEM8(0x6B) |
---|
394 | #define PCINT0 0 |
---|
395 | #define PCINT1 1 |
---|
396 | #define PCINT2 2 |
---|
397 | #define PCINT3 3 |
---|
398 | #define PCINT4 4 |
---|
399 | #define PCINT5 5 |
---|
400 | #define PCINT6 6 |
---|
401 | #define PCINT7 7 |
---|
402 | |
---|
403 | #define PCMSK1 _SFR_MEM8(0x6C) |
---|
404 | #define PCINT8 0 |
---|
405 | #define PCINT9 1 |
---|
406 | #define PCINT10 2 |
---|
407 | #define PCINT11 3 |
---|
408 | #define PCINT12 4 |
---|
409 | #define PCINT13 5 |
---|
410 | #define PCINT14 6 |
---|
411 | |
---|
412 | #define PCMSK2 _SFR_MEM8(0x6D) |
---|
413 | #define PCINT16 0 |
---|
414 | #define PCINT17 1 |
---|
415 | #define PCINT18 2 |
---|
416 | #define PCINT19 3 |
---|
417 | #define PCINT20 4 |
---|
418 | #define PCINT21 5 |
---|
419 | #define PCINT22 6 |
---|
420 | #define PCINT23 7 |
---|
421 | |
---|
422 | #define TIMSK0 _SFR_MEM8(0x6E) |
---|
423 | #define TOIE0 0 |
---|
424 | #define OCIE0A 1 |
---|
425 | #define OCIE0B 2 |
---|
426 | |
---|
427 | #define TIMSK1 _SFR_MEM8(0x6F) |
---|
428 | #define TOIE1 0 |
---|
429 | #define OCIE1A 1 |
---|
430 | #define OCIE1B 2 |
---|
431 | #define ICIE1 5 |
---|
432 | |
---|
433 | #define TIMSK2 _SFR_MEM8(0x70) |
---|
434 | #define TOIE2 0 |
---|
435 | #define OCIE2A 1 |
---|
436 | #define OCIE2B 2 |
---|
437 | |
---|
438 | #ifndef __ASSEMBLER__ |
---|
439 | #define ADC _SFR_MEM16(0x78) |
---|
440 | #endif |
---|
441 | #define ADCW _SFR_MEM16(0x78) |
---|
442 | |
---|
443 | #define ADCL _SFR_MEM8(0x78) |
---|
444 | #define ADCL0 0 |
---|
445 | #define ADCL1 1 |
---|
446 | #define ADCL2 2 |
---|
447 | #define ADCL3 3 |
---|
448 | #define ADCL4 4 |
---|
449 | #define ADCL5 5 |
---|
450 | #define ADCL6 6 |
---|
451 | #define ADCL7 7 |
---|
452 | |
---|
453 | #define ADCH _SFR_MEM8(0x79) |
---|
454 | #define ADCH0 0 |
---|
455 | #define ADCH1 1 |
---|
456 | #define ADCH2 2 |
---|
457 | #define ADCH3 3 |
---|
458 | #define ADCH4 4 |
---|
459 | #define ADCH5 5 |
---|
460 | #define ADCH6 6 |
---|
461 | #define ADCH7 7 |
---|
462 | |
---|
463 | #define ADCSRA _SFR_MEM8(0x7A) |
---|
464 | #define ADPS0 0 |
---|
465 | #define ADPS1 1 |
---|
466 | #define ADPS2 2 |
---|
467 | #define ADIE 3 |
---|
468 | #define ADIF 4 |
---|
469 | #define ADATE 5 |
---|
470 | #define ADSC 6 |
---|
471 | #define ADEN 7 |
---|
472 | |
---|
473 | #define ADCSRB _SFR_MEM8(0x7B) |
---|
474 | #define ADTS0 0 |
---|
475 | #define ADTS1 1 |
---|
476 | #define ADTS2 2 |
---|
477 | #define ACME 6 |
---|
478 | |
---|
479 | #define ADMUX _SFR_MEM8(0x7C) |
---|
480 | #define MUX0 0 |
---|
481 | #define MUX1 1 |
---|
482 | #define MUX2 2 |
---|
483 | #define MUX3 3 |
---|
484 | #define ADLAR 5 |
---|
485 | #define REFS0 6 |
---|
486 | #define REFS1 7 |
---|
487 | |
---|
488 | #define DIDR0 _SFR_MEM8(0x7E) |
---|
489 | #define ADC0D 0 |
---|
490 | #define ADC1D 1 |
---|
491 | #define ADC2D 2 |
---|
492 | #define ADC3D 3 |
---|
493 | #define ADC4D 4 |
---|
494 | #define ADC5D 5 |
---|
495 | |
---|
496 | #define DIDR1 _SFR_MEM8(0x7F) |
---|
497 | #define AIN0D 0 |
---|
498 | #define AIN1D 1 |
---|
499 | |
---|
500 | #define TCCR1A _SFR_MEM8(0x80) |
---|
501 | #define WGM10 0 |
---|
502 | #define WGM11 1 |
---|
503 | #define COM1B0 4 |
---|
504 | #define COM1B1 5 |
---|
505 | #define COM1A0 6 |
---|
506 | #define COM1A1 7 |
---|
507 | |
---|
508 | #define TCCR1B _SFR_MEM8(0x81) |
---|
509 | #define CS10 0 |
---|
510 | #define CS11 1 |
---|
511 | #define CS12 2 |
---|
512 | #define WGM12 3 |
---|
513 | #define WGM13 4 |
---|
514 | #define ICES1 6 |
---|
515 | #define ICNC1 7 |
---|
516 | |
---|
517 | #define TCCR1C _SFR_MEM8(0x82) |
---|
518 | #define FOC1B 6 |
---|
519 | #define FOC1A 7 |
---|
520 | |
---|
521 | #define TCNT1 _SFR_MEM16(0x84) |
---|
522 | |
---|
523 | #define TCNT1L _SFR_MEM8(0x84) |
---|
524 | #define TCNT1L0 0 |
---|
525 | #define TCNT1L1 1 |
---|
526 | #define TCNT1L2 2 |
---|
527 | #define TCNT1L3 3 |
---|
528 | #define TCNT1L4 4 |
---|
529 | #define TCNT1L5 5 |
---|
530 | #define TCNT1L6 6 |
---|
531 | #define TCNT1L7 7 |
---|
532 | |
---|
533 | #define TCNT1H _SFR_MEM8(0x85) |
---|
534 | #define TCNT1H0 0 |
---|
535 | #define TCNT1H1 1 |
---|
536 | #define TCNT1H2 2 |
---|
537 | #define TCNT1H3 3 |
---|
538 | #define TCNT1H4 4 |
---|
539 | #define TCNT1H5 5 |
---|
540 | #define TCNT1H6 6 |
---|
541 | #define TCNT1H7 7 |
---|
542 | |
---|
543 | #define ICR1 _SFR_MEM16(0x86) |
---|
544 | |
---|
545 | #define ICR1L _SFR_MEM8(0x86) |
---|
546 | #define ICR1L0 0 |
---|
547 | #define ICR1L1 1 |
---|
548 | #define ICR1L2 2 |
---|
549 | #define ICR1L3 3 |
---|
550 | #define ICR1L4 4 |
---|
551 | #define ICR1L5 5 |
---|
552 | #define ICR1L6 6 |
---|
553 | #define ICR1L7 7 |
---|
554 | |
---|
555 | #define ICR1H _SFR_MEM8(0x87) |
---|
556 | #define ICR1H0 0 |
---|
557 | #define ICR1H1 1 |
---|
558 | #define ICR1H2 2 |
---|
559 | #define ICR1H3 3 |
---|
560 | #define ICR1H4 4 |
---|
561 | #define ICR1H5 5 |
---|
562 | #define ICR1H6 6 |
---|
563 | #define ICR1H7 7 |
---|
564 | |
---|
565 | #define OCR1A _SFR_MEM16(0x88) |
---|
566 | |
---|
567 | #define OCR1AL _SFR_MEM8(0x88) |
---|
568 | #define OCR1AL0 0 |
---|
569 | #define OCR1AL1 1 |
---|
570 | #define OCR1AL2 2 |
---|
571 | #define OCR1AL3 3 |
---|
572 | #define OCR1AL4 4 |
---|
573 | #define OCR1AL5 5 |
---|
574 | #define OCR1AL6 6 |
---|
575 | #define OCR1AL7 7 |
---|
576 | |
---|
577 | #define OCR1AH _SFR_MEM8(0x89) |
---|
578 | #define OCR1AH0 0 |
---|
579 | #define OCR1AH1 1 |
---|
580 | #define OCR1AH2 2 |
---|
581 | #define OCR1AH3 3 |
---|
582 | #define OCR1AH4 4 |
---|
583 | #define OCR1AH5 5 |
---|
584 | #define OCR1AH6 6 |
---|
585 | #define OCR1AH7 7 |
---|
586 | |
---|
587 | #define OCR1B _SFR_MEM16(0x8A) |
---|
588 | |
---|
589 | #define OCR1BL _SFR_MEM8(0x8A) |
---|
590 | #define OCR1BL0 0 |
---|
591 | #define OCR1BL1 1 |
---|
592 | #define OCR1BL2 2 |
---|
593 | #define OCR1BL3 3 |
---|
594 | #define OCR1BL4 4 |
---|
595 | #define OCR1BL5 5 |
---|
596 | #define OCR1BL6 6 |
---|
597 | #define OCR1BL7 7 |
---|
598 | |
---|
599 | #define OCR1BH _SFR_MEM8(0x8B) |
---|
600 | #define OCR1BH0 0 |
---|
601 | #define OCR1BH1 1 |
---|
602 | #define OCR1BH2 2 |
---|
603 | #define OCR1BH3 3 |
---|
604 | #define OCR1BH4 4 |
---|
605 | #define OCR1BH5 5 |
---|
606 | #define OCR1BH6 6 |
---|
607 | #define OCR1BH7 7 |
---|
608 | |
---|
609 | #define TCCR2A _SFR_MEM8(0xB0) |
---|
610 | #define WGM20 0 |
---|
611 | #define WGM21 1 |
---|
612 | #define COM2B0 4 |
---|
613 | #define COM2B1 5 |
---|
614 | #define COM2A0 6 |
---|
615 | #define COM2A1 7 |
---|
616 | |
---|
617 | #define TCCR2B _SFR_MEM8(0xB1) |
---|
618 | #define CS20 0 |
---|
619 | #define CS21 1 |
---|
620 | #define CS22 2 |
---|
621 | #define WGM22 3 |
---|
622 | #define FOC2B 6 |
---|
623 | #define FOC2A 7 |
---|
624 | |
---|
625 | #define TCNT2 _SFR_MEM8(0xB2) |
---|
626 | #define TCNT2_0 0 |
---|
627 | #define TCNT2_1 1 |
---|
628 | #define TCNT2_2 2 |
---|
629 | #define TCNT2_3 3 |
---|
630 | #define TCNT2_4 4 |
---|
631 | #define TCNT2_5 5 |
---|
632 | #define TCNT2_6 6 |
---|
633 | #define TCNT2_7 7 |
---|
634 | |
---|
635 | #define OCR2A _SFR_MEM8(0xB3) |
---|
636 | #define OCR2A_0 0 |
---|
637 | #define OCR2A_1 1 |
---|
638 | #define OCR2A_2 2 |
---|
639 | #define OCR2A_3 3 |
---|
640 | #define OCR2A_4 4 |
---|
641 | #define OCR2A_5 5 |
---|
642 | #define OCR2A_6 6 |
---|
643 | #define OCR2A_7 7 |
---|
644 | |
---|
645 | #define OCR2B _SFR_MEM8(0xB4) |
---|
646 | #define OCR2B_0 0 |
---|
647 | #define OCR2B_1 1 |
---|
648 | #define OCR2B_2 2 |
---|
649 | #define OCR2B_3 3 |
---|
650 | #define OCR2B_4 4 |
---|
651 | #define OCR2B_5 5 |
---|
652 | #define OCR2B_6 6 |
---|
653 | #define OCR2B_7 7 |
---|
654 | |
---|
655 | #define ASSR _SFR_MEM8(0xB6) |
---|
656 | #define TCR2BUB 0 |
---|
657 | #define TCR2AUB 1 |
---|
658 | #define OCR2BUB 2 |
---|
659 | #define OCR2AUB 3 |
---|
660 | #define TCN2UB 4 |
---|
661 | #define AS2 5 |
---|
662 | #define EXCLK 6 |
---|
663 | |
---|
664 | #define TWBR _SFR_MEM8(0xB8) |
---|
665 | #define TWBR0 0 |
---|
666 | #define TWBR1 1 |
---|
667 | #define TWBR2 2 |
---|
668 | #define TWBR3 3 |
---|
669 | #define TWBR4 4 |
---|
670 | #define TWBR5 5 |
---|
671 | #define TWBR6 6 |
---|
672 | #define TWBR7 7 |
---|
673 | |
---|
674 | #define TWSR _SFR_MEM8(0xB9) |
---|
675 | #define TWPS0 0 |
---|
676 | #define TWPS1 1 |
---|
677 | #define TWS3 3 |
---|
678 | #define TWS4 4 |
---|
679 | #define TWS5 5 |
---|
680 | #define TWS6 6 |
---|
681 | #define TWS7 7 |
---|
682 | |
---|
683 | #define TWAR _SFR_MEM8(0xBA) |
---|
684 | #define TWGCE 0 |
---|
685 | #define TWA0 1 |
---|
686 | #define TWA1 2 |
---|
687 | #define TWA2 3 |
---|
688 | #define TWA3 4 |
---|
689 | #define TWA4 5 |
---|
690 | #define TWA5 6 |
---|
691 | #define TWA6 7 |
---|
692 | |
---|
693 | #define TWDR _SFR_MEM8(0xBB) |
---|
694 | #define TWD0 0 |
---|
695 | #define TWD1 1 |
---|
696 | #define TWD2 2 |
---|
697 | #define TWD3 3 |
---|
698 | #define TWD4 4 |
---|
699 | #define TWD5 5 |
---|
700 | #define TWD6 6 |
---|
701 | #define TWD7 7 |
---|
702 | |
---|
703 | #define TWCR _SFR_MEM8(0xBC) |
---|
704 | #define TWIE 0 |
---|
705 | #define TWEN 2 |
---|
706 | #define TWWC 3 |
---|
707 | #define TWSTO 4 |
---|
708 | #define TWSTA 5 |
---|
709 | #define TWEA 6 |
---|
710 | #define TWINT 7 |
---|
711 | |
---|
712 | #define TWAMR _SFR_MEM8(0xBD) |
---|
713 | #define TWAM0 1 |
---|
714 | #define TWAM1 2 |
---|
715 | #define TWAM2 3 |
---|
716 | #define TWAM3 4 |
---|
717 | #define TWAM4 5 |
---|
718 | #define TWAM5 6 |
---|
719 | #define TWAM6 7 |
---|
720 | |
---|
721 | #define UCSR0A _SFR_MEM8(0xC0) |
---|
722 | #define MPCM0 0 |
---|
723 | #define U2X0 1 |
---|
724 | #define UPE0 2 |
---|
725 | #define DOR0 3 |
---|
726 | #define FE0 4 |
---|
727 | #define UDRE0 5 |
---|
728 | #define TXC0 6 |
---|
729 | #define RXC0 7 |
---|
730 | |
---|
731 | #define UCSR0B _SFR_MEM8(0xC1) |
---|
732 | #define TXB80 0 |
---|
733 | #define RXB80 1 |
---|
734 | #define UCSZ02 2 |
---|
735 | #define TXEN0 3 |
---|
736 | #define RXEN0 4 |
---|
737 | #define UDRIE0 5 |
---|
738 | #define TXCIE0 6 |
---|
739 | #define RXCIE0 7 |
---|
740 | |
---|
741 | #define UCSR0C _SFR_MEM8(0xC2) |
---|
742 | #define UCPOL0 0 |
---|
743 | #define UCSZ00 1 |
---|
744 | #define UCSZ01 2 |
---|
745 | #define USBS0 3 |
---|
746 | #define UPM00 4 |
---|
747 | #define UPM01 5 |
---|
748 | #define UMSEL00 6 |
---|
749 | #define UMSEL01 7 |
---|
750 | |
---|
751 | #define UBRR0 _SFR_MEM16(0xC4) |
---|
752 | |
---|
753 | #define UBRR0L _SFR_MEM8(0xC4) |
---|
754 | #define _UBRR0 0 |
---|
755 | #define _UBRR1 1 |
---|
756 | #define UBRR2 2 |
---|
757 | #define UBRR3 3 |
---|
758 | #define UBRR4 4 |
---|
759 | #define UBRR5 5 |
---|
760 | #define UBRR6 6 |
---|
761 | #define UBRR7 7 |
---|
762 | |
---|
763 | #define UBRR0H _SFR_MEM8(0xC5) |
---|
764 | #define UBRR8 0 |
---|
765 | #define UBRR9 1 |
---|
766 | #define UBRR10 2 |
---|
767 | #define UBRR11 3 |
---|
768 | |
---|
769 | #define UDR0 _SFR_MEM8(0xC6) |
---|
770 | #define UDR0_0 0 |
---|
771 | #define UDR0_1 1 |
---|
772 | #define UDR0_2 2 |
---|
773 | #define UDR0_3 3 |
---|
774 | #define UDR0_4 4 |
---|
775 | #define UDR0_5 5 |
---|
776 | #define UDR0_6 6 |
---|
777 | #define UDR0_7 7 |
---|
778 | |
---|
779 | |
---|
780 | /* Interrupt vectors */ |
---|
781 | /* Vector 0 is the reset vector */ |
---|
782 | #define INT0_vect_num 1 |
---|
783 | #define INT0_vect _VECTOR(1) /* External Interrupt Request 0 */ |
---|
784 | #define INT1_vect_num 2 |
---|
785 | #define INT1_vect _VECTOR(2) /* External Interrupt Request 1 */ |
---|
786 | #define PCINT0_vect_num 3 |
---|
787 | #define PCINT0_vect _VECTOR(3) /* Pin Change Interrupt Request 0 */ |
---|
788 | #define PCINT1_vect_num 4 |
---|
789 | #define PCINT1_vect _VECTOR(4) /* Pin Change Interrupt Request 0 */ |
---|
790 | #define PCINT2_vect_num 5 |
---|
791 | #define PCINT2_vect _VECTOR(5) /* Pin Change Interrupt Request 1 */ |
---|
792 | #define WDT_vect_num 6 |
---|
793 | #define WDT_vect _VECTOR(6) /* Watchdog Time-out Interrupt */ |
---|
794 | #define TIMER2_COMPA_vect_num 7 |
---|
795 | #define TIMER2_COMPA_vect _VECTOR(7) /* Timer/Counter2 Compare Match A */ |
---|
796 | #define TIMER2_COMPB_vect_num 8 |
---|
797 | #define TIMER2_COMPB_vect _VECTOR(8) /* Timer/Counter2 Compare Match A */ |
---|
798 | #define TIMER2_OVF_vect_num 9 |
---|
799 | #define TIMER2_OVF_vect _VECTOR(9) /* Timer/Counter2 Overflow */ |
---|
800 | #define TIMER1_CAPT_vect_num 10 |
---|
801 | #define TIMER1_CAPT_vect _VECTOR(10) /* Timer/Counter1 Capture Event */ |
---|
802 | #define TIMER1_COMPA_vect_num 11 |
---|
803 | #define TIMER1_COMPA_vect _VECTOR(11) /* Timer/Counter1 Compare Match A */ |
---|
804 | #define TIMER1_COMPB_vect_num 12 |
---|
805 | #define TIMER1_COMPB_vect _VECTOR(12) /* Timer/Counter1 Compare Match B */ |
---|
806 | #define TIMER1_OVF_vect_num 13 |
---|
807 | #define TIMER1_OVF_vect _VECTOR(13) /* Timer/Counter1 Overflow */ |
---|
808 | #define TIMER0_COMPA_vect_num 14 |
---|
809 | #define TIMER0_COMPA_vect _VECTOR(14) /* TimerCounter0 Compare Match A */ |
---|
810 | #define TIMER0_COMPB_vect_num 15 |
---|
811 | #define TIMER0_COMPB_vect _VECTOR(15) /* TimerCounter0 Compare Match B */ |
---|
812 | #define TIMER0_OVF_vect_num 16 |
---|
813 | #define TIMER0_OVF_vect _VECTOR(16) /* Timer/Couner0 Overflow */ |
---|
814 | #define SPI_STC_vect_num 17 |
---|
815 | #define SPI_STC_vect _VECTOR(17) /* SPI Serial Transfer Complete */ |
---|
816 | #define USART_RX_vect_num 18 |
---|
817 | #define USART_RX_vect _VECTOR(18) /* USART Rx Complete */ |
---|
818 | #define USART_UDRE_vect_num 19 |
---|
819 | #define USART_UDRE_vect _VECTOR(19) /* USART, Data Register Empty */ |
---|
820 | #define USART_TX_vect_num 20 |
---|
821 | #define USART_TX_vect _VECTOR(20) /* USART Tx Complete */ |
---|
822 | #define ADC_vect_num 21 |
---|
823 | #define ADC_vect _VECTOR(21) /* ADC Conversion Complete */ |
---|
824 | #define EE_READY_vect_num 22 |
---|
825 | #define EE_READY_vect _VECTOR(22) /* EEPROM Ready */ |
---|
826 | #define ANALOG_COMP_vect_num 23 |
---|
827 | #define ANALOG_COMP_vect _VECTOR(23) /* Analog Comparator */ |
---|
828 | #define TWI_vect_num 24 |
---|
829 | #define TWI_vect _VECTOR(24) /* Two-wire Serial Interface */ |
---|
830 | #define SPM_Ready_vect_num 25 |
---|
831 | #define SPM_Ready_vect _VECTOR(25) /* Store Program Memory Read */ |
---|
832 | |
---|
833 | #define _VECTOR_SIZE 2 /* Size of individual vector. */ |
---|
834 | #define _VECTORS_SIZE (26 * _VECTOR_SIZE) |
---|
835 | |
---|
836 | |
---|
837 | /* Constants */ |
---|
838 | #define SPM_PAGESIZE (64) |
---|
839 | #define RAMSTART (0x100) |
---|
840 | #define RAMSIZE (1024) |
---|
841 | #define RAMEND (RAMSTART + RAMSIZE - 1) |
---|
842 | #define XRAMSTART (NA) |
---|
843 | #define XRAMSIZE (0) |
---|
844 | #define XRAMEND (RAMEND) |
---|
845 | #define E2END (0x1FF) |
---|
846 | #define E2PAGESIZE (4) |
---|
847 | #define FLASHEND (0x1FFF) |
---|
848 | |
---|
849 | |
---|
850 | /* Fuses */ |
---|
851 | #define FUSE_MEMORY_SIZE 3 |
---|
852 | |
---|
853 | /* Low Fuse Byte */ |
---|
854 | #define FUSE_CKSEL0 (unsigned char)~_BV(0) /* Select Clock Source */ |
---|
855 | #define FUSE_CKSEL1 (unsigned char)~_BV(1) /* Select Clock Source */ |
---|
856 | #define FUSE_CKSEL2 (unsigned char)~_BV(2) /* Select Clock Source */ |
---|
857 | #define FUSE_CKSEL3 (unsigned char)~_BV(3) /* Select Clock Source */ |
---|
858 | #define FUSE_SUT0 (unsigned char)~_BV(4) /* Select start-up time */ |
---|
859 | #define FUSE_SUT1 (unsigned char)~_BV(5) /* Select start-up time */ |
---|
860 | #define FUSE_CKOUT (unsigned char)~_BV(6) /* Clock output */ |
---|
861 | #define FUSE_CKDIV8 (unsigned char)~_BV(7) /* Divide clock by 8 */ |
---|
862 | #define LFUSE_DEFAULT (FUSE_CKDIV8 & FUSE_SUT0 & FUSE_CKSEL3 & FUSE_CKSEL2 & FUSE_CKSEL0) |
---|
863 | |
---|
864 | /* High Fuse Byte */ |
---|
865 | #define FUSE_BODLEVEL0 (unsigned char)~_BV(0) /* Brown-out Detector trigger level */ |
---|
866 | #define FUSE_BODLEVEL1 (unsigned char)~_BV(1) /* Brown-out Detector trigger level */ |
---|
867 | #define FUSE_BODLEVEL2 (unsigned char)~_BV(2) /* Brown-out Detector trigger level */ |
---|
868 | #define FUSE_EESAVE (unsigned char)~_BV(3) /* EEPROM memory is preserved through chip erase */ |
---|
869 | #define FUSE_WDTON (unsigned char)~_BV(4) /* Watchdog Timer Always On */ |
---|
870 | #define FUSE_SPIEN (unsigned char)~_BV(5) /* Enable Serial programming and Data Downloading */ |
---|
871 | #define FUSE_DWEN (unsigned char)~_BV(6) /* debugWIRE Enable */ |
---|
872 | #define FUSE_RSTDISBL (unsigned char)~_BV(7) /* External reset disable */ |
---|
873 | #define HFUSE_DEFAULT (FUSE_SPIEN) |
---|
874 | |
---|
875 | /* Extended Fuse Byte */ |
---|
876 | #define FUSE_BOOTRST (unsigned char)~_BV(0) /* Select reset vector */ |
---|
877 | #define FUSE_BOOTSZ0 (unsigned char)~_BV(1) /* Select boot size */ |
---|
878 | #define FUSE_BOOTSZ1 (unsigned char)~_BV(2) /* Select boot size */ |
---|
879 | #define EFUSE_DEFAULT (FUSE_BOOTSZ1 & FUSE_BOOTSZ0) |
---|
880 | |
---|
881 | |
---|
882 | /* Lock Bits */ |
---|
883 | #define __LOCK_BITS_EXIST |
---|
884 | #define __BOOT_LOCK_BITS_0_EXIST |
---|
885 | #define __BOOT_LOCK_BITS_1_EXIST |
---|
886 | |
---|
887 | |
---|
888 | /* Signature */ |
---|
889 | #define SIGNATURE_0 0x1E |
---|
890 | #define SIGNATURE_1 0x93 |
---|
891 | #define SIGNATURE_2 0x0F |
---|
892 | |
---|
893 | |
---|
894 | /* Device Pin Definitions */ |
---|
895 | #define PCINT19_DDR DDRD |
---|
896 | #define PCINT19_PORT PORTD |
---|
897 | #define PCINT19_PIN PIND |
---|
898 | #define PCINT19_BIT 3 |
---|
899 | |
---|
900 | #define OC2B_DDR DDRD |
---|
901 | #define OC2B_PORT PORTD |
---|
902 | #define OC2B_PIN PIND |
---|
903 | #define OC2B_BIT 3 |
---|
904 | |
---|
905 | #define INT1_DDR DDRD |
---|
906 | #define INT1_PORT PORTD |
---|
907 | #define INT1_PIN PIND |
---|
908 | #define INT1_BIT 3 |
---|
909 | |
---|
910 | #define XCK_DDR DDRD |
---|
911 | #define XCK_PORT PORTD |
---|
912 | #define XCK_PIN PIND |
---|
913 | #define XCK_BIT 4 |
---|
914 | |
---|
915 | #define T0_DDR DDRD |
---|
916 | #define T0_PORT PORTD |
---|
917 | #define T0_PIN PIND |
---|
918 | #define T0_BIT 4 |
---|
919 | |
---|
920 | #define PCINT20_DDR DDRD |
---|
921 | #define PCINT20_PORT PORTD |
---|
922 | #define PCINT20_PIN PIND |
---|
923 | #define PCINT20_BIT 4 |
---|
924 | |
---|
925 | #define PCINT6_DDR DDRB |
---|
926 | #define PCINT6_PORT PORTB |
---|
927 | #define PCINT6_PIN PINB |
---|
928 | #define PCINT6_BIT 6 |
---|
929 | |
---|
930 | #define PCINT7_DDR DDRB |
---|
931 | #define PCINT7_PORT PORTB |
---|
932 | #define PCINT7_PIN PINB |
---|
933 | #define PCINT7_BIT 7 |
---|
934 | |
---|
935 | #define T1_DDR DDRD |
---|
936 | #define T1_PORT PORTD |
---|
937 | #define T1_PIN PIND |
---|
938 | #define T1_BIT 5 |
---|
939 | |
---|
940 | #define OC0B_DDR DDRD |
---|
941 | #define OC0B_PORT PORTD |
---|
942 | #define OC0B_PIN PIND |
---|
943 | #define OC0B_BIT 5 |
---|
944 | |
---|
945 | #define PCINT21_DDR DDRD |
---|
946 | #define PCINT21_PORT PORTD |
---|
947 | #define PCINT21_PIN PIND |
---|
948 | #define PCINT21_BIT 5 |
---|
949 | |
---|
950 | #define AIN0_DDR DDRD |
---|
951 | #define AIN0_PORT PORTD |
---|
952 | #define AIN0_PIN PIND |
---|
953 | #define AIN0_BIT 6 |
---|
954 | |
---|
955 | #define OC0A_DDR DDRD |
---|
956 | #define OC0A_PORT PORTD |
---|
957 | #define OC0A_PIN PIND |
---|
958 | #define OC0A_BIT 6 |
---|
959 | |
---|
960 | #define PCINT22_DDR DDRD |
---|
961 | #define PCINT22_PORT PORTD |
---|
962 | #define PCINT22_PIN PIND |
---|
963 | #define PCINT22_BIT 6 |
---|
964 | |
---|
965 | #define AIN1_DDR DDRD |
---|
966 | #define AIN1_PORT PORTD |
---|
967 | #define AIN1_PIN PIND |
---|
968 | #define AIN1_BIT 7 |
---|
969 | |
---|
970 | #define PCINT23_DDR DDRD |
---|
971 | #define PCINT23_PORT PORTD |
---|
972 | #define PCINT23_PIN PIND |
---|
973 | #define PCINT23_BIT 7 |
---|
974 | |
---|
975 | #define ICP1_DDR DDRB |
---|
976 | #define ICP1_PORT PORTB |
---|
977 | #define ICP1_PIN PINB |
---|
978 | #define ICP1_BIT 0 |
---|
979 | |
---|
980 | #define CLKO_DDR DDRB |
---|
981 | #define CLKO_PORT PORTB |
---|
982 | #define CLKO_PIN PINB |
---|
983 | #define CLKO_BIT 0 |
---|
984 | |
---|
985 | #define PCINT0_DDR DDRB |
---|
986 | #define PCINT0_PORT PORTB |
---|
987 | #define PCINT0_PIN PINB |
---|
988 | #define PCINT0_BIT 0 |
---|
989 | |
---|
990 | #define OC1A_DDR DDRB |
---|
991 | #define OC1A_PORT PORTB |
---|
992 | #define OC1A_PIN PINB |
---|
993 | #define OC1A_BIT 1 |
---|
994 | |
---|
995 | #define PCINT1_DDR DDRB |
---|
996 | #define PCINT1_PORT PORTB |
---|
997 | #define PCINT1_PIN PINB |
---|
998 | #define PCINT1_BIT 1 |
---|
999 | |
---|
1000 | #define SS_DDR DDRB |
---|
1001 | #define SS_PORT PORTB |
---|
1002 | #define SS_PIN PINB |
---|
1003 | #define SS_BIT 2 |
---|
1004 | |
---|
1005 | #define OC1B_DDR DDRB |
---|
1006 | #define OC1B_PORT PORTB |
---|
1007 | #define OC1B_PIN PINB |
---|
1008 | #define OC1B_BIT 2 |
---|
1009 | |
---|
1010 | #define PCINT2_DDR DDRB |
---|
1011 | #define PCINT2_PORT PORTB |
---|
1012 | #define PCINT2_PIN PINB |
---|
1013 | #define PCINT2_BIT 2 |
---|
1014 | |
---|
1015 | #define MOSI_DDR DDRB |
---|
1016 | #define MOSI_PORT PORTB |
---|
1017 | #define MOSI_PIN PINB |
---|
1018 | #define MOSI_BIT 3 |
---|
1019 | |
---|
1020 | #define OC2A_DDR DDRB |
---|
1021 | #define OC2A_PORT PORTB |
---|
1022 | #define OC2A_PIN PINB |
---|
1023 | #define OC2A_BIT 3 |
---|
1024 | |
---|
1025 | #define PCINT3_DDR DDRB |
---|
1026 | #define PCINT3_PORT PORTB |
---|
1027 | #define PCINT3_PIN PINB |
---|
1028 | #define PCINT3_BIT 3 |
---|
1029 | |
---|
1030 | #define MISO_DDR DDRB |
---|
1031 | #define MISO_PORT PORTB |
---|
1032 | #define MISO_PIN PINB |
---|
1033 | #define MISO_BIT 4 |
---|
1034 | |
---|
1035 | #define PCINT4_DDR DDRB |
---|
1036 | #define PCINT4_PORT PORTB |
---|
1037 | #define PCINT4_PIN PINB |
---|
1038 | #define PCINT4_BIT 4 |
---|
1039 | |
---|
1040 | #define SCK_DDR DDRB |
---|
1041 | #define SCK_PORT PORTB |
---|
1042 | #define SCK_PIN PINB |
---|
1043 | #define SCK_BIT 5 |
---|
1044 | |
---|
1045 | #define PCINT5_DDR DDRB |
---|
1046 | #define PCINT5_PORT PORTB |
---|
1047 | #define PCINT5_PIN PINB |
---|
1048 | #define PCINT5_BIT 5 |
---|
1049 | |
---|
1050 | #define ADC6_DDR DDRADC |
---|
1051 | #define ADC6_PORT PORTADC |
---|
1052 | #define ADC6_PIN PINADC |
---|
1053 | #define ADC6_BIT ADC6 |
---|
1054 | |
---|
1055 | #define ADC7_DDR DDRADC |
---|
1056 | #define ADC7_PORT PORTADC |
---|
1057 | #define ADC7_PIN PINADC |
---|
1058 | #define ADC7_BIT ADC7 |
---|
1059 | |
---|
1060 | #define ADC0_DDR DDRC |
---|
1061 | #define ADC0_PORT PORTC |
---|
1062 | #define ADC0_PIN PINC |
---|
1063 | #define ADC0_BIT 0 |
---|
1064 | |
---|
1065 | #define PCINT8_DDR DDRC |
---|
1066 | #define PCINT8_PORT PORTC |
---|
1067 | #define PCINT8_PIN PINC |
---|
1068 | #define PCINT8_BIT 0 |
---|
1069 | |
---|
1070 | #define ADC1_DDR DDRC |
---|
1071 | #define ADC1_PORT PORTC |
---|
1072 | #define ADC1_PIN PINC |
---|
1073 | #define ADC1_BIT 1 |
---|
1074 | |
---|
1075 | #define PCINT9_DDR DDRC |
---|
1076 | #define PCINT9_PORT PORTC |
---|
1077 | #define PCINT9_PIN PINC |
---|
1078 | #define PCINT9_BIT 1 |
---|
1079 | |
---|
1080 | #define ADC2_DDR DDRC |
---|
1081 | #define ADC2_PORT PORTC |
---|
1082 | #define ADC2_PIN PINC |
---|
1083 | #define ADC2_BIT 2 |
---|
1084 | |
---|
1085 | #define PCINT10_DDR DDRC |
---|
1086 | #define PCINT10_PORT PORTC |
---|
1087 | #define PCINT10_PIN PINC |
---|
1088 | #define PCINT10_BIT 2 |
---|
1089 | |
---|
1090 | #define ADC3_DDR DDRC |
---|
1091 | #define ADC3_PORT PORTC |
---|
1092 | #define ADC3_PIN PINC |
---|
1093 | #define ADC3_BIT 3 |
---|
1094 | |
---|
1095 | #define PCINT11_DDR DDRC |
---|
1096 | #define PCINT11_PORT PORTC |
---|
1097 | #define PCINT11_PIN PINC |
---|
1098 | #define PCINT11_BIT 3 |
---|
1099 | |
---|
1100 | #define ADC4_DDR DDRC |
---|
1101 | #define ADC4_PORT PORTC |
---|
1102 | #define ADC4_PIN PINC |
---|
1103 | #define ADC4_BIT 4 |
---|
1104 | |
---|
1105 | #define SDA_DDR DDRC |
---|
1106 | #define SDA_PORT PORTC |
---|
1107 | #define SDA_PIN PINC |
---|
1108 | #define SDA_BIT 4 |
---|
1109 | |
---|
1110 | #define PCINT12_DDR DDRC |
---|
1111 | #define PCINT12_PORT PORTC |
---|
1112 | #define PCINT12_PIN PINC |
---|
1113 | #define PCINT12_BIT 4 |
---|
1114 | |
---|
1115 | #define ADC5_DDR DDRC |
---|
1116 | #define ADC5_PORT PORTC |
---|
1117 | #define ADC5_PIN PINC |
---|
1118 | #define ADC5_BIT 5 |
---|
1119 | |
---|
1120 | #define SCL_DDR DDRC |
---|
1121 | #define SCL_PORT PORTC |
---|
1122 | #define SCL_PIN PINC |
---|
1123 | #define SCL_BIT 5 |
---|
1124 | |
---|
1125 | #define PCINT13_DDR DDRC |
---|
1126 | #define PCINT13_PORT PORTC |
---|
1127 | #define PCINT13_PIN PINC |
---|
1128 | #define PCINT13_BIT 5 |
---|
1129 | |
---|
1130 | #define PCINT14_DDR DDRC |
---|
1131 | #define PCINT14_PORT PORTC |
---|
1132 | #define PCINT14_PIN PINC |
---|
1133 | #define PCINT14_BIT 6 |
---|
1134 | |
---|
1135 | #define RXD_DDR DDRD |
---|
1136 | #define RXD_PORT PORTD |
---|
1137 | #define RXD_PIN PIND |
---|
1138 | #define RXD_BIT 0 |
---|
1139 | |
---|
1140 | #define PCINT16_DDR DDRD |
---|
1141 | #define PCINT16_PORT PORTD |
---|
1142 | #define PCINT16_PIN PIND |
---|
1143 | #define PCINT16_BIT 0 |
---|
1144 | |
---|
1145 | #define TXD_DDR DDRD |
---|
1146 | #define TXD_PORT PORTD |
---|
1147 | #define TXD_PIN PIND |
---|
1148 | #define TXD_BIT 1 |
---|
1149 | |
---|
1150 | #define PCINT17_DDR DDRD |
---|
1151 | #define PCINT17_PORT PORTD |
---|
1152 | #define PCINT17_PIN PIND |
---|
1153 | #define PCINT17_BIT 1 |
---|
1154 | |
---|
1155 | #define INT0_DDR DDRD |
---|
1156 | #define INT0_PORT PORTD |
---|
1157 | #define INT0_PIN PIND |
---|
1158 | #define INT0_BIT 2 |
---|
1159 | |
---|
1160 | #define PCINT18_DDR DDRD |
---|
1161 | #define PCINT18_PORT PORTD |
---|
1162 | #define PCINT18_PIN PIND |
---|
1163 | #define PCINT18_BIT 2 |
---|
1164 | |
---|
1165 | #endif /* _AVR_ATmega88PA_H_ */ |
---|
1166 | |
---|