1 | /** |
---|
2 | * @file avr/iom16hva2.h |
---|
3 | * |
---|
4 | * @brief Definitions for ATmega16HVA2 |
---|
5 | * |
---|
6 | * This file should only be included from <avr/io.h>, never directly. |
---|
7 | */ |
---|
8 | |
---|
9 | /* |
---|
10 | * Copyright (c) 2009 Atmel Corporation |
---|
11 | * All rights reserved. |
---|
12 | * |
---|
13 | * Redistribution and use in source and binary forms, with or without |
---|
14 | * modification, are permitted provided that the following conditions are met: |
---|
15 | * |
---|
16 | * * Redistributions of source code must retain the above copyright |
---|
17 | * notice, this list of conditions and the following disclaimer. |
---|
18 | * |
---|
19 | * * Redistributions in binary form must reproduce the above copyright |
---|
20 | * notice, this list of conditions and the following disclaimer in |
---|
21 | * the documentation and/or other materials provided with the |
---|
22 | * distribution. |
---|
23 | * |
---|
24 | * * Neither the name of the copyright holders nor the names of |
---|
25 | * contributors may be used to endorse or promote products derived |
---|
26 | * from this software without specific prior written permission. |
---|
27 | * |
---|
28 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
---|
29 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
---|
30 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
---|
31 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE |
---|
32 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
---|
33 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
---|
34 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
---|
35 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
---|
36 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
---|
37 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
---|
38 | * POSSIBILITY OF SUCH DAMAGE. |
---|
39 | */ |
---|
40 | |
---|
41 | #ifndef _AVR_IO_H_ |
---|
42 | # error "Include <avr/io.h> instead of this file." |
---|
43 | #endif |
---|
44 | |
---|
45 | #ifndef _AVR_IOXXX_H_ |
---|
46 | # define _AVR_IOXXX_H_ "iom16hva2.h" |
---|
47 | #else |
---|
48 | # error "Attempt to include more than one <avr/ioXXX.h> file." |
---|
49 | #endif |
---|
50 | |
---|
51 | |
---|
52 | #ifndef _AVR_ATmega16HVA2_H_ |
---|
53 | #define _AVR_ATmega16HVA2_H_ 1 |
---|
54 | |
---|
55 | /** |
---|
56 | * @defgroup Avr_iom16hva2 ATmega16HVA2 Definitions |
---|
57 | * |
---|
58 | * @ingroup avr |
---|
59 | */ |
---|
60 | /**@{*/ |
---|
61 | |
---|
62 | /* Registers and associated bit numbers. */ |
---|
63 | |
---|
64 | #define PINA _SFR_IO8(0x00) |
---|
65 | #define PINA0 0 |
---|
66 | #define PINA1 1 |
---|
67 | |
---|
68 | #define DDRA _SFR_IO8(0x01) |
---|
69 | #define DDA0 0 |
---|
70 | #define DDA1 1 |
---|
71 | |
---|
72 | #define PORTA _SFR_IO8(0x02) |
---|
73 | #define PORTA0 0 |
---|
74 | #define PORTA1 1 |
---|
75 | |
---|
76 | #define PINB _SFR_IO8(0x03) |
---|
77 | #define PINB0 0 |
---|
78 | #define PINB1 1 |
---|
79 | #define PINB2 2 |
---|
80 | #define PINB3 3 |
---|
81 | |
---|
82 | #define DDRB _SFR_IO8(0x04) |
---|
83 | #define DDB0 0 |
---|
84 | #define DDB1 1 |
---|
85 | #define DDB2 2 |
---|
86 | #define DDB3 3 |
---|
87 | |
---|
88 | #define PORTB _SFR_IO8(0x05) |
---|
89 | #define PORTB0 0 |
---|
90 | #define PORTB1 1 |
---|
91 | #define PORTB2 2 |
---|
92 | #define PORTB3 3 |
---|
93 | |
---|
94 | #define PINC _SFR_IO8(0x06) |
---|
95 | #define PINC0 0 |
---|
96 | |
---|
97 | #define PORTC _SFR_IO8(0x08) |
---|
98 | #define PORTC0 0 |
---|
99 | |
---|
100 | #define TIFR0 _SFR_IO8(0x15) |
---|
101 | #define TOV0 0 |
---|
102 | #define OCF0A 1 |
---|
103 | #define OCF0B 2 |
---|
104 | #define ICF0 3 |
---|
105 | |
---|
106 | #define TIFR1 _SFR_IO8(0x16) |
---|
107 | #define TOV1 0 |
---|
108 | #define OCF1A 1 |
---|
109 | #define OCF1B 2 |
---|
110 | #define ICF1 3 |
---|
111 | |
---|
112 | #define OSICSR _SFR_IO8(0x17) |
---|
113 | #define OSIEN 0 |
---|
114 | #define OSIST 1 |
---|
115 | #define OSISEL0 4 |
---|
116 | |
---|
117 | #define PCIFR _SFR_IO8(0x1B) |
---|
118 | #define PCIF0 0 |
---|
119 | |
---|
120 | #define EIFR _SFR_IO8(0x1C) |
---|
121 | #define INTF0 0 |
---|
122 | #define INTF1 1 |
---|
123 | #define INTF2 2 |
---|
124 | |
---|
125 | #define EIMSK _SFR_IO8(0x1D) |
---|
126 | #define INT0 0 |
---|
127 | #define INT1 1 |
---|
128 | #define INT2 2 |
---|
129 | |
---|
130 | #define GPIOR0 _SFR_IO8(0x1E) |
---|
131 | #define GPIOR00 0 |
---|
132 | #define GPIOR01 1 |
---|
133 | #define GPIOR02 2 |
---|
134 | #define GPIOR03 3 |
---|
135 | #define GPIOR04 4 |
---|
136 | #define GPIOR05 5 |
---|
137 | #define GPIOR06 6 |
---|
138 | #define GPIOR07 7 |
---|
139 | |
---|
140 | #define EECR _SFR_IO8(0x1F) |
---|
141 | #define EERE 0 |
---|
142 | #define EEPE 1 |
---|
143 | #define EEMPE 2 |
---|
144 | #define EERIE 3 |
---|
145 | #define EEPM0 4 |
---|
146 | #define EEPM1 5 |
---|
147 | |
---|
148 | #define EEDR _SFR_IO8(0x20) |
---|
149 | #define EEDR0 0 |
---|
150 | #define EEDR1 1 |
---|
151 | #define EEDR2 2 |
---|
152 | #define EEDR3 3 |
---|
153 | #define EEDR4 4 |
---|
154 | #define EEDR5 5 |
---|
155 | #define EEDR6 6 |
---|
156 | #define EEDR7 7 |
---|
157 | |
---|
158 | #define EEAR _SFR_IO8(0x21) |
---|
159 | #define EEAR0 0 |
---|
160 | #define EEAR1 1 |
---|
161 | #define EEAR2 2 |
---|
162 | #define EEAR3 3 |
---|
163 | #define EEAR4 4 |
---|
164 | #define EEAR5 5 |
---|
165 | #define EEAR6 6 |
---|
166 | #define EEAR7 7 |
---|
167 | |
---|
168 | #define GTCCR _SFR_IO8(0x23) |
---|
169 | #define PSRSYNC 0 |
---|
170 | #define TSM 7 |
---|
171 | |
---|
172 | #define TCCR0A _SFR_IO8(0x24) |
---|
173 | #define WGM00 0 |
---|
174 | #define ICS0 3 |
---|
175 | #define ICES0 4 |
---|
176 | #define ICNC0 5 |
---|
177 | #define ICEN0 6 |
---|
178 | #define TCW0 7 |
---|
179 | |
---|
180 | #define TCCR0B _SFR_IO8(0x25) |
---|
181 | #define CS00 0 |
---|
182 | #define CS01 1 |
---|
183 | #define CS02 2 |
---|
184 | |
---|
185 | #define TCNT0 _SFR_IO16(0x26) |
---|
186 | |
---|
187 | #define TCNT0L _SFR_IO8(0x26) |
---|
188 | #define TCNT0L0 0 |
---|
189 | #define TCNT0L1 1 |
---|
190 | #define TCNT0L2 2 |
---|
191 | #define TCNT0L3 3 |
---|
192 | #define TCNT0L4 4 |
---|
193 | #define TCNT0L5 5 |
---|
194 | #define TCNT0L6 6 |
---|
195 | #define TCNT0L7 7 |
---|
196 | |
---|
197 | #define TCNT0H _SFR_IO8(0x27) |
---|
198 | #define TCNT0H0 0 |
---|
199 | #define TCNT0H1 1 |
---|
200 | #define TCNT0H2 2 |
---|
201 | #define TCNT0H3 3 |
---|
202 | #define TCNT0H4 4 |
---|
203 | #define TCNT0H5 5 |
---|
204 | #define TCNT0H6 6 |
---|
205 | #define TCNT0H7 7 |
---|
206 | |
---|
207 | #define OCR0A _SFR_IO8(0x28) |
---|
208 | #define OCR0A0 0 |
---|
209 | #define OCR0A1 1 |
---|
210 | #define OCR0A2 2 |
---|
211 | #define OCR0A3 3 |
---|
212 | #define OCR0A4 4 |
---|
213 | #define OCR0A5 5 |
---|
214 | #define OCR0A6 6 |
---|
215 | #define OCR0A7 7 |
---|
216 | |
---|
217 | #define OCR0B _SFR_IO8(0x29) |
---|
218 | #define OCR0B0 0 |
---|
219 | #define OCR0B1 1 |
---|
220 | #define OCR0B2 2 |
---|
221 | #define OCR0B3 3 |
---|
222 | #define OCR0B4 4 |
---|
223 | #define OCR0B5 5 |
---|
224 | #define OCR0B6 6 |
---|
225 | #define OCR0B7 7 |
---|
226 | |
---|
227 | #define GPIOR1 _SFR_IO8(0x2A) |
---|
228 | #define GPIOR10 0 |
---|
229 | #define GPIOR11 1 |
---|
230 | #define GPIOR12 2 |
---|
231 | #define GPIOR13 3 |
---|
232 | #define GPIOR14 4 |
---|
233 | #define GPIOR15 5 |
---|
234 | #define GPIOR16 6 |
---|
235 | #define GPIOR17 7 |
---|
236 | |
---|
237 | #define GPIOR2 _SFR_IO8(0x2B) |
---|
238 | #define GPIOR20 0 |
---|
239 | #define GPIOR21 1 |
---|
240 | #define GPIOR22 2 |
---|
241 | #define GPIOR23 3 |
---|
242 | #define GPIOR24 4 |
---|
243 | #define GPIOR25 5 |
---|
244 | #define GPIOR26 6 |
---|
245 | #define GPIOR27 7 |
---|
246 | |
---|
247 | #define SPCR _SFR_IO8(0x2C) |
---|
248 | #define SPR0 0 |
---|
249 | #define SPR1 1 |
---|
250 | #define CPHA 2 |
---|
251 | #define CPOL 3 |
---|
252 | #define MSTR 4 |
---|
253 | #define DORD 5 |
---|
254 | #define SPE 6 |
---|
255 | #define SPIE 7 |
---|
256 | |
---|
257 | #define SPSR _SFR_IO8(0x2D) |
---|
258 | #define SPI2X 0 |
---|
259 | #define WCOL 6 |
---|
260 | #define SPIF 7 |
---|
261 | |
---|
262 | #define SPDR _SFR_IO8(0x2E) |
---|
263 | #define SPDR0 0 |
---|
264 | #define SPDR1 1 |
---|
265 | #define SPDR2 2 |
---|
266 | #define SPDR3 3 |
---|
267 | #define SPDR4 4 |
---|
268 | #define SPDR5 5 |
---|
269 | #define SPDR6 6 |
---|
270 | #define SPDR7 7 |
---|
271 | |
---|
272 | #define DWDR _SFR_IO8(0x31) |
---|
273 | |
---|
274 | #define SMCR _SFR_IO8(0x33) |
---|
275 | #define SE 0 |
---|
276 | #define SM0 1 |
---|
277 | #define SM1 2 |
---|
278 | #define SM2 3 |
---|
279 | |
---|
280 | #define MCUSR _SFR_IO8(0x34) |
---|
281 | #define PORF 0 |
---|
282 | #define EXTRF 1 |
---|
283 | #define BODRF 2 |
---|
284 | #define WDRF 3 |
---|
285 | #define OCDRF 4 |
---|
286 | |
---|
287 | #define MCUCR _SFR_IO8(0x35) |
---|
288 | #define PUD 4 |
---|
289 | #define CKOE 5 |
---|
290 | |
---|
291 | #define SPMCSR _SFR_IO8(0x37) |
---|
292 | #define SPMEN 0 |
---|
293 | #define PGERS 1 |
---|
294 | #define PGWRT 2 |
---|
295 | #define RFLB 3 |
---|
296 | #define CTPB 4 |
---|
297 | #define SIGRD 5 |
---|
298 | |
---|
299 | #define WDTCSR _SFR_MEM8(0x60) |
---|
300 | #define WDP0 0 |
---|
301 | #define WDP1 1 |
---|
302 | #define WDP2 2 |
---|
303 | #define WDE 3 |
---|
304 | #define WDCE 4 |
---|
305 | #define WDP3 5 |
---|
306 | #define WDIE 6 |
---|
307 | #define WDIF 7 |
---|
308 | |
---|
309 | #define CLKPR _SFR_MEM8(0x61) |
---|
310 | #define CLKPS0 0 |
---|
311 | #define CLKPS1 1 |
---|
312 | #define CLKPCE 7 |
---|
313 | |
---|
314 | #define PRR0 _SFR_MEM8(0x64) |
---|
315 | #define PRVADC 0 |
---|
316 | #define PRTIM0 1 |
---|
317 | #define PRTIM1 2 |
---|
318 | #define PRSPI 3 |
---|
319 | #define PRVRM 5 |
---|
320 | |
---|
321 | #define FOSCCAL _SFR_MEM8(0x66) |
---|
322 | #define FCAL0 0 |
---|
323 | #define FCAL1 1 |
---|
324 | #define FCAL2 2 |
---|
325 | #define FCAL3 3 |
---|
326 | #define FCAL4 4 |
---|
327 | #define FCAL5 5 |
---|
328 | #define FCAL6 6 |
---|
329 | #define FCAL7 7 |
---|
330 | |
---|
331 | #define PCICR _SFR_MEM8(0x68) |
---|
332 | #define PCIE0 0 |
---|
333 | |
---|
334 | #define EICRA _SFR_MEM8(0x69) |
---|
335 | #define ISC00 0 |
---|
336 | #define ISC01 1 |
---|
337 | #define ISC10 2 |
---|
338 | #define ISC11 3 |
---|
339 | #define ISC20 4 |
---|
340 | #define ISC21 5 |
---|
341 | |
---|
342 | #define PCMSK0 _SFR_MEM8(0x6B) |
---|
343 | #define PCINT0 0 |
---|
344 | #define PCINT1 1 |
---|
345 | #define PCINT2 2 |
---|
346 | #define PCINT3 3 |
---|
347 | |
---|
348 | #define TIMSK0 _SFR_MEM8(0x6E) |
---|
349 | #define TOIE0 0 |
---|
350 | #define OCIE0A 1 |
---|
351 | #define OCIE0B 2 |
---|
352 | #define ICIE0 3 |
---|
353 | |
---|
354 | #define TIMSK1 _SFR_MEM8(0x6F) |
---|
355 | #define TOIE1 0 |
---|
356 | #define OCIE1A 1 |
---|
357 | #define OCIE1B 2 |
---|
358 | #define ICIE1 3 |
---|
359 | |
---|
360 | #define VADC _SFR_MEM16(0x78) |
---|
361 | |
---|
362 | #define VADCL _SFR_MEM8(0x78) |
---|
363 | #define VADC0 0 |
---|
364 | #define VADC1 1 |
---|
365 | #define VADC2 2 |
---|
366 | #define VADC3 3 |
---|
367 | #define VADC4 4 |
---|
368 | #define VADC5 5 |
---|
369 | #define VADC6 6 |
---|
370 | #define VADC7 7 |
---|
371 | |
---|
372 | #define VADCH _SFR_MEM8(0x79) |
---|
373 | #define VADC8 0 |
---|
374 | #define VADC9 1 |
---|
375 | #define VADC10 2 |
---|
376 | #define VADC11 3 |
---|
377 | |
---|
378 | #define VADCSR _SFR_MEM8(0x7A) |
---|
379 | #define VADCCIE 0 |
---|
380 | #define VADCCIF 1 |
---|
381 | #define VADSC 2 |
---|
382 | #define VADEN 3 |
---|
383 | |
---|
384 | #define VADMUX _SFR_MEM8(0x7C) |
---|
385 | #define VADMUX0 0 |
---|
386 | #define VADMUX1 1 |
---|
387 | #define VADMUX2 2 |
---|
388 | #define VADMUX3 3 |
---|
389 | |
---|
390 | #define DIDR0 _SFR_MEM8(0x7E) |
---|
391 | #define PA0DID 0 |
---|
392 | #define PA1DID 1 |
---|
393 | |
---|
394 | #define TCCR1A _SFR_MEM8(0x80) |
---|
395 | #define WGM10 0 |
---|
396 | #define ICS1 3 |
---|
397 | #define ICES1 4 |
---|
398 | #define ICNC1 5 |
---|
399 | #define ICEN1 6 |
---|
400 | #define TCW1 7 |
---|
401 | |
---|
402 | #define TCCR1B _SFR_MEM8(0x81) |
---|
403 | #define CS10 0 |
---|
404 | #define CS11 1 |
---|
405 | #define CS12 2 |
---|
406 | |
---|
407 | #define TCNT1 _SFR_MEM16(0x84) |
---|
408 | |
---|
409 | #define TCNT1L _SFR_MEM8(0x84) |
---|
410 | #define TCNT1L0 0 |
---|
411 | #define TCNT1L1 1 |
---|
412 | #define TCNT1L2 2 |
---|
413 | #define TCNT1L3 3 |
---|
414 | #define TCNT1L4 4 |
---|
415 | #define TCNT1L5 5 |
---|
416 | #define TCNT1L6 6 |
---|
417 | #define TCNT1L7 7 |
---|
418 | |
---|
419 | #define TCNT1H _SFR_MEM8(0x85) |
---|
420 | #define TCNT1H0 0 |
---|
421 | #define TCNT1H1 1 |
---|
422 | #define TCNT1H2 2 |
---|
423 | #define TCNT1H3 3 |
---|
424 | #define TCNT1H4 4 |
---|
425 | #define TCNT1H5 5 |
---|
426 | #define TCNT1H6 6 |
---|
427 | #define TCNT1H7 7 |
---|
428 | |
---|
429 | #define OCR1A _SFR_MEM8(0x88) |
---|
430 | #define OCR1A0 0 |
---|
431 | #define OCR1A1 1 |
---|
432 | #define OCR1A2 2 |
---|
433 | #define OCR1A3 3 |
---|
434 | #define OCR1A4 4 |
---|
435 | #define OCR1A5 5 |
---|
436 | #define OCR1A6 6 |
---|
437 | #define OCR1A7 7 |
---|
438 | |
---|
439 | #define OCR1B _SFR_MEM8(0x89) |
---|
440 | #define OCR1B0 0 |
---|
441 | #define OCR1B1 1 |
---|
442 | #define OCR1B2 2 |
---|
443 | #define OCR1B3 3 |
---|
444 | #define OCR1B4 4 |
---|
445 | #define OCR1B5 5 |
---|
446 | #define OCR1B6 6 |
---|
447 | #define OCR1B7 7 |
---|
448 | |
---|
449 | #define ROCR _SFR_MEM8(0xC8) |
---|
450 | #define ROCWIE 0 |
---|
451 | #define ROCWIF 1 |
---|
452 | #define ROCS 7 |
---|
453 | |
---|
454 | #define BGCCR _SFR_MEM8(0xD0) |
---|
455 | #define BGCC0 0 |
---|
456 | #define BGCC1 1 |
---|
457 | #define BGCC2 2 |
---|
458 | #define BGCC3 3 |
---|
459 | #define BGCC4 4 |
---|
460 | #define BGCC5 5 |
---|
461 | #define BGD 7 |
---|
462 | |
---|
463 | #define BGCRR _SFR_MEM8(0xD1) |
---|
464 | #define BGCR0 0 |
---|
465 | #define BGCR1 1 |
---|
466 | #define BGCR2 2 |
---|
467 | #define BGCR3 3 |
---|
468 | #define BGCR4 4 |
---|
469 | #define BGCR5 5 |
---|
470 | #define BGCR6 6 |
---|
471 | #define BGCR7 7 |
---|
472 | |
---|
473 | #define CADAC0 _SFR_MEM8(0xE0) |
---|
474 | #define CADAC00 0 |
---|
475 | #define CADAC01 1 |
---|
476 | #define CADAC02 2 |
---|
477 | #define CADAC03 3 |
---|
478 | #define CADAC04 4 |
---|
479 | #define CADAC05 5 |
---|
480 | #define CADAC06 6 |
---|
481 | #define CADAC07 7 |
---|
482 | |
---|
483 | #define CADAC1 _SFR_MEM8(0xE1) |
---|
484 | #define CADAC08 0 |
---|
485 | #define CADAC09 1 |
---|
486 | #define CADAC10 2 |
---|
487 | #define CADAC11 3 |
---|
488 | #define CADAC12 4 |
---|
489 | #define CADAC13 5 |
---|
490 | #define CADAC14 6 |
---|
491 | #define CADAC15 7 |
---|
492 | |
---|
493 | #define CADAC2 _SFR_MEM8(0xE2) |
---|
494 | #define CADAC16 0 |
---|
495 | #define CADAC17 1 |
---|
496 | #define CADAC18 2 |
---|
497 | #define CADAC19 3 |
---|
498 | #define CADAC20 4 |
---|
499 | #define CADAC21 5 |
---|
500 | #define CADAC22 6 |
---|
501 | #define CADAC23 7 |
---|
502 | |
---|
503 | #define CADAC3 _SFR_MEM8(0xE3) |
---|
504 | #define CADAC24 0 |
---|
505 | #define CADAC25 1 |
---|
506 | #define CADAC26 2 |
---|
507 | #define CADAC27 3 |
---|
508 | #define CADAC28 4 |
---|
509 | #define CADAC29 5 |
---|
510 | #define CADAC30 6 |
---|
511 | #define CADAC31 7 |
---|
512 | |
---|
513 | #define CADCSRA _SFR_MEM8(0xE4) |
---|
514 | #define CADSE 0 |
---|
515 | #define CADSI0 1 |
---|
516 | #define CADSI1 2 |
---|
517 | #define CADAS0 3 |
---|
518 | #define CADAS1 4 |
---|
519 | #define CADUB 5 |
---|
520 | #define CADPOL 6 |
---|
521 | #define CADEN 7 |
---|
522 | |
---|
523 | #define CADCSRB _SFR_MEM8(0xE5) |
---|
524 | #define CADICIF 0 |
---|
525 | #define CADRCIF 1 |
---|
526 | #define CADACIF 2 |
---|
527 | #define CADICIE 4 |
---|
528 | #define CADRCIE 5 |
---|
529 | #define CADACIE 6 |
---|
530 | |
---|
531 | #define CADRC _SFR_MEM8(0xE6) |
---|
532 | #define CADRC0 0 |
---|
533 | #define CADRC1 1 |
---|
534 | #define CADRC2 2 |
---|
535 | #define CADRC3 3 |
---|
536 | #define CADRC4 4 |
---|
537 | #define CADRC5 5 |
---|
538 | #define CADRC6 6 |
---|
539 | #define CADRC7 7 |
---|
540 | |
---|
541 | #define CADIC _SFR_MEM16(0xE8) |
---|
542 | |
---|
543 | #define CADICL _SFR_MEM8(0xE8) |
---|
544 | #define CADICL0 0 |
---|
545 | #define CADICL1 1 |
---|
546 | #define CADICL2 2 |
---|
547 | #define CADICL3 3 |
---|
548 | #define CADICL4 4 |
---|
549 | #define CADICL5 5 |
---|
550 | #define CADICL6 6 |
---|
551 | #define CADICL7 7 |
---|
552 | |
---|
553 | #define CADICH _SFR_MEM8(0xE9) |
---|
554 | #define CADICH0 0 |
---|
555 | #define CADICH1 1 |
---|
556 | #define CADICH2 2 |
---|
557 | #define CADICH3 3 |
---|
558 | #define CADICH4 4 |
---|
559 | #define CADICH5 5 |
---|
560 | #define CADICH6 6 |
---|
561 | #define CADICH7 7 |
---|
562 | |
---|
563 | #define FCSR _SFR_MEM8(0xF0) |
---|
564 | #define CFE 0 |
---|
565 | #define DFE 1 |
---|
566 | #define CPS 2 |
---|
567 | #define DUVRD 3 |
---|
568 | |
---|
569 | #define BPIMSK _SFR_MEM8(0xF2) |
---|
570 | #define CHCIE 0 |
---|
571 | #define DHCIE 1 |
---|
572 | #define COCIE 2 |
---|
573 | #define DOCIE 3 |
---|
574 | #define SCIE 4 |
---|
575 | |
---|
576 | #define BPIFR _SFR_MEM8(0xF3) |
---|
577 | #define CHCIF 0 |
---|
578 | #define DHCIF 1 |
---|
579 | #define COCIF 2 |
---|
580 | #define DOCIF 3 |
---|
581 | #define SCIF 4 |
---|
582 | |
---|
583 | #define BPSCD _SFR_MEM8(0xF5) |
---|
584 | #define SCDL0 0 |
---|
585 | #define SCDL1 1 |
---|
586 | #define SCDL2 2 |
---|
587 | #define SCDL3 3 |
---|
588 | #define SCDL4 4 |
---|
589 | #define SCDL5 5 |
---|
590 | #define SCDL6 6 |
---|
591 | #define SCDL7 7 |
---|
592 | |
---|
593 | #define BPDOCD _SFR_MEM8(0xF6) |
---|
594 | #define DOCDL0 0 |
---|
595 | #define DOCDL1 1 |
---|
596 | #define DOCDL2 2 |
---|
597 | #define DOCDL3 3 |
---|
598 | #define DOCDL4 4 |
---|
599 | #define DOCDL5 5 |
---|
600 | #define DOCDL6 6 |
---|
601 | #define DOCDL7 7 |
---|
602 | |
---|
603 | #define BPCOCD _SFR_MEM8(0xF7) |
---|
604 | #define COCDL0 0 |
---|
605 | #define COCDL1 1 |
---|
606 | #define COCDL2 2 |
---|
607 | #define COCDL3 3 |
---|
608 | #define COCDL4 4 |
---|
609 | #define COCDL5 5 |
---|
610 | #define COCDL6 6 |
---|
611 | #define COCDL7 7 |
---|
612 | |
---|
613 | #define BPDHCD _SFR_MEM8(0xF8) |
---|
614 | #define DHCDL0 0 |
---|
615 | #define DHCDL1 1 |
---|
616 | #define DHCDL2 2 |
---|
617 | #define DHCDL3 3 |
---|
618 | #define DHCDL4 4 |
---|
619 | #define DHCDL5 5 |
---|
620 | #define DHCDL6 6 |
---|
621 | #define DHCDL7 7 |
---|
622 | |
---|
623 | #define BPCHCD _SFR_MEM8(0xF9) |
---|
624 | #define CHCDL0 0 |
---|
625 | #define CHCDL1 1 |
---|
626 | #define CHCDL2 2 |
---|
627 | #define CHCDL3 3 |
---|
628 | #define CHCDL4 4 |
---|
629 | #define CHCDL5 5 |
---|
630 | #define CHCDL6 6 |
---|
631 | #define CHCDL7 7 |
---|
632 | |
---|
633 | #define BPSCTR _SFR_MEM8(0xFA) |
---|
634 | #define SCPT0 0 |
---|
635 | #define SCPT1 1 |
---|
636 | #define SCPT2 2 |
---|
637 | #define SCPT3 3 |
---|
638 | #define SCPT4 4 |
---|
639 | #define SCPT5 5 |
---|
640 | #define SCPT6 6 |
---|
641 | |
---|
642 | #define BPOCTR _SFR_MEM8(0xFB) |
---|
643 | #define OCPT0 0 |
---|
644 | #define OCPT1 1 |
---|
645 | #define OCPT2 2 |
---|
646 | #define OCPT3 3 |
---|
647 | #define OCPT4 4 |
---|
648 | #define OCPT5 5 |
---|
649 | |
---|
650 | #define BPHCTR _SFR_MEM8(0xFC) |
---|
651 | #define HCPT0 0 |
---|
652 | #define HCPT1 1 |
---|
653 | #define HCPT2 2 |
---|
654 | #define HCPT3 3 |
---|
655 | #define HCPT4 4 |
---|
656 | #define HCPT5 5 |
---|
657 | |
---|
658 | #define BPCR _SFR_MEM8(0xFD) |
---|
659 | #define CHCD 0 |
---|
660 | #define DHCD 1 |
---|
661 | #define COCD 2 |
---|
662 | #define DOCD 3 |
---|
663 | #define SCD 4 |
---|
664 | #define PRMD 7 |
---|
665 | |
---|
666 | #define BPPLR _SFR_MEM8(0xFE) |
---|
667 | #define BPPL 0 |
---|
668 | #define BPPLE 1 |
---|
669 | |
---|
670 | |
---|
671 | /* Interrupt vectors */ |
---|
672 | /* Vector 0 is the reset vector */ |
---|
673 | #define BPINT_vect_num 1 |
---|
674 | #define BPINT_vect _VECTOR(1) /* Battery Protection Interrupt */ |
---|
675 | #define VREGMON_vect_num 2 |
---|
676 | #define VREGMON_vect _VECTOR(2) /* Voltage regulator monitor interrupt */ |
---|
677 | #define INT0_vect_num 3 |
---|
678 | #define INT0_vect _VECTOR(3) /* External Interrupt Request 0 */ |
---|
679 | #define INT1_vect_num 4 |
---|
680 | #define INT1_vect _VECTOR(4) /* External Interrupt Request 1 */ |
---|
681 | #define INT2_vect_num 5 |
---|
682 | #define INT2_vect _VECTOR(5) /* External Interrupt Request 2 */ |
---|
683 | #define PCINT0_vect_num 6 |
---|
684 | #define PCINT0_vect _VECTOR(6) /* Pin Change Interrupt Request 0 */ |
---|
685 | #define WDT_vect_num 7 |
---|
686 | #define WDT_vect _VECTOR(7) /* Watchdog Timeout Interrupt */ |
---|
687 | #define TIMER1_IC_vect_num 8 |
---|
688 | #define TIMER1_IC_vect _VECTOR(8) /* Timer 1 Input capture */ |
---|
689 | #define TIMER1_COMPA_vect_num 9 |
---|
690 | #define TIMER1_COMPA_vect _VECTOR(9) /* Timer 1 Compare Match A */ |
---|
691 | #define TIMER1_COMPB_vect_num 10 |
---|
692 | #define TIMER1_COMPB_vect _VECTOR(10) /* Timer 1 Compare Match B */ |
---|
693 | #define TIMER1_OVF_vect_num 11 |
---|
694 | #define TIMER1_OVF_vect _VECTOR(11) /* Timer 1 overflow */ |
---|
695 | #define TIMER0_IC_vect_num 12 |
---|
696 | #define TIMER0_IC_vect _VECTOR(12) /* Timer 0 Input Capture */ |
---|
697 | #define TIMER0_COMPA_vect_num 13 |
---|
698 | #define TIMER0_COMPA_vect _VECTOR(13) /* Timer 0 Comapre Match A */ |
---|
699 | #define TIMER0_COMPB_vect_num 14 |
---|
700 | #define TIMER0_COMPB_vect _VECTOR(14) /* Timer 0 Compare Match B */ |
---|
701 | #define TIMER0_OVF_vect_num 15 |
---|
702 | #define TIMER0_OVF_vect _VECTOR(15) /* Timer 0 Overflow */ |
---|
703 | #define SPI;STC_vect_num 16 |
---|
704 | #define SPI;STC_vect _VECTOR(16) /* SPI Serial transfer complete */ |
---|
705 | #define VADC_vect_num 17 |
---|
706 | #define VADC_vect _VECTOR(17) /* Voltage ADC Conversion Complete */ |
---|
707 | #define CCADC_CONV_vect_num 18 |
---|
708 | #define CCADC_CONV_vect _VECTOR(18) /* Coulomb Counter ADC Conversion Complete */ |
---|
709 | #define CCADC_REG_CUR_vect_num 19 |
---|
710 | #define CCADC_REG_CUR_vect _VECTOR(19) /* Coloumb Counter ADC Regular Current */ |
---|
711 | #define CCADC_ACC_vect_num 20 |
---|
712 | #define CCADC_ACC_vect _VECTOR(20) /* Coloumb Counter ADC Accumulator */ |
---|
713 | #define EE_READY_vect_num 21 |
---|
714 | #define EE_READY_vect _VECTOR(21) /* EEPROM Ready */ |
---|
715 | |
---|
716 | #define _VECTOR_SIZE 4 /* Size of individual vector. */ |
---|
717 | #define _VECTORS_SIZE (22 * _VECTOR_SIZE) |
---|
718 | |
---|
719 | |
---|
720 | /* Constants */ |
---|
721 | #define SPM_PAGESIZE (128) |
---|
722 | #define RAMSTART (0x100) |
---|
723 | #define RAMSIZE (1024) |
---|
724 | #define RAMEND (RAMSTART + RAMSIZE - 1) |
---|
725 | #define XRAMSTART (NA) |
---|
726 | #define XRAMSIZE (NA) |
---|
727 | #define XRAMEND (RAMEND) |
---|
728 | #define E2END (0xFF) |
---|
729 | #define E2PAGESIZE (4) |
---|
730 | #define FLASHEND (0x3FFF) |
---|
731 | |
---|
732 | |
---|
733 | /* Fuses */ |
---|
734 | #define FUSE_MEMORY_SIZE 2 |
---|
735 | |
---|
736 | /* Low Fuse Byte */ |
---|
737 | #define FUSE_SUT0 (unsigned char)~_BV(0) /* Select start-up time */ |
---|
738 | #define FUSE_SUT1 (unsigned char)~_BV(1) /* Select start-up time */ |
---|
739 | #define FUSE_SUT2 (unsigned char)~_BV(2) /* Select start-up time */ |
---|
740 | #define FUSE_SELFPRGEN (unsigned char)~_BV(3) /* Enable self programming */ |
---|
741 | #define FUSE_DWEN (unsigned char)~_BV(4) /* Enable debugWIRE */ |
---|
742 | #define FUSE_SPIEN (unsigned char)~_BV(5) /* Enable Serial programming and Data Downloading */ |
---|
743 | #define FUSE_EESAVE (unsigned char)~_BV(6) /* EEPROM memory is preserved through chip erase */ |
---|
744 | #define FUSE_WDTON (unsigned char)~_BV(7) /* Watchdog Timer Always On */ |
---|
745 | #define LFUSE_DEFAULT (FUSE_SPIEN) |
---|
746 | |
---|
747 | /* High Fuse Byte */ |
---|
748 | #define FUSE_OSCSEL0 (unsigned char)~_BV(0) /* Oscillator Select 0 */ |
---|
749 | #define FUSE_OSCSEL1 (unsigned char)~_BV(1) /* Oscillator Select 1 */ |
---|
750 | #define FUSE_COMPMODE (unsigned char)~_BV(2) /* Compatibility mode */ |
---|
751 | #define HFUSE_DEFAULT (FUSE_COMPMODE & FUSE_OSCSEL1) |
---|
752 | |
---|
753 | |
---|
754 | /* Lock Bits */ |
---|
755 | #define __LOCK_BITS_EXIST |
---|
756 | |
---|
757 | |
---|
758 | /* Signature */ |
---|
759 | #define SIGNATURE_0 0x1E |
---|
760 | #define SIGNATURE_1 0x94 |
---|
761 | #define SIGNATURE_2 0x0E |
---|
762 | |
---|
763 | |
---|
764 | /* Device Pin Definitions */ |
---|
765 | #define PV2_DDR DDRV |
---|
766 | #define PV2_PORT PORTV |
---|
767 | #define PV2_PIN PINV |
---|
768 | #define PV2_BIT 2 |
---|
769 | |
---|
770 | #define PV1_DDR DDRV |
---|
771 | #define PV1_PORT PORTV |
---|
772 | #define PV1_PIN PINV |
---|
773 | #define PV1_BIT 1 |
---|
774 | |
---|
775 | #define NV_DDR DDRNV |
---|
776 | #define NV_PORT PORTNV |
---|
777 | #define NV_PIN PINNV |
---|
778 | #define NV_BIT NV |
---|
779 | |
---|
780 | #define VFET_DDR DDRVFET |
---|
781 | #define VFET_PORT PORTVFET |
---|
782 | #define VFET_PIN PINVFET |
---|
783 | #define VFET_BIT VFET |
---|
784 | |
---|
785 | #define CF1P_DDR DDRCF1P |
---|
786 | #define CF1P_PORT PORTCF1P |
---|
787 | #define CF1P_PIN PINCF1P |
---|
788 | #define CF1P_BIT CF1P |
---|
789 | |
---|
790 | #define CF1N_DDR DDRCF1N |
---|
791 | #define CF1N_PORT PORTCF1N |
---|
792 | #define CF1N_PIN PINCF1N |
---|
793 | #define CF1N_BIT CF1N |
---|
794 | |
---|
795 | #define CF2P_DDR DDRCF2P |
---|
796 | #define CF2P_PORT PORTCF2P |
---|
797 | #define CF2P_PIN PINCF2P |
---|
798 | #define CF2P_BIT CF2P |
---|
799 | |
---|
800 | #define CF2N_DDR DDRCF2N |
---|
801 | #define CF2N_PORT PORTCF2N |
---|
802 | #define CF2N_PIN PINCF2N |
---|
803 | #define CF2N_BIT CF2N |
---|
804 | |
---|
805 | #define VREG_DDR DDRVREG |
---|
806 | #define VREG_PORT PORTVREG |
---|
807 | #define VREG_PIN PINVREG |
---|
808 | #define VREG_BIT VREG |
---|
809 | |
---|
810 | #define VREF_DDR DDRVREF |
---|
811 | #define VREF_PORT PORTVREF |
---|
812 | #define VREF_PIN PINVREF |
---|
813 | #define VREF_BIT VREF |
---|
814 | |
---|
815 | #define VREFGND_DDR DDRVREFGND |
---|
816 | #define VREFGND_PORT PORTVREFGND |
---|
817 | #define VREFGND_PIN PINVREFGND |
---|
818 | #define VREFGND_BIT VREFGND |
---|
819 | |
---|
820 | #define PI_DDR DDRI |
---|
821 | #define PI_PORT PORTI |
---|
822 | #define PI_PIN PINI |
---|
823 | #define PI_BIT |
---|
824 | |
---|
825 | #define NI_DDR DDRNI |
---|
826 | #define NI_PORT PORTNI |
---|
827 | #define NI_PIN PINNI |
---|
828 | #define NI_BIT NI |
---|
829 | |
---|
830 | #define PA0_DDR DDRA |
---|
831 | #define PA0_PORT PORTA |
---|
832 | #define PA0_PIN PINA |
---|
833 | #define PA0_BIT 0 |
---|
834 | |
---|
835 | #define PA1_DDR DDRA |
---|
836 | #define PA1_PORT PORTA |
---|
837 | #define PA1_PIN PINA |
---|
838 | #define PA1_BIT 1 |
---|
839 | |
---|
840 | #define PA2_DDR DDRA |
---|
841 | #define PA2_PORT PORTA |
---|
842 | #define PA2_PIN PINA |
---|
843 | #define PA2_BIT 2 |
---|
844 | |
---|
845 | #define PB0_DDR DDRB |
---|
846 | #define PB0_PORT PORTB |
---|
847 | #define PB0_PIN PINB |
---|
848 | #define PB0_BIT 0 |
---|
849 | |
---|
850 | #define PB1_DDR DDRB |
---|
851 | #define PB1_PORT PORTB |
---|
852 | #define PB1_PIN PINB |
---|
853 | #define PB1_BIT 1 |
---|
854 | |
---|
855 | #define PB2_DDR DDRB |
---|
856 | #define PB2_PORT PORTB |
---|
857 | #define PB2_PIN PINB |
---|
858 | #define PB2_BIT 2 |
---|
859 | |
---|
860 | #define PB3_DDR DDRB |
---|
861 | #define PB3_PORT PORTB |
---|
862 | #define PB3_PIN PINB |
---|
863 | #define PB3_BIT 3 |
---|
864 | |
---|
865 | #define PC0_DDR DDRC |
---|
866 | #define PC0_PORT PORTC |
---|
867 | #define PC0_PIN PINC |
---|
868 | #define PC0_BIT 0 |
---|
869 | |
---|
870 | #define BATT_DDR DDRBATT |
---|
871 | #define BATT_PORT PORTBATT |
---|
872 | #define BATT_PIN PINBATT |
---|
873 | #define BATT_BIT BATT |
---|
874 | |
---|
875 | #define OC_DDR DDROC |
---|
876 | #define OC_PORT PORTOC |
---|
877 | #define OC_PIN PINOC |
---|
878 | #define OC_BIT OC |
---|
879 | |
---|
880 | /**@}*/ |
---|
881 | #endif /* _AVR_ATmega16HVA2_H_ */ |
---|