1 | /* Copyright (c) 2002, Marek Michalkiewicz |
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2 | All rights reserved. |
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3 | |
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4 | Redistribution and use in source and binary forms, with or without |
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5 | modification, are permitted provided that the following conditions are met: |
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6 | |
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7 | * Redistributions of source code must retain the above copyright |
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8 | notice, this list of conditions and the following disclaimer. |
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9 | |
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10 | * Redistributions in binary form must reproduce the above copyright |
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11 | notice, this list of conditions and the following disclaimer in |
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12 | the documentation and/or other materials provided with the |
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13 | distribution. |
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14 | |
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15 | * Neither the name of the copyright holders nor the names of |
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16 | contributors may be used to endorse or promote products derived |
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17 | from this software without specific prior written permission. |
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18 | |
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19 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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20 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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21 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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22 | ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE |
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23 | LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
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24 | CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
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25 | SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
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26 | INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
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27 | CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
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28 | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
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29 | POSSIBILITY OF SUCH DAMAGE. */ |
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30 | |
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31 | /* $Id$ */ |
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32 | |
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33 | /* avr/io8534.h - definitions for AT90C8534 */ |
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34 | |
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35 | #ifndef _AVR_IO8534_ |
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36 | #define _AVR_IO8534_ 1 |
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37 | |
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38 | /* This file should only be included from <avr/io.h>, never directly. */ |
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39 | |
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40 | #ifndef _AVR_IO_H_ |
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41 | # error "Include <avr/io.h> instead of this file." |
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42 | #endif |
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43 | |
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44 | #ifndef _AVR_IOXXX_H_ |
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45 | # define _AVR_IOXXX_H_ "io8534.h" |
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46 | #else |
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47 | # error "Attempt to include more than one <avr/ioXXX.h> file." |
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48 | #endif |
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49 | |
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50 | /* I/O registers */ |
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51 | |
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52 | /* 0x00..0x03 reserved */ |
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53 | |
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54 | /* ADC Data Register */ |
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55 | #ifndef __ASSEMBLER__ |
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56 | #define ADC _SFR_IO16(0x04) |
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57 | #endif |
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58 | #define ADCW _SFR_IO16(0x04) |
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59 | #define ADCL _SFR_IO8(0x04) |
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60 | #define ADCH _SFR_IO8(0x05) |
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61 | |
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62 | /* ADC Control and Status Register */ |
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63 | #define ADCSR _SFR_IO8(0x06) |
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64 | |
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65 | /* ADC Multiplexer Select Register */ |
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66 | #define ADMUX _SFR_IO8(0x07) |
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67 | |
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68 | /* 0x08..0x0F reserved */ |
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69 | |
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70 | /* General Interrupt Pin Register */ |
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71 | #define GIPR _SFR_IO8(0x10) |
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72 | |
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73 | /* 0x11..0x19 reserved */ |
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74 | |
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75 | /* Data Direction Register, Port A */ |
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76 | #define DDRA _SFR_IO8(0x1A) |
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77 | |
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78 | /* Data Register, Port A */ |
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79 | #define PORTA _SFR_IO8(0x1B) |
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80 | |
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81 | /* EEPROM Control Register */ |
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82 | #define EECR _SFR_IO8(0x1C) |
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83 | |
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84 | /* EEPROM Data Register */ |
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85 | #define EEDR _SFR_IO8(0x1D) |
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86 | |
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87 | /* EEPROM Address Register */ |
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88 | #define EEAR _SFR_IO16(0x1E) |
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89 | #define EEARL _SFR_IO8(0x1E) |
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90 | #define EEARH _SFR_IO8(0x1F) |
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91 | |
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92 | /* 0x20..0x2B reserved */ |
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93 | |
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94 | /* Timer/Counter1 */ |
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95 | #define TCNT1 _SFR_IO16(0x2C) |
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96 | #define TCNT1L _SFR_IO8(0x2C) |
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97 | #define TCNT1H _SFR_IO8(0x2D) |
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98 | |
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99 | /* Timer/Counter1 Control Register */ |
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100 | #define TCCR1 _SFR_IO8(0x2E) |
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101 | |
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102 | /* 0x2F..0x31 reserved */ |
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103 | |
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104 | /* Timer/Counter0 (8-bit) */ |
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105 | #define TCNT0 _SFR_IO8(0x32) |
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106 | |
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107 | /* Timer/Counter0 Control Register */ |
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108 | #define TCCR0 _SFR_IO8(0x33) |
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109 | |
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110 | /* 0x34 reserved */ |
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111 | |
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112 | /* MCU general Control Register */ |
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113 | #define MCUCR _SFR_IO8(0x35) |
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114 | |
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115 | /* 0x36..0x37 reserved */ |
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116 | |
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117 | /* Timer/Counter Interrupt Flag Register */ |
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118 | #define TIFR _SFR_IO8(0x38) |
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119 | |
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120 | /* Timer/Counter Interrupt MaSK Register */ |
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121 | #define TIMSK _SFR_IO8(0x39) |
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122 | |
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123 | /* General Interrupt Flag Register */ |
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124 | #define GIFR _SFR_IO8(0x3A) |
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125 | |
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126 | /* General Interrupt MaSK register */ |
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127 | #define GIMSK _SFR_IO8(0x3B) |
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128 | |
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129 | /* 0x3C reserved */ |
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130 | |
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131 | /* 0x3D..0x3E SP */ |
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132 | |
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133 | /* 0x3F SREG */ |
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134 | |
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135 | /* Interrupt vectors */ |
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136 | |
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137 | #define SIG_INTERRUPT0 _VECTOR(1) |
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138 | #define SIG_INTERRUPT1 _VECTOR(2) |
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139 | #define SIG_OVERFLOW1 _VECTOR(3) |
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140 | #define SIG_OVERFLOW0 _VECTOR(4) |
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141 | #define SIG_ADC _VECTOR(5) |
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142 | #define SIG_EEPROM_READY _VECTOR(6) |
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143 | |
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144 | #define _VECTORS_SIZE 14 |
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145 | |
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146 | /* Bit numbers */ |
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147 | |
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148 | /* GIMSK */ |
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149 | #define INT1 7 |
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150 | #define INT0 6 |
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151 | |
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152 | /* GIFR */ |
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153 | #define INTF1 7 |
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154 | #define INTF0 6 |
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155 | |
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156 | /* GIPR */ |
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157 | #define IPIN1 3 |
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158 | #define IPIN0 2 |
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159 | |
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160 | /* TIMSK */ |
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161 | #define TOIE1 2 |
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162 | #define TOIE0 0 |
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163 | |
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164 | /* TIFR */ |
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165 | #define TOV1 2 |
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166 | #define TOV0 0 |
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167 | |
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168 | /* MCUCR */ |
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169 | #define SE 6 |
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170 | #define SM 5 |
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171 | #define ISC1 2 |
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172 | #define ISC0 0 |
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173 | |
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174 | /* TCCR0 */ |
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175 | #define CS02 2 |
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176 | #define CS01 1 |
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177 | #define CS00 0 |
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178 | |
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179 | /* TCCR1 */ |
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180 | #define CS12 2 |
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181 | #define CS11 1 |
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182 | #define CS10 0 |
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183 | |
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184 | /* PORTA */ |
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185 | #define PA7 7 |
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186 | #define PA6 6 |
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187 | #define PA5 5 |
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188 | #define PA4 4 |
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189 | #define PA3 3 |
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190 | #define PA2 2 |
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191 | #define PA1 1 |
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192 | #define PA0 0 |
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193 | |
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194 | /* DDRA */ |
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195 | #define DDA7 7 |
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196 | #define DDA6 6 |
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197 | #define DDA5 5 |
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198 | #define DDA4 4 |
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199 | #define DDA3 3 |
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200 | #define DDA2 2 |
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201 | #define DDA1 1 |
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202 | #define DDA0 0 |
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203 | |
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204 | /* EEPROM Control Register */ |
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205 | #define EERIE 3 |
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206 | #define EEMWE 2 |
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207 | #define EEWE 1 |
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208 | #define EERE 0 |
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209 | |
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210 | /* Last memory addresses */ |
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211 | #define RAMEND 0x15F |
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212 | #define XRAMEND RAMEND |
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213 | #define E2END 0x1FF |
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214 | #define FLASHEND 0x1FFF |
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215 | |
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216 | #endif /* _AVR_IO8534_H_ */ |
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