source: rtems/cpukit/score/cpu/avr/avr/io1200.h @ 04a62dce

4.104.11
Last change on this file since 04a62dce was 04a62dce, checked in by Joel Sherrill <joel.sherrill@…>, on Aug 6, 2009 at 2:52:07 PM

2009-08-05 Josh Switnicki <josh.switnicki@…>

  • Makefile.am: added AVR specific Header files to score/cpu/avr/avr. These are from avr-libc 1.6 and assumed to exist by AVR applications.
  • preinstall.am: Regenerated.
  • Property mode set to 100644
File size: 5.2 KB
Line 
1/* Copyright (c) 2002, Marek Michalkiewicz
2   All rights reserved.
3
4   Redistribution and use in source and binary forms, with or without
5   modification, are permitted provided that the following conditions are met:
6
7   * Redistributions of source code must retain the above copyright
8     notice, this list of conditions and the following disclaimer.
9
10   * Redistributions in binary form must reproduce the above copyright
11     notice, this list of conditions and the following disclaimer in
12     the documentation and/or other materials provided with the
13     distribution.
14
15   * Neither the name of the copyright holders nor the names of
16     contributors may be used to endorse or promote products derived
17     from this software without specific prior written permission.
18
19  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
23  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  POSSIBILITY OF SUCH DAMAGE. */
30
31/* $Id$ */
32
33/* avr/io1200.h - definitions for AT90S1200 */
34
35#ifndef _AVR_IO1200_H_
36#define _AVR_IO1200_H_ 1
37
38/* This file should only be included from <avr/io.h>, never directly. */
39
40#ifndef _AVR_IO_H_
41#  error "Include <avr/io.h> instead of this file."
42#endif
43
44#ifndef _AVR_IOXXX_H_
45#  define _AVR_IOXXX_H_ "io1200.h"
46#else
47#  error "Attempt to include more than one <avr/ioXXX.h> file."
48#endif
49
50#ifndef __ASSEMBLER__
51#  warning "MCU not supported by the C compiler"
52#endif
53
54/* I/O registers */
55
56/* 0x00..0x07 reserved */
57
58/* Analog Comparator Control and Status Register */
59#define ACSR    _SFR_IO8(0x08)
60
61/* 0x09..0x0F reserved */
62
63#define PIND    _SFR_IO8(0x10)
64#define DDRD    _SFR_IO8(0x11)
65#define PORTD   _SFR_IO8(0x12)
66
67/* 0x13..0x15 reserved */
68
69#define PINB    _SFR_IO8(0x16)
70#define DDRB    _SFR_IO8(0x17)
71#define PORTB   _SFR_IO8(0x18)
72
73/* 0x19..0x1B reserved */
74
75/* EEPROM Control Register */
76#define EECR    _SFR_IO8(0x1C)
77
78/* EEPROM Data Register */
79#define EEDR    _SFR_IO8(0x1D)
80
81/* EEPROM Address Register */
82#define EEAR    _SFR_IO8(0x1E)
83#define EEARL   _SFR_IO8(0x1E)
84
85/* 0x1F..0x20 reserved */
86
87/* Watchdog Timer Control Register */
88#define WDTCR   _SFR_IO8(0x21)
89
90/* 0x22..0x31 reserved */
91
92#define TCNT0   _SFR_IO8(0x32)
93#define TCCR0   _SFR_IO8(0x33)
94
95/* 0x34 reserved */
96
97#define MCUCR   _SFR_IO8(0x35)
98
99/* 0x36..0x37 reserved */
100
101/* Timer/Counter Interrupt Flag Register */
102#define TIFR    _SFR_IO8(0x38)
103
104/* Timer/Counter Interrupt MaSK Register */
105#define TIMSK   _SFR_IO8(0x39)
106
107/* 0x3A reserved */
108
109#define GIMSK   _SFR_IO8(0x3B)
110
111/* 0x3C..0x3E reserved */
112
113/* 0x3F SREG */
114
115/* Interrupt vectors */
116
117/* External Interrupt 0 */
118#define INT0_vect                       _VECTOR(1)
119#define SIG_INTERRUPT0                  _VECTOR(1)
120
121/* Timer/Counter0 Overflow */
122#define TIMER0_OVF_vect                 _VECTOR(2)
123#define SIG_OVERFLOW0                   _VECTOR(2)
124
125/* Analog Comparator */
126#define ANA_COMP_vect                   _VECTOR(3)
127#define SIG_COMPARATOR                  _VECTOR(3)
128
129#define _VECTORS_SIZE 8
130
131/* Bit numbers */
132
133/* GIMSK */
134#define INT0    6
135
136/* TIMSK */
137#define TOIE0   1
138
139/* TIFR */
140#define TOV0    1
141
142/* MCUCR */
143#define SE      5
144#define SM      4
145#define ISC01   1
146#define ISC00   0
147
148/* TCCR0 */
149#define CS02    2
150#define CS01    1
151#define CS00    0
152
153/* WDTCR */
154#define WDE     3
155#define WDP2    2
156#define WDP1    1
157#define WDP0    0
158
159/* EECR */
160#undef EEMWE
161
162/*
163   PB7 = SCK
164   PB6 = MISO
165   PB5 = MOSI
166   PB1 = AIN1
167   PB0 = AIN0
168 */
169
170/* PORTB */
171#define PB7     7
172#define PB6     6
173#define PB5     5
174#define PB4     4
175#define PB3     3
176#define PB2     2
177#define PB1     1
178#define PB0     0
179
180/* DDRB */
181#define DDB7    7
182#define DDB6    6
183#define DDB5    5
184#define DDB4    4
185#define DDB3    3
186#define DDB2    2
187#define DDB1    1
188#define DDB0    0
189
190/* PINB */
191#define PINB7   7
192#define PINB6   6
193#define PINB5   5
194#define PINB4   4
195#define PINB3   3
196#define PINB2   2
197#define PINB1   1
198#define PINB0   0
199
200/* PORTD */
201#define PD6     6
202#define PD5     5
203#define PD4     4
204#define PD3     3
205#define PD2     2
206#define PD1     1
207#define PD0     0
208
209/* DDRD */
210#define DDD6    6
211#define DDD5    5
212#define DDD4    4
213#define DDD3    3
214#define DDD2    2
215#define DDD1    1
216#define DDD0    0
217
218/* PIND */
219#define PIND6   6
220#define PIND5   5
221#define PIND4   4
222#define PIND3   3
223#define PIND2   2
224#define PIND1   1
225#define PIND0   0
226
227/* ACSR */
228#define ACD     7
229#define ACO     5
230#define ACI     4
231#define ACIE    3
232#define ACIS1   1
233#define ACIS0   0
234
235/* EEPROM Control Register */
236#define EERIE   3
237#define EEMWE   2
238#define EEWE    1
239#define EERE    0
240
241#undef ZH
242
243/* Last memory addresses */
244#define RAMEND          0x1F
245#define XRAMEND         0x0
246#define E2END           0x3F
247#define E2PAGESIZE  0
248#define FLASHEND        0x3FF
249
250
251/* Fuses */
252#define FUSE_MEMORY_SIZE 1
253
254/* Low Fuse Byte */
255#define FUSE_RCEN  (unsigned char)~_BV(0)
256#define FUSE_SPIEN (unsigned char)~_BV(5)
257#define LFUSE_DEFAULT (0xFF)
258
259
260/* Lock Bits */
261#define __LOCK_BITS_EXIST
262
263
264/* Signature */
265#define SIGNATURE_0 0x1E
266#define SIGNATURE_1 0x90
267#define SIGNATURE_2 0x01
268
269
270#endif  /* _AVR_IO1200_H_ */
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