1 | /* Copyright (c) 2007 Eric B. Weddington |
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2 | All rights reserved. |
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3 | |
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4 | Redistribution and use in source and binary forms, with or without |
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5 | modification, are permitted provided that the following conditions are met: |
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6 | |
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7 | * Redistributions of source code must retain the above copyright |
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8 | notice, this list of conditions and the following disclaimer. |
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9 | |
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10 | * Redistributions in binary form must reproduce the above copyright |
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11 | notice, this list of conditions and the following disclaimer in |
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12 | the documentation and/or other materials provided with the |
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13 | distribution. |
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14 | |
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15 | * Neither the name of the copyright holders nor the names of |
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16 | contributors may be used to endorse or promote products derived |
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17 | from this software without specific prior written permission. |
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18 | |
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19 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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20 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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21 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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22 | ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE |
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23 | LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
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24 | CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
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25 | SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
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26 | INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
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27 | CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
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28 | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
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29 | POSSIBILITY OF SUCH DAMAGE. */ |
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30 | |
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31 | /* $Id$ */ |
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32 | |
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33 | |
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34 | #ifndef _AVR_COMMON_H |
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35 | #define _AVR_COMMON_H |
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36 | |
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37 | #include <avr/sfr_defs.h> |
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38 | |
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39 | /* |
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40 | This purpose of this header is to define registers that have not been |
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41 | previously defined in the individual device IO header files, and to define |
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42 | other symbols that are common across AVR device families. |
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43 | |
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44 | This file is designed to be included in <avr/io.h> after the individual |
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45 | device IO header files, and after <avr/sfr_defs.h> |
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46 | |
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47 | */ |
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48 | |
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49 | /*------------ Registers Not Previously Defined ------------*/ |
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50 | |
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51 | /* |
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52 | These are registers that are not previously defined in the individual |
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53 | IO header files, OR they are defined here because they are used in parts of |
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54 | avr-libc even if a device is not selected but a general architecture has |
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55 | been selected. |
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56 | */ |
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57 | |
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58 | |
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59 | /* |
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60 | Stack pointer register. |
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61 | |
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62 | AVR architecture 1 has no RAM, thus no stack pointer. |
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63 | |
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64 | All other architectures do have a stack pointer. Some devices have only |
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65 | less than 256 bytes of possible RAM locations (128 Bytes of SRAM |
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66 | and no option for external RAM), thus SPH is officially "reserved" |
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67 | for them. |
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68 | */ |
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69 | #if __AVR_ARCH__ >= 100 |
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70 | # ifndef SPL |
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71 | # define SPL _SFR_MEM8(0x3D) |
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72 | # endif |
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73 | # ifndef SPH |
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74 | # define SPH _SFR_MEM8(0x3E) |
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75 | # endif |
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76 | # ifndef SP |
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77 | # define SP _SFR_MEM16(0x3D) |
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78 | # endif |
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79 | #elif __AVR_ARCH__ != 1 |
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80 | # ifndef SPL |
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81 | # define SPL _SFR_IO8(0x3D) |
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82 | # endif |
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83 | # if XRAMEND < 0x100 && !defined(__COMPILING_AVR_LIBC__) |
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84 | # ifndef SP |
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85 | # define SP _SFR_IO8(0x3D) |
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86 | # endif |
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87 | # else |
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88 | # ifndef SP |
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89 | # define SP _SFR_IO16(0x3D) |
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90 | # endif |
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91 | # ifndef SPH |
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92 | # define SPH _SFR_IO8(0x3E) |
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93 | # endif |
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94 | # endif /* XRAMEND < 0x100 && !defined(__COMPILING_AVR_LIBC__) */ |
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95 | #endif /* __AVR_ARCH__ != 1 */ |
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96 | |
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97 | |
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98 | /* Status Register */ |
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99 | #ifndef SREG |
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100 | # if __AVR_ARCH__ >= 100 |
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101 | # define SREG _SFR_MEM8(0x3F) |
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102 | # else |
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103 | # define SREG _SFR_IO8(0x3F) |
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104 | # endif |
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105 | #endif |
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106 | |
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107 | |
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108 | /* SREG bit definitions */ |
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109 | #ifndef SREG_C |
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110 | # define SREG_C (0) |
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111 | #endif |
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112 | #ifndef SREG_Z |
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113 | # define SREG_Z (1) |
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114 | #endif |
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115 | #ifndef SREG_N |
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116 | # define SREG_N (2) |
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117 | #endif |
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118 | #ifndef SREG_V |
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119 | # define SREG_V (3) |
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120 | #endif |
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121 | #ifndef SREG_S |
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122 | # define SREG_S (4) |
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123 | #endif |
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124 | #ifndef SREG_H |
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125 | # define SREG_H (5) |
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126 | #endif |
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127 | #ifndef SREG_T |
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128 | # define SREG_T (6) |
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129 | #endif |
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130 | #ifndef SREG_I |
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131 | # define SREG_I (7) |
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132 | #endif |
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133 | |
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134 | |
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135 | #if defined(__COMPILING_AVR_LIBC__) |
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136 | |
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137 | /* AVR 6 Architecture */ |
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138 | # if __AVR_ARCH__ == 6 |
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139 | # ifndef EIND |
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140 | # define EIND _SFR_IO8(0X3C) |
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141 | # endif |
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142 | /* XMEGA Architectures */ |
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143 | # elif __AVR_ARCH__ >= 100 |
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144 | # ifndef EIND |
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145 | # define EIND _SFR_MEM8(0x3C) |
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146 | # endif |
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147 | # endif |
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148 | |
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149 | /* |
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150 | Only few devices come without EEPROM. In order to assemble the |
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151 | EEPROM library components without defining a specific device, we |
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152 | keep the EEPROM-related definitions here. |
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153 | */ |
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154 | |
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155 | /* EEPROM Control Register */ |
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156 | # ifndef EECR |
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157 | # define EECR _SFR_IO8(0x1C) |
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158 | # endif |
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159 | |
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160 | /* EEPROM Data Register */ |
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161 | # ifndef EEDR |
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162 | # define EEDR _SFR_IO8(0x1D) |
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163 | # endif |
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164 | |
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165 | /* EEPROM Address Register */ |
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166 | # ifndef EEAR |
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167 | # define EEAR _SFR_IO16(0x1E) |
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168 | # endif |
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169 | # ifndef EEARL |
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170 | # define EEARL _SFR_IO8(0x1E) |
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171 | # endif |
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172 | # ifndef EEARH |
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173 | # define EEARH _SFR_IO8(0x1F) |
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174 | # endif |
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175 | |
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176 | /* EEPROM Control Register bits */ |
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177 | # ifndef EERE |
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178 | # define EERE (0) |
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179 | # endif |
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180 | # ifndef EEWE |
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181 | # define EEWE (1) |
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182 | # endif |
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183 | # ifndef EEMWE |
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184 | # define EEMWE (2) |
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185 | # endif |
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186 | # ifndef EERIE |
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187 | # define EERIE (3) |
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188 | # endif |
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189 | |
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190 | #endif /* __COMPILING_AVR_LIBC__ */ |
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191 | |
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192 | |
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193 | |
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194 | /*------------ Common Symbols ------------*/ |
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195 | |
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196 | /* |
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197 | Generic definitions for registers that are common across multiple AVR devices |
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198 | and families. |
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199 | */ |
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200 | |
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201 | /* Pointer registers definitions */ |
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202 | #if __AVR_ARCH__ != 1 /* avr1 does not have X and Y pointers */ |
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203 | # define XL r26 |
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204 | # define XH r27 |
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205 | # define YL r28 |
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206 | # define YH r29 |
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207 | #endif /* #if __AVR_ARCH__ != 1 */ |
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208 | #define ZL r30 |
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209 | #define ZH r31 |
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210 | |
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211 | |
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212 | /* Status Register */ |
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213 | #if defined(SREG) |
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214 | # define AVR_STATUS_REG SREG |
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215 | # if __AVR_ARCH__ >= 100 |
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216 | # define AVR_STATUS_ADDR _SFR_MEM_ADDR(SREG) |
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217 | # else |
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218 | # define AVR_STATUS_ADDR _SFR_IO_ADDR(SREG) |
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219 | # endif |
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220 | #endif |
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221 | |
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222 | /* Stack Pointer (combined) Register */ |
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223 | #if defined(SP) |
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224 | # define AVR_STACK_POINTER_REG SP |
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225 | # if __AVR_ARCH__ >= 100 |
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226 | # define AVR_STACK_POINTER_ADDR _SFR_MEM_ADDR(SP) |
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227 | # else |
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228 | # define AVR_STACK_POINTER_ADDR _SFR_IO_ADDR(SP) |
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229 | # endif |
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230 | #endif |
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231 | |
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232 | /* Stack Pointer High Register */ |
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233 | #if defined(SPH) |
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234 | # define _HAVE_AVR_STACK_POINTER_HI 1 |
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235 | # define AVR_STACK_POINTER_HI_REG SPH |
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236 | # if __AVR_ARCH__ >= 100 |
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237 | # define AVR_STACK_POINTER_HI_ADDR _SFR_MEM_ADDR(SPH) |
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238 | # else |
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239 | # define AVR_STACK_POINTER_HI_ADDR _SFR_IO_ADDR(SPH) |
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240 | # endif |
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241 | #endif |
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242 | |
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243 | /* Stack Pointer Low Register */ |
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244 | #if defined(SPL) |
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245 | # define AVR_STACK_POINTER_LO_REG SPL |
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246 | # if __AVR_ARCH__ >= 100 |
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247 | # define AVR_STACK_POINTER_LO_ADDR _SFR_MEM_ADDR(SPL) |
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248 | # else |
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249 | # define AVR_STACK_POINTER_LO_ADDR _SFR_IO_ADDR(SPL) |
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250 | # endif |
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251 | #endif |
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252 | |
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253 | /* RAMPD Register */ |
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254 | #if defined(RAMPD) |
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255 | # define AVR_RAMPD_REG RAMPD |
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256 | # if __AVR_ARCH__ >= 100 |
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257 | # define AVR_RAMPD_ADDR _SFR_MEM_ADDR(RAMPD) |
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258 | # else |
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259 | # define AVR_RAMPD_ADDR _SFR_IO_ADDR(RAMPD) |
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260 | # endif |
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261 | #endif |
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262 | |
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263 | /* RAMPX Register */ |
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264 | #if defined(RAMPX) |
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265 | # define AVR_RAMPX_REG RAMPX |
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266 | # if __AVR_ARCH__ >= 100 |
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267 | # define AVR_RAMPX_ADDR _SFR_MEM_ADDR(RAMPX) |
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268 | # else |
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269 | # define AVR_RAMPX_ADDR _SFR_IO_ADDR(RAMPX) |
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270 | # endif |
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271 | #endif |
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272 | |
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273 | /* RAMPY Register */ |
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274 | #if defined(RAMPY) |
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275 | # define AVR_RAMPY_REG RAMPY |
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276 | # if __AVR_ARCH__ >= 100 |
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277 | # define AVR_RAMPY_ADDR _SFR_MEM_ADDR(RAMPY) |
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278 | # else |
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279 | # define AVR_RAMPY_ADDR _SFR_IO_ADDR(RAMPY) |
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280 | # endif |
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281 | #endif |
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282 | |
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283 | /* RAMPZ Register */ |
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284 | #if defined(RAMPZ) |
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285 | # define AVR_RAMPZ_REG RAMPZ |
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286 | # if __AVR_ARCH__ >= 100 |
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287 | # define AVR_RAMPZ_ADDR _SFR_MEM_ADDR(RAMPZ) |
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288 | # else |
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289 | # define AVR_RAMPZ_ADDR _SFR_IO_ADDR(RAMPZ) |
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290 | # endif |
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291 | #endif |
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292 | |
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293 | /* Extended Indirect Register */ |
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294 | #if defined(EIND) |
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295 | # define AVR_EXTENDED_INDIRECT_REG EIND |
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296 | # if __AVR_ARCH__ >= 100 |
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297 | # define AVR_EXTENDED_INDIRECT_ADDR _SFR_MEM_ADDR(EIND) |
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298 | # else |
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299 | # define AVR_EXTENDED_INDIRECT_ADDR _SFR_IO_ADDR(EIND) |
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300 | # endif |
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301 | #endif |
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302 | |
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303 | /*------------ Workaround to old compilers (4.1.2 and earlier) ------------*/ |
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304 | |
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305 | #ifndef __AVR_HAVE_MOVW__ |
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306 | # if defined(__AVR_ENHANCED__) && __AVR_ENHANCED__ |
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307 | # define __AVR_HAVE_MOVW__ 1 |
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308 | # endif |
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309 | #endif |
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310 | |
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311 | #ifndef __AVR_HAVE_LPMX__ |
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312 | # if defined(__AVR_ENHANCED__) && __AVR_ENHANCED__ |
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313 | # define __AVR_HAVE_LPMX__ 1 |
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314 | # endif |
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315 | #endif |
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316 | |
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317 | #ifndef __AVR_HAVE_MUL__ |
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318 | # if defined(__AVR_ENHANCED__) && __AVR_ENHANCED__ |
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319 | # define __AVR_HAVE_MUL__ 1 |
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320 | # endif |
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321 | #endif |
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322 | |
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323 | #endif /* _AVR_COMMON_H */ |
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