source: rtems/cpukit/score/cpu/arm/rtems/score/cpusmplock.h @ f2f211c5

4.115
Last change on this file since f2f211c5 was f2f211c5, checked in by Sebastian Huber <sebastian.huber@…>, on May 31, 2013 at 11:59:34 AM

smp: Add ARM support

  • Property mode set to 100644
File size: 2.1 KB
Line 
1/**
2 * @file
3 *
4 * @ingroup ScoreSMPLockARM
5 *
6 * @brief ARM SMP Lock Implementation
7 */
8
9/*
10 * Copyright (c) 2013 embedded brains GmbH
11 *
12 * The license and distribution terms for this file may be
13 * found in the file LICENSE in this distribution or at
14 * http://www.rtems.com/license/LICENSE.
15 */
16
17#ifndef _RTEMS_SCORE_ARM_SMPLOCK_H
18#define _RTEMS_SCORE_ARM_SMPLOCK_H
19
20#include <rtems/score/cpu.h>
21
22#ifdef __cplusplus
23extern "C" {
24#endif /* __cplusplus */
25
26/**
27 * @defgroup ScoreSMPLockARM ARM SMP Locks
28 *
29 * @ingroup ScoreSMPLock
30 *
31 * A ticket lock implementation is used.
32 *
33 * @{
34 */
35
36typedef struct {
37  uint32_t next_ticket;
38  uint32_t now_serving;
39} CPU_SMP_lock_Control;
40
41#define CPU_SMP_LOCK_INITIALIZER { 0, 0 }
42
43static inline void _CPU_SMP_lock_Initialize( CPU_SMP_lock_Control *lock )
44{
45  lock->next_ticket = 0;
46  lock->now_serving = 0;
47}
48
49static inline void _CPU_SMP_lock_Acquire( CPU_SMP_lock_Control *lock )
50{
51  uint32_t my_ticket;
52  uint32_t next_ticket;
53  uint32_t status;
54
55  __asm__ volatile (
56    "1: ldrex %[my_ticket], [%[next_ticket_addr]]\n"
57    "add %[next_ticket], %[my_ticket], #1\n"
58    "strex %[status], %[next_ticket], [%[next_ticket_addr]]\n"
59    "teq %[status], #0\n"
60    "bne 1b"
61    : [my_ticket] "=&r" (my_ticket),
62      [next_ticket] "=&r" (next_ticket),
63      [status] "=&r" (status)
64    : [next_ticket_addr] "r" (&lock->next_ticket)
65    : "cc", "memory"
66  );
67
68  while ( my_ticket != lock->now_serving ) {
69    _ARM_Wait_for_event();
70  }
71
72  _ARM_Data_memory_barrier();
73}
74
75static inline void _CPU_SMP_lock_Release( CPU_SMP_lock_Control *lock )
76{
77  _ARM_Data_memory_barrier();
78  ++lock->now_serving;
79  _ARM_Data_synchronization_barrier();
80  _ARM_Send_event();
81}
82
83#define _CPU_SMP_lock_ISR_disable_and_acquire( lock, isr_cookie ) \
84  do { \
85    _CPU_ISR_Disable( isr_cookie ); \
86    _CPU_SMP_lock_Acquire( lock ); \
87  } while (0)
88
89#define _CPU_SMP_lock_Release_and_ISR_enable( lock, isr_cookie ) \
90  do { \
91    _CPU_SMP_lock_Release( lock ); \
92    _CPU_ISR_Enable( isr_cookie ); \
93  } while (0)
94
95/**@}*/
96
97#ifdef __cplusplus
98}
99#endif /* __cplusplus */
100
101#endif /* _RTEMS_SCORE_ARM_SMPLOCK_H */
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