1 | /* |
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2 | * Copyright (c) 2013 embedded brains GmbH. All rights reserved. |
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3 | * |
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4 | * embedded brains GmbH |
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5 | * Dornierstr. 4 |
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6 | * 82178 Puchheim |
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7 | * Germany |
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8 | * <rtems@embedded-brains.de> |
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9 | * |
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10 | * The license and distribution terms for this file may be |
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11 | * found in the file LICENSE in this distribution or at |
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12 | * http://www.rtems.com/license/LICENSE. |
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13 | */ |
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14 | |
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15 | #ifndef RTEMS_SCORE_ARMV4_H |
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16 | #define RTEMS_SCORE_ARMV4_H |
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17 | |
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18 | #include <rtems/score/cpu.h> |
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19 | |
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20 | #ifdef __cplusplus |
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21 | extern "C" { |
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22 | #endif /* __cplusplus */ |
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23 | |
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24 | #ifdef ARM_MULTILIB_ARCH_V4 |
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25 | |
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26 | void bsp_interrupt_dispatch( void ); |
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27 | |
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28 | void _ARMV4_Exception_interrupt( void ); |
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29 | |
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30 | typedef void ARMV4_Exception_abort_handler( CPU_Exception_frame *frame ); |
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31 | |
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32 | void _ARMV4_Exception_data_abort_set_handler( |
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33 | ARMV4_Exception_abort_handler handler |
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34 | ); |
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35 | |
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36 | void _ARMV4_Exception_data_abort( void ); |
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37 | |
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38 | void _ARMV4_Exception_prefetch_abort_set_handler( |
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39 | ARMV4_Exception_abort_handler handler |
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40 | ); |
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41 | |
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42 | void _ARMV4_Exception_prefetch_abort( void ); |
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43 | |
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44 | void _ARMV4_Exception_undef_default( void ); |
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45 | |
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46 | void _ARMV4_Exception_swi_default( void ); |
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47 | |
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48 | void _ARMV4_Exception_data_abort_default( void ); |
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49 | |
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50 | void _ARMV4_Exception_pref_abort_default( void ); |
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51 | |
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52 | void _ARMV4_Exception_reserved_default( void ); |
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53 | |
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54 | void _ARMV4_Exception_irq_default( void ); |
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55 | |
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56 | void _ARMV4_Exception_fiq_default( void ); |
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57 | |
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58 | static inline uint32_t arm_status_irq_enable( void ) |
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59 | { |
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60 | uint32_t arm_switch_reg; |
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61 | uint32_t psr; |
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62 | |
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63 | RTEMS_COMPILER_MEMORY_BARRIER(); |
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64 | |
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65 | __asm__ volatile ( |
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66 | ARM_SWITCH_TO_ARM |
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67 | "mrs %[psr], cpsr\n" |
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68 | "bic %[arm_switch_reg], %[psr], #0x80\n" |
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69 | "msr cpsr, %[arm_switch_reg]\n" |
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70 | ARM_SWITCH_BACK |
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71 | : [arm_switch_reg] "=&r" (arm_switch_reg), [psr] "=&r" (psr) |
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72 | ); |
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73 | |
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74 | return psr; |
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75 | } |
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76 | |
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77 | static inline void arm_status_restore( uint32_t psr ) |
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78 | { |
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79 | ARM_SWITCH_REGISTERS; |
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80 | |
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81 | __asm__ volatile ( |
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82 | ARM_SWITCH_TO_ARM |
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83 | "msr cpsr, %[psr]\n" |
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84 | ARM_SWITCH_BACK |
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85 | : ARM_SWITCH_OUTPUT |
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86 | : [psr] "r" (psr) |
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87 | ); |
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88 | |
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89 | RTEMS_COMPILER_MEMORY_BARRIER(); |
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90 | } |
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91 | |
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92 | #endif /* ARM_MULTILIB_ARCH_V4 */ |
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93 | |
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94 | #ifdef __cplusplus |
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95 | } |
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96 | #endif /* __cplusplus */ |
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97 | |
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98 | #endif /* RTEMS_SCORE_ARMV4_H */ |
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