1 | /* |
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2 | * $Id$ |
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3 | * |
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4 | * This file contains all assembly code for the ARM implementation |
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5 | * of RTEMS. |
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6 | * |
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7 | * Copyright (c) 2007 by Ray Xu, <Rayx.cn@gmail.com> |
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8 | * Thumb support added. |
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9 | * |
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10 | * Copyright (c) 2002 by Advent Networks, Inc. |
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11 | * Jay Monkman <jmonkman@adventnetworks.com> |
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12 | * |
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13 | * COPYRIGHT (c) 2000 Canon Research Centre France SA. |
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14 | * Emmanuel Raguet, mailto:raguet@crf.canon.fr |
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15 | * |
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16 | * The license and distribution terms for this file may be |
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17 | * found in the file LICENSE in this distribution or at |
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18 | * http://www.rtems.com/license/LICENSE. |
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19 | * |
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20 | */ |
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21 | |
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22 | #include <rtems/asm.h> |
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23 | #include <rtems/score/cpu_asm.h> |
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24 | |
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25 | /* |
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26 | * function declaration macro (start body in ARM mode) |
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27 | */ |
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28 | #ifdef __thumb__ |
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29 | #define FUNC_START_ARM(_name_) \ |
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30 | .code 16 ;\ |
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31 | .thumb_func ;\ |
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32 | .globl _name_ ;\ |
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33 | _name_: ;\ |
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34 | bx pc ;\ |
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35 | .code 32 ;\ |
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36 | _name_ ## _ARM: |
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37 | #else |
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38 | #define FUNC_START_ARM(_name_) \ |
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39 | .globl _name_; \ |
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40 | _name_: |
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41 | #endif |
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42 | |
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43 | .text |
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44 | |
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45 | /* |
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46 | * void _CPU_Context_switch( run_context, heir_context ) |
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47 | * void _CPU_Context_restore( run_context, heir_context ) |
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48 | * |
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49 | * This routine performs a normal non-FP context. |
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50 | * |
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51 | * R0 = run_context R1 = heir_context |
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52 | * |
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53 | * This function copies the current registers to where r0 points, then |
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54 | * restores the ones from where r1 points. |
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55 | * |
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56 | * Using the ldm/stm opcodes save 2-3 us on 100 MHz ARM9TDMI with |
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57 | * a 16 bit data bus. |
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58 | * |
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59 | */ |
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60 | |
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61 | FUNC_START_ARM(_CPU_Context_switch) |
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62 | /* Start saving context */ |
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63 | mrs r2, cpsr |
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64 | stmia r0, {r2, r4, r5, r6, r7, r8, r9, r10, r11, r13, r14} |
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65 | |
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66 | |
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67 | /* Start restoring context */ |
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68 | _restore: |
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69 | ldmia r1, {r2, r4, r5, r6, r7, r8, r9, r10, r11, r13, r14} |
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70 | msr cpsr, r2 |
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71 | #ifdef __thumb__ |
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72 | bx lr |
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73 | nop |
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74 | #else |
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75 | mov pc, lr |
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76 | #endif |
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77 | /* |
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78 | * void _CPU_Context_restore( new_context ) |
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79 | * |
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80 | * This function copies the restores the registers from where r0 points. |
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81 | * It must match _CPU_Context_switch() |
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82 | * |
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83 | */ |
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84 | FUNC_START_ARM(_CPU_Context_restore) |
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85 | mov r1, r0 |
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86 | b _restore |
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87 | |
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88 | |
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89 | |
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90 | /* FIXME: _Exception_Handler_Undef_Swi is untested */ |
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91 | FUNC_START_ARM(_Exception_Handler_Undef_Swi) |
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92 | /* FIXME: This should use load and store multiple instructions */ |
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93 | sub r13,r13,#SIZE_REGS |
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94 | str r4, [r13, #REG_R4] |
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95 | str r5, [r13, #REG_R5] |
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96 | str r6, [r13, #REG_R6] |
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97 | str r7, [r13, #REG_R7] |
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98 | str r8, [r13, #REG_R8] |
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99 | str r9, [r13, #REG_R9] |
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100 | str r10, [r13, #REG_R10] |
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101 | str r11, [r13, #REG_R11] |
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102 | str sp, [r13, #REG_SP] |
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103 | str lr, [r13, #REG_LR] |
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104 | mrs r0, cpsr /* read the status */ |
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105 | and r0, r0,#0x1f /* we keep the mode as exception number */ |
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106 | str r0, [r13, #REG_PC] /* we store it in a free place */ |
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107 | mov r0, r13 /* put frame address in r0 (C arg 1) */ |
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108 | |
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109 | ldr r1, =SWI_Handler |
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110 | ldr lr, =_go_back_1 |
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111 | ldr pc,[r1] /* call handler */ |
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112 | _go_back_1: |
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113 | ldr r4, [r13, #REG_R4] |
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114 | ldr r5, [r13, #REG_R5] |
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115 | ldr r6, [r13, #REG_R6] |
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116 | ldr r7, [r13, #REG_R7] |
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117 | ldr r8, [r13, #REG_R8] |
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118 | ldr r9, [r13, #REG_R9] |
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119 | ldr r10, [r13, #REG_R10] |
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120 | ldr r11, [r13, #REG_R11] |
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121 | ldr sp, [r13, #REG_SP] |
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122 | ldr lr, [r13, #REG_LR] |
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123 | add r13,r13,#SIZE_REGS |
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124 | movs pc,r14 /* return */ |
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125 | |
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126 | /* FIXME: _Exception_Handler_Abort is untested */ |
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127 | FUNC_START_ARM(_Exception_Handler_Abort) |
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128 | /* FIXME: This should use load and store multiple instructions */ |
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129 | sub r13,r13,#SIZE_REGS |
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130 | str r4, [r13, #REG_R4] |
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131 | str r5, [r13, #REG_R5] |
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132 | str r6, [r13, #REG_R6] |
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133 | str r7, [r13, #REG_R7] |
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134 | str r8, [r13, #REG_R8] |
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135 | str r9, [r13, #REG_R9] |
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136 | str sp, [r13, #REG_R11] |
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137 | str lr, [r13, #REG_SP] |
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138 | str lr, [r13, #REG_LR] |
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139 | mrs r0, cpsr /* read the status */ |
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140 | and r0, r0,#0x1f /* we keep the mode as exception number */ |
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141 | str r0, [r13, #REG_PC] /* we store it in a free place */ |
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142 | mov r0, r13 /* put frame address in ro (C arg 1) */ |
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143 | |
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144 | ldr r1, =_currentExcHandler |
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145 | ldr lr, =_go_back_2 |
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146 | ldr pc,[r1] /* call handler */ |
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147 | _go_back_2: |
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148 | ldr r4, [r13, #REG_R4] |
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149 | ldr r5, [r13, #REG_R5] |
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150 | ldr r6, [r13, #REG_R6] |
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151 | ldr r7, [r13, #REG_R7] |
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152 | ldr r8, [r13, #REG_R8] |
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153 | ldr r9, [r13, #REG_R9] |
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154 | ldr r10, [r13, #REG_R10] |
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155 | ldr sp, [r13, #REG_R11] |
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156 | ldr lr, [r13, #REG_SP] |
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157 | ldr lr, [r13, #REG_LR] |
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158 | add r13,r13,#SIZE_REGS |
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159 | #ifdef __thumb__ |
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160 | subs r11, r14,#4 |
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161 | bx r11 |
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162 | nop |
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163 | #else |
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164 | subs pc,r14,#4 /* return */ |
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165 | #endif |
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166 | |
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167 | #define ABORT_REGS_OFFS 32-REG_R4 |
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168 | #define ABORT_SIZE_REGS SIZE_REGS+ABORT_REGS_OFFS |
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169 | |
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170 | FUNC_START_ARM(_exc_data_abort) |
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171 | sub sp, sp, #ABORT_SIZE_REGS /* reserve register frame */ |
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172 | stmia sp, {r0-r11} |
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173 | add sp, sp, #ABORT_REGS_OFFS /* the Context_Control structure starts by CPSR, R4, ... */ |
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174 | |
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175 | str ip, [sp, #REG_PC] /* store R12 (ip) somewhere, oh hackery, hackery, hack */ |
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176 | str lr, [sp, #REG_LR] |
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177 | |
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178 | mov r1, lr |
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179 | ldr r0, [r1, #-8] /* r0 = bad instruction */ |
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180 | mrs r1, spsr /* r1 = spsr */ |
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181 | mov r2, r13 /* r2 = exception frame of Context_Control type */ |
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182 | #if defined(__thumb__) |
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183 | .code 32 |
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184 | /*arm to thumb*/ |
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185 | adr r5, to_thumb + 1 |
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186 | bx r5 |
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187 | .code 16 |
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188 | to_thumb: |
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189 | #endif |
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190 | bl do_data_abort |
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191 | #if defined(__thumb__) |
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192 | /*back to arm*/ |
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193 | .code 16 |
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194 | thumb_to_arm: |
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195 | .align 2 |
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196 | adr r5, arm_code |
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197 | bx r5 |
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198 | nop |
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199 | .code 32 |
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200 | arm_code: |
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201 | #endif |
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202 | |
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203 | ldr lr, [sp, #REG_LR] |
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204 | ldr ip, [sp, #REG_PC] /* restore R12 (ip) */ |
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205 | |
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206 | sub sp, sp, #ABORT_REGS_OFFS |
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207 | ldmia sp, {r0-r11} |
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208 | add sp, sp, #ABORT_SIZE_REGS |
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209 | #ifdef __thumb__ |
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210 | subs r11, r14, #4 /* return to the instruction */ |
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211 | bx r11 |
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212 | nop |
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213 | #else |
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214 | subs pc, r14, #4 |
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215 | #endif |
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216 | /* _AFTER_ the aborted one */ |
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