source: rtems/cpukit/score/cpu/arm/cpu_asm.S @ 18e1e5b

4.11
Last change on this file since 18e1e5b was 18e1e5b, checked in by Sebastian Huber <sebastian.huber@…>, on May 23, 2013 at 7:04:19 AM

arm: Fix CPSR and SPSR access

The GNU assembler translates for example a

msr spsr, rN

into

msr SPSR_fc, rN

This would update only a subset of the register and leads to an
incomplete exceptions restore sequence resulting in system corruption.
Correct is this:

msr SPSR_fsxc, rN

  • Property mode set to 100644
File size: 2.0 KB
Line 
1/**
2 * @file
3 *
4 * @ingroup ScoreCPU
5 *
6 * @brief ARM architecture support implementation.
7 */
8
9/*
10 *  This file contains all assembly code for the ARM implementation
11 *  of RTEMS.
12 *
13 *  Copyright (c) 2007 by Ray Xu, <Rayx.cn@gmail.com>
14 *          Thumb support added.
15 *
16 *  Copyright (c) 2002 by Advent Networks, Inc.
17 *          Jay Monkman <jmonkman@adventnetworks.com>
18 *
19 *  COPYRIGHT (c) 2000 Canon Research Centre France SA.
20 *  Emmanuel Raguet, mailto:raguet@crf.canon.fr
21 *
22 *  The license and distribution terms for this file may be
23 *  found in the file LICENSE in this distribution or at
24 *  http://www.rtems.com/license/LICENSE.
25 *
26 */
27
28#ifdef HAVE_CONFIG_H
29#include "config.h"
30#endif
31
32#include <rtems/asm.h>
33#include <rtems/score/cpu.h>
34
35#ifdef ARM_MULTILIB_ARCH_V4
36
37        .text
38
39/*
40 *  void _CPU_Context_switch( run_context, heir_context )
41 *  void _CPU_Context_restore( run_context, heir_context )
42 *
43 *  This routine performs a normal non-FP context.
44 *
45 *  R0 = run_context    R1 = heir_context
46 *
47 *  This function copies the current registers to where r0 points, then
48 *  restores the ones from where r1 points.
49 *
50 *  Using the ldm/stm opcodes save 2-3 us on 100 MHz ARM9TDMI with
51 *  a 16 bit data bus.
52 *
53 */
54
55DEFINE_FUNCTION_ARM(_CPU_Context_switch)
56/* Start saving context */
57        mrs     r2, CPSR
58        stmia   r0,  {r2, r4, r5, r6, r7, r8, r9, r10, r11, r13, r14}
59
60#ifdef ARM_MULTILIB_VFP_D32
61        add     r3, r0, #ARM_CONTEXT_CONTROL_D8_OFFSET
62        vstm    r3, {d8-d15}
63#endif
64
65/* Start restoring context */
66_restore:
67
68#ifdef ARM_MULTILIB_VFP_D32
69        add     r3, r1, #ARM_CONTEXT_CONTROL_D8_OFFSET
70        vldm    r3, {d8-d15}
71#endif
72
73        ldmia   r1,  {r2, r4, r5, r6, r7, r8, r9, r10, r11, r13, r14}
74        msr     CPSR_fsxc, r2
75#ifdef __thumb__
76        bx      lr
77        nop
78#else
79        mov     pc, lr
80#endif
81/*
82 *  void _CPU_Context_restore( new_context )
83 *
84 *  This function copies the restores the registers from where r0 points.
85 *  It must match _CPU_Context_switch()
86 *
87 */
88DEFINE_FUNCTION_ARM(_CPU_Context_restore)
89        mov     r1, r0
90        b       _restore
91
92#endif /* ARM_MULTILIB_ARCH_V4 */
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