source: rtems/cpukit/score/cpu/arm/cpu_asm.S @ 183af89

4.115
Last change on this file since 183af89 was c5ed148, checked in by Sebastian Huber <sebastian.huber@…>, on 09/24/11 at 12:56:51

2011-09-24 Sebastian Huber <sebastian.huber@…>

  • rtems/score/armv7m.h, armv7m-context-initialize.c, armv7m-context-restore.c, armv7m-context-switch.c, armv7m-exception-handler-get.c, armv7m-exception-handler-set.c, armv7m-exception-priority-get.c, armv7m-exception-priority-set.c, armv7m-initialize.c, armv7m-isr-dispatch.c, armv7m-isr-enter-leave.c, armv7m-isr-level-get.c, armv7m-isr-level-set.c, armv7m-isr-vector-install.c, armv7m-multitasking-start-stop.c: New files.
  • Makefile.am, preinstall.am: Reflect changes above.
  • rtems/score/arm.h: Define ARM_MULTILIB_ARCH_V4 and ARM_MULTILIB_ARCH_V7M.
  • rtems/score/cpu.h, cpu_asm.S, cpu.c, arm_exc_abort.S, arm_exc_handler_high.c, arm_exc_handler_low.S, arm_exc_interrupt.S: Define CPU_HAS_HARDWARE_INTERRUPT_STACK to FALSE. Use ARM_MULTILIB_ARCH_V4 and ARM_MULTILIB_ARCH_V7M.
  • Property mode set to 100644
File size: 1.8 KB
Line 
1/**
2 * @file
3 *
4 * @ingroup ScoreCPU
5 *
6 * @brief ARM architecture support implementation.
7 */
8
9/*
10 *  $Id$
11 *
12 *  This file contains all assembly code for the ARM implementation
13 *  of RTEMS.
14 *
15 *  Copyright (c) 2007 by Ray Xu, <Rayx.cn@gmail.com>
16 *          Thumb support added.
17 *
18 *  Copyright (c) 2002 by Advent Networks, Inc.
19 *          Jay Monkman <jmonkman@adventnetworks.com>
20 *
21 *  COPYRIGHT (c) 2000 Canon Research Centre France SA.
22 *  Emmanuel Raguet, mailto:raguet@crf.canon.fr
23 *
24 *  The license and distribution terms for this file may be
25 *  found in the file LICENSE in this distribution or at
26 *  http://www.rtems.com/license/LICENSE.
27 *
28 */
29
30#ifdef HAVE_CONFIG_H
31#include "config.h"
32#endif
33
34#include <rtems/asm.h>
35#include <rtems/score/cpu_asm.h>
36
37#ifdef ARM_MULTILIB_ARCH_V4
38
39        .text
40
41/*
42 *  void _CPU_Context_switch( run_context, heir_context )
43 *  void _CPU_Context_restore( run_context, heir_context )
44 *
45 *  This routine performs a normal non-FP context.
46 *
47 *  R0 = run_context    R1 = heir_context
48 *
49 *  This function copies the current registers to where r0 points, then
50 *  restores the ones from where r1 points.
51 *
52 *  Using the ldm/stm opcodes save 2-3 us on 100 MHz ARM9TDMI with
53 *  a 16 bit data bus.
54 *
55 */
56
57DEFINE_FUNCTION_ARM(_CPU_Context_switch)
58/* Start saving context */
59        mrs     r2, cpsr
60        stmia   r0,  {r2, r4, r5, r6, r7, r8, r9, r10, r11, r13, r14}
61
62
63/* Start restoring context */
64_restore:
65        ldmia   r1,  {r2, r4, r5, r6, r7, r8, r9, r10, r11, r13, r14}
66        msr     cpsr, r2
67#ifdef __thumb__
68        bx      lr
69        nop
70#else
71        mov     pc, lr
72#endif
73/*
74 *  void _CPU_Context_restore( new_context )
75 *
76 *  This function copies the restores the registers from where r0 points.
77 *  It must match _CPU_Context_switch()
78 *
79 */
80DEFINE_FUNCTION_ARM(_CPU_Context_restore)
81        mov     r1, r0
82        b       _restore
83
84#endif /* ARM_MULTILIB_ARCH_V4 */
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