1 | /* SPDX-License-Identifier: BSD-2-Clause */ |
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2 | |
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3 | /** |
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4 | * @file |
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5 | * |
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6 | * @brief CPU ISR Vector Install |
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7 | */ |
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8 | |
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9 | /* |
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10 | * Copyright (c) 2011 Sebastian Huber. All rights reserved. |
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11 | * |
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12 | * embedded brains GmbH |
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13 | * Obere Lagerstr. 30 |
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14 | * 82178 Puchheim |
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15 | * Germany |
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16 | * <rtems@embedded-brains.de> |
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17 | * |
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18 | * Redistribution and use in source and binary forms, with or without |
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19 | * modification, are permitted provided that the following conditions |
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20 | * are met: |
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21 | * 1. Redistributions of source code must retain the above copyright |
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22 | * notice, this list of conditions and the following disclaimer. |
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23 | * 2. Redistributions in binary form must reproduce the above copyright |
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24 | * notice, this list of conditions and the following disclaimer in the |
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25 | * documentation and/or other materials provided with the distribution. |
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26 | * |
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27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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28 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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29 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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30 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE |
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31 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
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32 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
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33 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
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34 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
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35 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
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36 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
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37 | * POSSIBILITY OF SUCH DAMAGE. |
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38 | */ |
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39 | |
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40 | #ifdef HAVE_CONFIG_H |
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41 | #include "config.h" |
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42 | #endif |
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43 | |
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44 | #include <rtems/score/armv7m.h> |
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45 | #include <rtems/score/isr.h> |
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46 | |
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47 | #ifdef ARM_MULTILIB_ARCH_V7M |
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48 | |
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49 | void _CPU_ISR_install_vector( |
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50 | uint32_t vector, |
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51 | CPU_ISR_handler new_handler, |
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52 | CPU_ISR_handler *old_handler |
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53 | ) |
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54 | { |
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55 | uint32_t level; |
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56 | |
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57 | _ISR_Local_disable( level ); |
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58 | if ( old_handler != NULL ) { |
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59 | *old_handler = _ARMV7M_Get_exception_handler( (int) vector ); |
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60 | } |
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61 | _ARMV7M_Set_exception_handler( (int) vector, new_handler ); |
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62 | _ISR_Local_enable( level ); |
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63 | } |
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64 | |
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65 | #endif /* ARM_MULTILIB_ARCH_V7M */ |
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