source: rtems/cpukit/score/cpu/arm/armv7m-context-switch.c @ c499856

4.115
Last change on this file since c499856 was c499856, checked in by Chris Johns <chrisj@…>, on 03/20/14 at 21:10:47

Change all references of rtems.com to rtems.org.

  • Property mode set to 100644
File size: 1.3 KB
Line 
1/**
2 * @file
3 *
4 * @brief ARM7M CPU Context Switch
5 */
6
7/*
8 * Copyright (c) 2011 Sebastian Huber.  All rights reserved.
9 *
10 *  embedded brains GmbH
11 *  Obere Lagerstr. 30
12 *  82178 Puchheim
13 *  Germany
14 *  <rtems@embedded-brains.de>
15 *
16 * The license and distribution terms for this file may be
17 * found in the file LICENSE in this distribution or at
18 * http://www.rtems.org/license/LICENSE.
19 */
20
21#ifdef HAVE_CONFIG_H
22  #include "config.h"
23#endif
24
25#include <rtems/score/armv7m.h>
26#include <rtems/score/percpu.h>
27
28#ifdef ARM_MULTILIB_ARCH_V7M
29
30void __attribute__((naked)) _CPU_Context_switch(
31  Context_Control *executing,
32  Context_Control *heir
33)
34{
35  __asm__ volatile (
36    "movw r2, #:lower16:_Per_CPU_Information\n"
37    "movt r2, #:upper16:_Per_CPU_Information\n"
38    "ldr r3, [r2, %[isrpcpuoff]]\n"
39    "stm r0, {r4-r11, lr}\n"
40    "str sp, [r0, %[spctxoff]]\n"
41    "str r3, [r0, %[isrctxoff]]\n"
42    "ldr r3, [r1, %[isrctxoff]]\n"
43    "ldr sp, [r1, %[spctxoff]]\n"
44    "ldm r1, {r4-r11, lr}\n"
45    "str r3, [r2, %[isrpcpuoff]]\n"
46    "bx lr\n"
47    :
48    : [spctxoff] "J" (offsetof(Context_Control, register_sp)),
49      [isrctxoff] "J" (offsetof(Context_Control, isr_nest_level)),
50      [isrpcpuoff] "J" (offsetof(Per_CPU_Control, isr_nest_level))
51  );
52}
53
54#endif /* ARM_MULTILIB_ARCH_V7M */
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