source: rtems/cpukit/score/cpu/arm/armv4-exception-default.S @ 8ae37323

4.115
Last change on this file since 8ae37323 was 8ae37323, checked in by Sebastian Huber <sebastian.huber@…>, on 08/10/14 at 16:36:30

arm: Add support for FPv4-SP floating point unit

This floating point unit is available in Cortex-M4 processors and
defined by ARMv7-M. This adds basic support for other VFP-D16 variants.
  • Property mode set to 100644
File size: 2.9 KB
Line 
1/*
2 * Copyright (c) 2013 embedded brains GmbH.  All rights reserved.
3 *
4 *  embedded brains GmbH
5 *  Obere Lagerstr. 30
6 *  82178 Puchheim
7 *  Germany
8 *  <rtems@embedded-brains.de>
9 *
10 * The license and distribution terms for this file may be
11 * found in the file LICENSE in this distribution or at
12 * http://www.rtems.org/license/LICENSE.
13 */
14
15#ifdef HAVE_CONFIG_H
16  #include "config.h"
17#endif
18
19#include <rtems/asm.h>
20#include <rtems/system.h>
21
22#ifdef ARM_MULTILIB_ARCH_V4
23
24#define MORE_CONTEXT_SIZE \
25  (ARM_EXCEPTION_FRAME_SIZE - ARM_EXCEPTION_FRAME_REGISTER_SP_OFFSET)
26
27.extern _ARM_Exception_default
28
29.globl _ARMV4_Exception_undef_default
30.globl _ARMV4_Exception_swi_default
31.globl _ARMV4_Exception_data_abort_default
32.globl _ARMV4_Exception_pref_abort_default
33.globl _ARMV4_Exception_reserved_default
34.globl _ARMV4_Exception_irq_default
35.globl _ARMV4_Exception_fiq_default
36
37.section ".text"
38
39.arm
40
41_ARMV4_Exception_undef_default:
42
43        /* Save context and load vector */
44        sub     sp, #MORE_CONTEXT_SIZE
45        stmdb   sp!, {r0-r12}
46        mov     r4, #1
47
48        b       save_more_context
49
50_ARMV4_Exception_swi_default:
51
52        /* Save context and load vector */
53        sub     sp, #MORE_CONTEXT_SIZE
54        stmdb   sp!, {r0-r12}
55        mov     r4, #2
56
57        b       save_more_context
58
59_ARMV4_Exception_pref_abort_default:
60
61        /* Save context and load vector */
62        sub     sp, #MORE_CONTEXT_SIZE
63        stmdb   sp!, {r0-r12}
64        mov     r4, #3
65
66        b       save_more_context
67
68_ARMV4_Exception_data_abort_default:
69
70        /* Save context and load vector */
71        sub     sp, #MORE_CONTEXT_SIZE
72        stmdb   sp!, {r0-r12}
73        mov     r4, #4
74
75        b       save_more_context
76
77_ARMV4_Exception_reserved_default:
78
79        /* Save context and load vector */
80        sub     sp, #MORE_CONTEXT_SIZE
81        stmdb   sp!, {r0-r12}
82        mov     r4, #5
83
84        b       save_more_context
85
86_ARMV4_Exception_irq_default:
87
88        /* Save context and load vector */
89        sub     sp, #MORE_CONTEXT_SIZE
90        stmdb   sp!, {r0-r12}
91        mov     r4, #6
92
93        b       save_more_context
94
95_ARMV4_Exception_fiq_default:
96
97        /* Save context and load vector */
98        sub     sp, #MORE_CONTEXT_SIZE
99        stmdb   sp!, {r0-r12}
100        mov     r4, #7
101
102save_more_context:
103
104        /* Save more context */
105        mov     r2, lr
106        mrs     r3, spsr
107        mrs     r7, cpsr
108        orr     r5, r3, #ARM_PSR_I
109        bic     r5, #ARM_PSR_T
110        msr     cpsr, r5
111        mov     r0, sp
112        mov     r1, lr
113        msr     cpsr, r7
114        mov     r5, #0
115        add     r6, sp, #ARM_EXCEPTION_FRAME_REGISTER_SP_OFFSET
116        stm     r6, {r0-r5}
117
118        /* Argument for high level handler */
119        mov     r0, sp
120
121        /* Clear VFP context pointer */
122        add     r3, sp, #ARM_EXCEPTION_FRAME_VFP_CONTEXT_OFFSET
123        mov     r1, #0
124        str     r1, [r3]
125
126#ifdef ARM_MULTILIB_VFP
127        /* Ensure that the FPU is enabled */
128        vmrs    r1, FPEXC
129        tst     r1, #(1 << 30)
130        beq     1f
131
132        /* Save VFP context */
133        sub     sp, #(ARM_VFP_CONTEXT_SIZE + 4)
134        add     r4, sp, #4
135        bic     r4, r4, #7
136        str     r4, [r3]
137        vmrs    r2, FPSCR
138        stmia   r4!, {r1-r2}
139        vstmia  r4!, {d0-d15}
140#ifdef ARM_MULTILIB_VFP_D32
141        vstmia  r4!, {d16-d31}
142#else
143        mov     r1, #0
144        mov     r2, #0
145        adds    r3, r4, #128
1462:
147        stmia   r4!, {r1-r2}
148        cmp     r4, r3
149        bne     2b
150#endif
1511:
152#endif /* ARM_MULTILIB_VFP */
153
154        /* Call high level handler */
155        SWITCH_FROM_ARM_TO_THUMB        r1
156        bl      _ARM_Exception_default
157
158        /* Just in case */
159twiddle:
160        b       twiddle
161
162#endif /* ARM_MULTILIB_ARCH_V4 */
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